Aligned GCC linker description and assembler startup with C startup.

ARM.CMSIS.pdsc

@@ -10,6 +10,8 @@
   <releases>
     <release version="5.7.1-dev0">
       Active development ...
+      CMSIS-Core(M):
+       - updated GCC LinkerDescription, GCC Assembler startup
       CMSIS-DSP:
        - Purged pre-built libs from Git
       CMSIS-RTOS:
@@ -2611,7 +2613,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/startup_ARMCM0.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
@@ -2622,8 +2624,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0/Source/system_ARMCM0.c"      version="1.0.0" attr="config"/>
       </files>
@@ -2639,7 +2641,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
@@ -2650,7 +2652,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.0.1" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="2.1.0" attr="config" condition="GCC"/>
         <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld"           version="2.0.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c"      version="1.0.0" attr="config"/>
@@ -2667,7 +2669,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/startup_ARMCM1.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
@@ -2678,8 +2680,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMCM1/Include/ARMCM1.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM1/Source/system_ARMCM1.c"      version="1.0.0" attr="config"/>
       </files>
@@ -2695,7 +2697,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/startup_ARMCM3.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
       </files>
     </component>
@@ -2706,8 +2708,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM3/Source/system_ARMCM3.c"      version="1.0.1" attr="config"/>
       </files>
@@ -2723,7 +2725,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/startup_ARMCM4.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
        <file category="sourceC"       name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
       </files>
     </component>
@@ -2734,8 +2736,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include" name="Device/ARM/ARMCM4/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM4/Source/system_ARMCM4.c"      version="1.0.1" attr="config"/>
       </files>
@@ -2751,7 +2753,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/startup_ARMCM7.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
       </files>
     </component>
@@ -2762,8 +2764,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"  name="Device/ARM/ARMCM7/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM7/Source/system_ARMCM7.c"      version="1.0.1" attr="config"/>
       </files>
@@ -2778,7 +2780,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/startup_ARMCM23.c"    version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct"  version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"       version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"     version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h" version="1.0.0" attr="config" condition="TZ Secure"/>
@@ -2791,8 +2793,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"      name="Device/ARM/ARMCM23/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld"        version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM23/Source/system_ARMCM23.c"      version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2809,7 +2811,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/startup_ARMCM33.c"             version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h" version="1.1.1" attr="config" condition="TZ Secure"/>
@@ -2822,8 +2824,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"      name="Device/ARM/ARMCM33/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S"         version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s"         version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM33/Source/system_ARMCM33.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2840,7 +2842,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/startup_ARMCM35P.c"             version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h" version="1.0.0" attr="config" condition="TZ Secure"/>
@@ -2853,8 +2855,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"      name="Device/ARM/ARMCM35P/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S"         version="1.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s"         version="2.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMCM35P/Source/system_ARMCM35P.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
@@ -2871,7 +2873,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/startup_ARMCM55.c"             version="1.0.0" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="1.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMCM55/Source/system_ARMCM55.c"              version="1.0.0" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h" version="1.0.0" attr="config" condition="TZ Secure"/>
@@ -2888,7 +2890,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/startup_ARMSC000.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
       </files>
     </component>
@@ -2899,8 +2901,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMSC000/Source/system_ARMSC000.c"      version="1.0.0" attr="config"/>
       </files>
@@ -2916,7 +2918,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/startup_ARMSC300.c"     version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct"   version="1.0.0" attr="config" condition="ARMCC5"/>
         <file category="linkerScript" name="Device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct"   version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
       </files>
     </component>
@@ -2927,8 +2929,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="header"  name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceAsm"    name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
         <file category="sourceC"      name="Device/ARM/ARMSC300/Source/system_ARMSC300.c"      version="1.0.1" attr="config"/>
       </files>
@@ -2943,7 +2945,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c"            version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct"          version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"                version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"             version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config" condition="TZ Secure"/>
@@ -2956,8 +2958,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"      name="Device/ARM/ARMv8MBL/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld"         version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c"      version="1.0.1" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
@@ -2973,7 +2975,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/startup_ARMv8MML.c"             version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
@@ -2986,8 +2988,8 @@ and 8-bit Java bytecodes in Jazelle state.
         <file category="include"      name="Device/ARM/ARMv8MML/Include/"/>
         <!-- startup / system file -->
         <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s"         version="1.0.1" attr="config" condition="ARMCC"/>
-        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.0.1" attr="config" condition="GCC"/>
-        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.0.0" attr="config" condition="GCC"/>
+        <file category="sourceAsm"    name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S"         version="2.1.0" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld"                 version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c"              version="1.0.1" attr="config" condition="ARMCC GCC"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.1.1" attr="config" condition="TZ Secure"/>
@@ -3003,7 +3005,7 @@ and 8-bit Java bytecodes in Jazelle state.
         <!-- startup / system file -->
         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/startup_ARMv81MML.c"             version="2.0.3" attr="config"/>
         <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct"           version="1.0.0" attr="config" condition="ARMCC6"/>
-        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.0.1" attr="config" condition="GCC"/>
+        <file category="linkerScript" name="Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld"                  version="2.1.0" attr="config" condition="GCC"/>
         <file category="sourceC"      name="Device/ARM/ARMv81MML/Source/system_ARMv81MML.c"              version="1.2.1" attr="config"/>
         <!-- SAU configuration -->
         <file category="header"       name="Device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h" version="1.0.1" attr="config" condition="TZ Secure"/>

Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM0.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M0 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -106,12 +107,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM0plus.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M0plus Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -106,12 +107,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMCM1/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM1.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M1 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -106,12 +107,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMCM23/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM23.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M23 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,12 +86,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -109,12 +110,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM3.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M3 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -104,12 +105,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMCM33/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM33.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M33 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -87,12 +87,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -108,12 +109,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM35P.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M35P Device
- * @version  V1.0.1
- * @date     23. July 2019
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,12 +86,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -107,12 +108,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM4.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M4 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -104,12 +105,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMCM55/Source/GCC/gcc_arm.ld

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     gcc_arm.ld
- * @brief    GNU Linker Script for Cortex-M based device (ARMC55)
- * @version  V1.0.0
- * @date     30. March 2020
+ * @brief    GNU Linker Script for Cortex-M based device
+ * @version  V1.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
  * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
@@ -160,14 +160,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -179,7 +181,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -211,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMCM7.S
  * @brief    CMSIS-Core(M) Device Startup File for Cortex-M7 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -104,12 +105,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMSC000.S
  * @brief    CMSIS-Core(M) Device Startup File for SC000 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -106,12 +107,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMSC300.S
  * @brief    CMSIS-Core(M) Device Startup File for SC300 Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -83,12 +83,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -104,12 +105,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0

Device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.1
- * @date     17. December 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -160,14 +160,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -179,7 +181,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -211,7 +213,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMv8MBL.S
  * @brief    CMSIS-Core(M) Device Startup File for ARMv8MBL Device
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -86,12 +86,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 blt      .L_loop0_0_done
                 ldr      r0, [r1, r3]
                 str      r0, [r2, r3]
@@ -109,12 +110,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 blt      .L_loop2_0_done
                 str      r0, [r1, r2]
                 b        .L_loop2_0

Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld

@@ -1,11 +1,11 @@
 /******************************************************************************
  * @file     gcc_arm.ld
  * @brief    GNU Linker Script for Cortex-M based device
- * @version  V2.0.0
- * @date     21. May 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -152,14 +152,16 @@ SECTIONS
   {
     . = ALIGN(4);
     __copy_table_start__ = .;
+
     LONG (__etext)
     LONG (__data_start__)
-    LONG (__data_end__ - __data_start__)
+    LONG ((__data_end__ - __data_start__) / 4)
+
     /* Add each additional data section here */
 /*
     LONG (__etext2)
     LONG (__data2_start__)
-    LONG (__data2_end__ - __data2_start__)
+    LONG ((__data2_end__ - __data2_start__) / 4)
 */
     __copy_table_end__ = .;
   } > FLASH
@@ -171,7 +173,7 @@ SECTIONS
     /* Add each additional bss section here */
 /*
     LONG (__bss2_start__)
-    LONG (__bss2_end__ - __bss2_start__)
+    LONG ((__bss2_end__ - __bss2_start__) / 4)
 */
     __zero_table_end__ = .;
   } > FLASH
@@ -203,7 +205,6 @@ SECTIONS
     KEEP(*(.init_array))
     PROVIDE_HIDDEN (__init_array_end = .);
 
-
     . = ALIGN(4);
     /* finit data */
     PROVIDE_HIDDEN (__fini_array_start = .);

Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S

@@ -1,11 +1,11 @@
 /**************************************************************************//**
  * @file     startup_ARMv8MML.S
  * @brief    CMSIS-Core(M) Device Startup File for ARMv8MML evice
- * @version  V2.0.1
- * @date     23. July 2019
+ * @version  V2.1.0
+ * @date     04. August 2020
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -87,12 +87,13 @@ Reset_Handler:
 .L_loop0:
                 cmp      r4, r5
                 bge      .L_loop0_done
-                ldr      r1, [r4]
-                ldr      r2, [r4, #4]
-                ldr      r3, [r4, #8]
+                ldr      r1, [r4]                /* source address */   
+                ldr      r2, [r4, #4]            /* destination address */
+                ldr      r3, [r4, #8]            /* word count */
+                lsl      r3, r3, #2              /* byte count */
 
 .L_loop0_0:
-                subs     r3, #4
+                subs     r3, #4                  /* decrement byte count */
                 ittt     ge
                 ldrge    r0, [r1, r3]
                 strge    r0, [r2, r3]
@@ -108,12 +109,13 @@ Reset_Handler:
 .L_loop2:
                 cmp      r3, r4
                 bge      .L_loop2_done
-                ldr      r1, [r3]
-                ldr      r2, [r3, #4]
+                ldr      r1, [r3]                /* destination address */
+                ldr      r2, [r3, #4]            /* word count */
+                lsl      r2, r2, #2              /* byte count */
                 movs     r0, 0
 
 .L_loop2_0:
-                subs     r2, #4
+                subs     r2, #4                  /* decrement byte count */
                 itt      ge
                 strge    r0, [r1, r2]
                 bge      .L_loop2_0