Docs: Updated documentation for release 5.3.0.

docs/Core/html/annotated.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -141,7 +141,7 @@ $(document).ready(function(){initNavTree('annotated.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/classes.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -144,7 +144,7 @@ $(document).ready(function(){initNavTree('classes.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/coreMISRA_Exceptions_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -162,7 +162,7 @@ $(document).ready(function(){initNavTree('coreMISRA_Exceptions_pg.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/core_revisionHistory.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -115,6 +115,9 @@ $(document).ready(function(){initNavTree('core_revisionHistory.html','');});
 <tr>
 <th>Version </th><th>Description  </th></tr>
 <tr>
+<td>V5.1.1 </td><td>Aligned MSPLIM and PSPLIM access functions along supported compilers.<br/>
+   </td></tr>
+<tr>
 <td>V5.1.0 </td><td>Added MPU Functions for ARMv8-M for Cortex-M23/M33.<br/>
  Moved __SSAT and __USAT intrinsics to CMSIS-Core.<br/>
  Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers.<br/>
@@ -124,7 +127,7 @@ $(document).ready(function(){initNavTree('core_revisionHistory.html','');});
  Added macros <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a>.<br/>
  Deprecated macro <a class="el" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>.<br/>
  Changed <a class="el" href="group__version__control__gr.html">Version Control</a> macros to be core agnostic. <br/>
- Added <a class="el" href="group__mpu__functions.html">MPU Functions for ARMv7-M</a> for Cortex-M0+/M3/M4/M7.   </td></tr>
+ Added <a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a> for Cortex-M0+/M3/M4/M7.   </td></tr>
 <tr>
 <td>V5.0.1 </td><td>Added: macro <a class="el" href="group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a>. <br/>
  Added: uVisor support. <br/>
@@ -174,7 +177,7 @@ Beta 1 </td><td>Renamed: cmsis_armcc_V6.h to cmsis_armclang.h.<br/>
 <td>V4.30 </td><td>Corrected: DoxyGen function parameter comments.<br/>
  Corrected: IAR toolchain: removed for <a class="el" href="group__NVIC__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">NVIC_SystemReset</a> the attribute(noreturn).<br/>
  Corrected: GCC toolchain: suppressed irrelevant compiler warnings.<br/>
- Added: Support files for ARM Compiler v6 (cmsis_armcc_v6.h).   </td></tr>
+ Added: Support files for Arm Compiler v6 (cmsis_armcc_v6.h).   </td></tr>
 <tr>
 <td>V4.20 </td><td>Corrected: MISRA-C:2004 violations. <br/>
  Corrected: predefined macro for TI CCS Compiler. <br/>
@@ -251,7 +254,7 @@ Beta 1 </td><td>Renamed: cmsis_armcc_V6.h to cmsis_armclang.h.<br/>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:57 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/deprecated.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -128,7 +128,7 @@ $(document).ready(function(){initNavTree('deprecated.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/device_h_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -387,10 +387,10 @@ Device.h Template File</h1>
  * @brief    CMSIS Cortex-M# Core Peripheral Access Layer Header File for
  *           Device &lt;Device&gt;
  * @version  V5.00
- * @date     02. March 2016
+ * @date     10. January 2018
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -475,7 +475,7 @@ typedef enum IRQn
 /* ================                           Processor and Core Peripheral Section                           ================ */
 /* =========================================================================================================================== */
 
-/* ===========================  Configuration of the ARM Cortex-M4 Processor and Core Peripherals  =========================== */
+/* ===========================  Configuration of the Arm Cortex-M4 Processor and Core Peripherals  =========================== */
 /* ToDo: set the defines according your Device */
 /* ToDo: define the correct core revision
          __CM0_REV if your device is a Cortex-M0 device
@@ -503,7 +503,7 @@ typedef enum IRQn
          core_cm3.h if your device is a CORTEX-M3 device
          core_cm4.h if your device is a CORTEX-M4 device
          core_cm7.h if your device is a CORTEX-M4 device */
-#include &lt;core_cm#.h&gt;                           /*!&lt; ARM Cortex-M# processor and core peripherals */
+#include &lt;core_cm#.h&gt;                           /*!&lt; Arm Cortex-M# processor and core peripherals */
 /* ToDo: include your system_&lt;Device&gt;.h file
          replace '&lt;Device&gt;' with your device name */
 #include "system_&lt;Device&gt;.h"                    /*!&lt; &lt;Device&gt; System */
@@ -643,7 +643,7 @@ typedef struct
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -202,6 +202,18 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>CFSR
 : <a class="el" href="structSCB__Type.html#a0cda9e061b42373383418663092ad19a">SCB_Type</a>
 </li>
+<li>CID0
+: <a class="el" href="structITM__Type.html#a30bb2b166b1723867da4a708935677ba">ITM_Type</a>
+</li>
+<li>CID1
+: <a class="el" href="structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f">ITM_Type</a>
+</li>
+<li>CID2
+: <a class="el" href="structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d">ITM_Type</a>
+</li>
+<li>CID3
+: <a class="el" href="structITM__Type.html#a43451f43f514108d9eaed5b017f8d921">ITM_Type</a>
+</li>
 <li>CLAIMCLR
 : <a class="el" href="structTPI__Type.html#a0e10e292cb019a832b03ddd055b2f6ac">TPI_Type</a>
 </li>
@@ -253,6 +265,9 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>DEMCR
 : <a class="el" href="structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a>
 </li>
+<li>DEVARCH
+: <a class="el" href="structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537">ITM_Type</a>
+</li>
 <li>DEVID
 : <a class="el" href="structTPI__Type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a>
 </li>
@@ -347,9 +362,15 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>ICTR
 : <a class="el" href="structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a>
 </li>
+<li>IMCR
+: <a class="el" href="structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0">ITM_Type</a>
+</li>
 <li>IP
 : <a class="el" href="structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a>
 </li>
+<li>IRR
+: <a class="el" href="structITM__Type.html#a66eb82a070953f09909f39b8e516fb91">ITM_Type</a>
+</li>
 <li>ISAR
 : <a class="el" href="structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a>
 </li>
@@ -375,13 +396,22 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>ITCTRL
 : <a class="el" href="structTPI__Type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a>
 </li>
+<li>IWR
+: <a class="el" href="structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94">ITM_Type</a>
+</li>
 </ul>
 
 
 <h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
+<li>LAR
+: <a class="el" href="structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5">ITM_Type</a>
+</li>
 <li>LOAD
 : <a class="el" href="structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a>
 </li>
+<li>LSR
+: <a class="el" href="structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8">ITM_Type</a>
+</li>
 <li>LSUCNT
 : <a class="el" href="structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a>
 </li>
@@ -434,8 +464,32 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>PFR
 : <a class="el" href="structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a>
 </li>
+<li>PID0
+: <a class="el" href="structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a">ITM_Type</a>
+</li>
+<li>PID1
+: <a class="el" href="structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4">ITM_Type</a>
+</li>
+<li>PID2
+: <a class="el" href="structITM__Type.html#a8471c4d77b7107cf580587509da69f38">ITM_Type</a>
+</li>
+<li>PID3
+: <a class="el" href="structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3">ITM_Type</a>
+</li>
+<li>PID4
+: <a class="el" href="structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158">ITM_Type</a>
+</li>
+<li>PID5
+: <a class="el" href="structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37">ITM_Type</a>
+</li>
+<li>PID6
+: <a class="el" href="structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6">ITM_Type</a>
+</li>
+<li>PID7
+: <a class="el" href="structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d">ITM_Type</a>
+</li>
 <li>PORT
-: <a class="el" href="structITM__Type.html#af4c205be465780a20098387120bdb482">ITM_Type</a>
+: <a class="el" href="structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e">ITM_Type</a>
 </li>
 </ul>
 
@@ -478,7 +532,6 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <li>RESERVED0
 : <a class="el" href="structDWT__Type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a>
 , <a class="el" href="structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a>
-, <a class="el" href="structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e">ITM_Type</a>
 , <a class="el" href="structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a>
 , <a class="el" href="structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a>
 , <a class="el" href="structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a>
@@ -486,12 +539,10 @@ $(document).ready(function(){initNavTree('functions.html','');});
 </li>
 <li>RESERVED1
 : <a class="el" href="structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a>
-, <a class="el" href="structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce">ITM_Type</a>
 , <a class="el" href="structTPI__Type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a>
 </li>
 <li>RESERVED2
 : <a class="el" href="structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a>
-, <a class="el" href="structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">ITM_Type</a>
 , <a class="el" href="structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a>
 , <a class="el" href="structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a>
 </li>
@@ -617,7 +668,7 @@ $(document).ready(function(){initNavTree('functions.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/functions_vars.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -202,6 +202,18 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>CFSR
 : <a class="el" href="structSCB__Type.html#a0cda9e061b42373383418663092ad19a">SCB_Type</a>
 </li>
+<li>CID0
+: <a class="el" href="structITM__Type.html#a30bb2b166b1723867da4a708935677ba">ITM_Type</a>
+</li>
+<li>CID1
+: <a class="el" href="structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f">ITM_Type</a>
+</li>
+<li>CID2
+: <a class="el" href="structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d">ITM_Type</a>
+</li>
+<li>CID3
+: <a class="el" href="structITM__Type.html#a43451f43f514108d9eaed5b017f8d921">ITM_Type</a>
+</li>
 <li>CLAIMCLR
 : <a class="el" href="structTPI__Type.html#a0e10e292cb019a832b03ddd055b2f6ac">TPI_Type</a>
 </li>
@@ -253,6 +265,9 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>DEMCR
 : <a class="el" href="structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a>
 </li>
+<li>DEVARCH
+: <a class="el" href="structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537">ITM_Type</a>
+</li>
 <li>DEVID
 : <a class="el" href="structTPI__Type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a>
 </li>
@@ -347,9 +362,15 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>ICTR
 : <a class="el" href="structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a>
 </li>
+<li>IMCR
+: <a class="el" href="structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0">ITM_Type</a>
+</li>
 <li>IP
 : <a class="el" href="structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a>
 </li>
+<li>IRR
+: <a class="el" href="structITM__Type.html#a66eb82a070953f09909f39b8e516fb91">ITM_Type</a>
+</li>
 <li>ISAR
 : <a class="el" href="structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a>
 </li>
@@ -375,13 +396,22 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>ITCTRL
 : <a class="el" href="structTPI__Type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a>
 </li>
+<li>IWR
+: <a class="el" href="structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94">ITM_Type</a>
+</li>
 </ul>
 
 
 <h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
+<li>LAR
+: <a class="el" href="structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5">ITM_Type</a>
+</li>
 <li>LOAD
 : <a class="el" href="structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a>
 </li>
+<li>LSR
+: <a class="el" href="structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8">ITM_Type</a>
+</li>
 <li>LSUCNT
 : <a class="el" href="structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a>
 </li>
@@ -434,8 +464,32 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>PFR
 : <a class="el" href="structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a>
 </li>
+<li>PID0
+: <a class="el" href="structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a">ITM_Type</a>
+</li>
+<li>PID1
+: <a class="el" href="structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4">ITM_Type</a>
+</li>
+<li>PID2
+: <a class="el" href="structITM__Type.html#a8471c4d77b7107cf580587509da69f38">ITM_Type</a>
+</li>
+<li>PID3
+: <a class="el" href="structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3">ITM_Type</a>
+</li>
+<li>PID4
+: <a class="el" href="structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158">ITM_Type</a>
+</li>
+<li>PID5
+: <a class="el" href="structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37">ITM_Type</a>
+</li>
+<li>PID6
+: <a class="el" href="structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6">ITM_Type</a>
+</li>
+<li>PID7
+: <a class="el" href="structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d">ITM_Type</a>
+</li>
 <li>PORT
-: <a class="el" href="structITM__Type.html#af4c205be465780a20098387120bdb482">ITM_Type</a>
+: <a class="el" href="structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e">ITM_Type</a>
 </li>
 </ul>
 
@@ -478,7 +532,6 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <li>RESERVED0
 : <a class="el" href="structDWT__Type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a>
 , <a class="el" href="structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a>
-, <a class="el" href="structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e">ITM_Type</a>
 , <a class="el" href="structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a>
 , <a class="el" href="structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a>
 , <a class="el" href="structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a>
@@ -486,12 +539,10 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 </li>
 <li>RESERVED1
 : <a class="el" href="structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a>
-, <a class="el" href="structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce">ITM_Type</a>
 , <a class="el" href="structTPI__Type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a>
 </li>
 <li>RESERVED2
 : <a class="el" href="structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a>
-, <a class="el" href="structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">ITM_Type</a>
 , <a class="el" href="structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a>
 , <a class="el" href="structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a>
 </li>
@@ -617,7 +668,7 @@ $(document).ready(function(){initNavTree('functions_vars.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -675,7 +675,7 @@ $(document).ready(function(){initNavTree('globals.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_a.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -174,7 +174,7 @@ $(document).ready(function(){initNavTree('globals_a.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_b.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_b.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_c.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -150,7 +150,7 @@ $(document).ready(function(){initNavTree('globals_c.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_d.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_d.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_defs.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -246,7 +246,7 @@ $(document).ready(function(){initNavTree('globals_defs.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:46 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_enum.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -127,7 +127,7 @@ $(document).ready(function(){initNavTree('globals_enum.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:46 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_eval.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -160,7 +160,7 @@ $(document).ready(function(){initNavTree('globals_eval.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:46 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -580,7 +580,7 @@ $(document).ready(function(){initNavTree('globals_func.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func_a.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -154,7 +154,7 @@ $(document).ready(function(){initNavTree('globals_func_a.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func_i.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -145,7 +145,7 @@ $(document).ready(function(){initNavTree('globals_func_i.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func_n.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -193,7 +193,7 @@ $(document).ready(function(){initNavTree('globals_func_n.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func_s.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -181,7 +181,7 @@ $(document).ready(function(){initNavTree('globals_func_s.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_func_t.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -196,7 +196,7 @@ $(document).ready(function(){initNavTree('globals_func_t.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:46 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_h.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_h.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_i.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -159,7 +159,7 @@ $(document).ready(function(){initNavTree('globals_i.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_m.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_m.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_n.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -204,7 +204,7 @@ $(document).ready(function(){initNavTree('globals_n.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_p.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -150,7 +150,7 @@ $(document).ready(function(){initNavTree('globals_p.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_s.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -201,7 +201,7 @@ $(document).ready(function(){initNavTree('globals_s.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_t.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -204,7 +204,7 @@ $(document).ready(function(){initNavTree('globals_t.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_u.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_u.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_vars.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -130,7 +130,7 @@ $(document).ready(function(){initNavTree('globals_vars.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:46 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/globals_w.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -147,7 +147,7 @@ $(document).ready(function(){initNavTree('globals_w.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__Core__Register__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -186,16 +186,16 @@ Functions</h2></td></tr>
 <tr class="memdesc:ga9d174f979b2f76fdb3228a9b338fd939"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga9d174f979b2f76fdb3228a9b338fd939">More...</a><br/></td></tr>
 <tr class="separator:ga9d174f979b2f76fdb3228a9b338fd939"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga8b226929264e903c7019e326b42bef47"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga8b226929264e903c7019e326b42bef47">__get_PSPLIM</a> (void)</td></tr>
-<tr class="memdesc:ga8b226929264e903c7019e326b42bef47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit.  <a href="#ga8b226929264e903c7019e326b42bef47">More...</a><br/></td></tr>
+<tr class="memdesc:ga8b226929264e903c7019e326b42bef47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode.  <a href="#ga8b226929264e903c7019e326b42bef47">More...</a><br/></td></tr>
 <tr class="separator:ga8b226929264e903c7019e326b42bef47"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga4348d14fc5eefbfd34ab8c51be44a81b">__set_PSPLIM</a> (uint32_t ProcStackPtrLimit)</td></tr>
-<tr class="memdesc:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer Limit.  <a href="#ga4348d14fc5eefbfd34ab8c51be44a81b">More...</a><br/></td></tr>
+<tr class="memdesc:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode.  <a href="#ga4348d14fc5eefbfd34ab8c51be44a81b">More...</a><br/></td></tr>
 <tr class="separator:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gaf39856ca50fc88cf459031b44eb2521c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gaf39856ca50fc88cf459031b44eb2521c">__get_MSPLIM</a> (void)</td></tr>
-<tr class="memdesc:gaf39856ca50fc88cf459031b44eb2521c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit.  <a href="#gaf39856ca50fc88cf459031b44eb2521c">More...</a><br/></td></tr>
+<tr class="memdesc:gaf39856ca50fc88cf459031b44eb2521c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode.  <a href="#gaf39856ca50fc88cf459031b44eb2521c">More...</a><br/></td></tr>
 <tr class="separator:gaf39856ca50fc88cf459031b44eb2521c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga6809a07c5cb7410e361f3fba57f72172"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga6809a07c5cb7410e361f3fba57f72172">__set_MSPLIM</a> (uint32_t MainStackPtrLimit)</td></tr>
-<tr class="memdesc:ga6809a07c5cb7410e361f3fba57f72172"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit.  <a href="#ga6809a07c5cb7410e361f3fba57f72172">More...</a><br/></td></tr>
+<tr class="memdesc:ga6809a07c5cb7410e361f3fba57f72172"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode.  <a href="#ga6809a07c5cb7410e361f3fba57f72172">More...</a><br/></td></tr>
 <tr class="separator:ga6809a07c5cb7410e361f3fba57f72172"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
@@ -629,7 +629,7 @@ Physically two different stack pointers (SP) exist:</p>
 </div><div class="memdoc">
 <p>Returns the current value of the Main Stack Pointer Limit (MSPLIM). </p>
 <dl class="section return"><dt>Returns</dt><dd>MSPLIM Register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -717,7 +717,7 @@ Physically two different stack pointers (SP) exist:</p>
 </div><div class="memdoc">
 <p>Returns the current value of the Process Stack Pointer Limit (PSPLIM). </p>
 <dl class="section return"><dt>Returns</dt><dd>PSPLIM Register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1155,7 +1155,7 @@ Physically two different stack pointers (SP) exist:</p>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1265,7 +1265,7 @@ Physically two different stack pointers (SP) exist:</p>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1274,7 +1274,7 @@ Physically two different stack pointers (SP) exist:</p>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__Dcache__functions__m7.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -344,7 +344,7 @@ After reset, you must invalidate (<a class="el" href="group__Dcache__functions__
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__ITM__Debug__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -266,7 +266,7 @@ Example:</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__Icache__functions__m7.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -191,7 +191,7 @@ After reset, you must invalidate (<a class="el" href="group__Icache__functions__
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__NVIC__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -221,13 +221,13 @@ Functions</h2></td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>This section explains how to use interrupts and exceptions and access functions for the Nested Vector Interrupt Controller (NVIC).</p>
-<p>ARM provides a template file <b>startup_<em>device</em></b> for each supported compiler. The file must be adapted by the silicon vendor to include interrupt vectors for all device-specific interrupt handlers. Each interrupt handler is defined as a <b><em>weak</em></b> function to an dummy handler. These interrupt handlers can be used directly in application software without being adapted by the programmer.</p>
+<p>Arm provides a template file <b>startup_<em>device</em></b> for each supported compiler. The file must be adapted by the silicon vendor to include interrupt vectors for all device-specific interrupt handlers. Each interrupt handler is defined as a <b><em>weak</em></b> function to an dummy handler. These interrupt handlers can be used directly in application software without being adapted by the programmer.</p>
 <p>The table below lists the core exception vectors of the various Cortex-M processors.</p>
 <table  class="cmtable" summary="Core Exception Name">
 <tr>
 <th>Exception Vector </th><th>IRQn<br/>
-Value </th><th>M0 </th><th>M0+ </th><th>M3 </th><th>M4 </th><th>M7 </th><th>SC000 </th><th>SC300 </th><th>ARMv8-M<br/>
-Baseline </th><th>ARMv8-M<br/>
+Value </th><th>M0 </th><th>M0+ </th><th>M3 </th><th>M4 </th><th>M7 </th><th>SC000 </th><th>SC300 </th><th>Armv8-M<br/>
+Baseline </th><th>Armv8-M<br/>
 Mainline </th><th>Description  </th></tr>
 <tr>
 <td><b>NonMaskableInt_IRQn</b> </td><td>-14 </td><td><div class="image">
@@ -453,14 +453,14 @@ Mainline </th><th>Description  </th></tr>
 </table>
 <h1>Vector Table </h1>
 <p>The Vector Table defines the entry addresses of the processor exceptions and the device specific interrupts. It is typically located at the beginning of the program memory, however <a class="el" href="using_VTOR_pg.html">Using Interrupt Vector Remap</a> it can be relocated to RAM. The symbol <b>__Vectors</b> is the address of the vector table in the startup code and the register <b>SCB-&gt;VTOR</b> holds the start address of the vector table.</p>
-<p>An ARMv8-M implementation with TrustZone provides two vector tables:</p>
+<p>An Armv8-M implementation with TrustZone provides two vector tables:</p>
 <ul>
 <li>vector table for Secure handlers</li>
 <li>vector table for Non-Secure handlers</li>
 </ul>
 <p>Refer to <a class="el" href="using_TrustZone_pg.html#Model_TrustZone">Programmers Model with TrustZone</a> for more information.</p>
 <h2>Processor Exceptions </h2>
-<p>At the beginning of the vector table, the initial stack value and the exception vectors of the processor are defined. The vector table below shows the exception vectors of a ARMv8-M Mainline processor. Other processor variants may have fewer vectors.</p>
+<p>At the beginning of the vector table, the initial stack value and the exception vectors of the processor are defined. The vector table below shows the exception vectors of a Armv8-M Mainline processor. Other processor variants may have fewer vectors.</p>
 <div class="fragment"><div class="line">__Vectors       DCD     __initial_sp              ; Top of Stack initialization</div>
 <div class="line">                DCD     Reset_Handler             ; Reset Handler</div>
 <div class="line">                DCD     NMI_Handler               ; NMI Handler</div>
@@ -655,7 +655,7 @@ Mainline </th><th>Description  </th></tr>
 <p>Exception 6: Usage Fault Interrupt [not on Cortex-M0 variants]. </p>
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a9cda5594d898247bfa9d16ad966724da"></a>SecureFault_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 7: Secure Fault Interrupt [only on ARMv8-M]. </p>
+<p>Exception 7: Secure Fault Interrupt [only on Armv8-M]. </p>
 </td></tr>
 <tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237"></a>SVCall_IRQn</em>&#160;</td><td class="fielddoc">
 <p>Exception 11: SV Call Interrupt. </p>
@@ -740,7 +740,7 @@ Mainline </th><th>Description  </th></tr>
 </ul>
 </dd></dl>
 <dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for ARMv8-M in secure state.</li>
+<li>Only available for Armv8-M in secure state.</li>
 </ul>
 </dd></dl>
 <dl class="section see"><dt>See Also</dt><dd><ul>
@@ -1135,7 +1135,7 @@ Mainline </th><th>Description  </th></tr>
 </ul>
 </dd></dl>
 <dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for ARMv8-M in secure state.</li>
+<li>Only available for Armv8-M in secure state.</li>
 </ul>
 </dd></dl>
 <dl class="section see"><dt>See Also</dt><dd><ul>
@@ -1327,7 +1327,7 @@ Mainline </th><th>Description  </th></tr>
 </ul>
 </dd></dl>
 <dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for ARMv8-M in secure state.</li>
+<li>Only available for Armv8-M in secure state.</li>
 </ul>
 </dd></dl>
 <dl class="section see"><dt>See Also</dt><dd><ul>
@@ -1413,7 +1413,7 @@ Mainline </th><th>Description  </th></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__SysTick__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -180,7 +180,7 @@ Code Example</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__cache__functions__m7.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -140,7 +140,7 @@ Content</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__compiler__conntrol__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -120,19 +120,19 @@ $(document).ready(function(){initNavTree('group__compiler__conntrol__gr.html',''
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
 Macros</h2></td></tr>
 <tr class="memitem:ga8be4ebde5d4dd91b161d206545ce59aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga8be4ebde5d4dd91b161d206545ce59aa">__ARM_ARCH_6M__</a></td></tr>
-<tr class="memdesc:ga8be4ebde5d4dd91b161d206545ce59aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for ARMv6-M (Cortex-M0, Cortex-M1)  <a href="#ga8be4ebde5d4dd91b161d206545ce59aa">More...</a><br/></td></tr>
+<tr class="memdesc:ga8be4ebde5d4dd91b161d206545ce59aa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for Armv6-M (Cortex-M0, Cortex-M1)  <a href="#ga8be4ebde5d4dd91b161d206545ce59aa">More...</a><br/></td></tr>
 <tr class="separator:ga8be4ebde5d4dd91b161d206545ce59aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga43e1af8bedda108dfc4f8584e6b278a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga43e1af8bedda108dfc4f8584e6b278a2">__ARM_ARCH_7M__</a></td></tr>
-<tr class="memdesc:ga43e1af8bedda108dfc4f8584e6b278a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for ARMv7-M (Cortex-M3)  <a href="#ga43e1af8bedda108dfc4f8584e6b278a2">More...</a><br/></td></tr>
+<tr class="memdesc:ga43e1af8bedda108dfc4f8584e6b278a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for Armv7-M (Cortex-M3)  <a href="#ga43e1af8bedda108dfc4f8584e6b278a2">More...</a><br/></td></tr>
 <tr class="separator:ga43e1af8bedda108dfc4f8584e6b278a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga43ab3e79ec5ecb615f1f2f6e83e7d48a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga43ab3e79ec5ecb615f1f2f6e83e7d48a">__ARM_ARCH_7EM__</a></td></tr>
-<tr class="memdesc:ga43ab3e79ec5ecb615f1f2f6e83e7d48a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for ARMv7-M (Cortex-M4) with FPU.  <a href="#ga43ab3e79ec5ecb615f1f2f6e83e7d48a">More...</a><br/></td></tr>
+<tr class="memdesc:ga43ab3e79ec5ecb615f1f2f6e83e7d48a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for Armv7-M (Cortex-M4) with FPU.  <a href="#ga43ab3e79ec5ecb615f1f2f6e83e7d48a">More...</a><br/></td></tr>
 <tr class="separator:ga43ab3e79ec5ecb615f1f2f6e83e7d48a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a">__ARM_ARCH_8M_BASE__</a></td></tr>
-<tr class="memdesc:gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for ARMv8-M Baseline.  <a href="#gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a">More...</a><br/></td></tr>
+<tr class="memdesc:gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for Armv8-M Baseline.  <a href="#gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a">More...</a><br/></td></tr>
 <tr class="separator:gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gad424c7143edd08c982dddad0ff65f4cd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gad424c7143edd08c982dddad0ff65f4cd">__ARM_ARCH_8M_MAIN__</a></td></tr>
-<tr class="memdesc:gad424c7143edd08c982dddad0ff65f4cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for ARMv8-M Mainline.  <a href="#gad424c7143edd08c982dddad0ff65f4cd">More...</a><br/></td></tr>
+<tr class="memdesc:gad424c7143edd08c982dddad0ff65f4cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 when generating code for Armv8-M Mainline.  <a href="#gad424c7143edd08c982dddad0ff65f4cd">More...</a><br/></td></tr>
 <tr class="separator:gad424c7143edd08c982dddad0ff65f4cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga1378040bcf22428955c6e3ce9c2053cd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga1378040bcf22428955c6e3ce9c2053cd">__ASM</a></td></tr>
 <tr class="memdesc:ga1378040bcf22428955c6e3ce9c2053cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pass information from the compiler to the assembler.  <a href="#ga1378040bcf22428955c6e3ce9c2053cd">More...</a><br/></td></tr>
@@ -205,7 +205,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>The <b>#define <b>ARM_ARCH_6M</b></b> is set to 1 when generating code for the ARMv6-M architecture. This architecture is for example used by the Cortex-M0, Cortex-M0+, and Cortex-M1 processor. </p>
+<p>The <b>#define <b>ARM_ARCH_6M</b></b> is set to 1 when generating code for the Armv6-M architecture. This architecture is for example used by the Cortex-M0, Cortex-M0+, and Cortex-M1 processor. </p>
 
 </div>
 </div>
@@ -218,7 +218,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>The <b>#define <b>ARM_ARCH_7EM</b></b> is set to 1 when generating code for the ARMv7-M architecture with floating point extension. This architecture is for example used by the Cortex-M4 processor with FPU </p>
+<p>The <b>#define <b>ARM_ARCH_7EM</b></b> is set to 1 when generating code for the Armv7-M architecture with floating point extension. This architecture is for example used by the Cortex-M4 processor with FPU </p>
 
 </div>
 </div>
@@ -231,7 +231,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>The <b>#define <b>ARM_ARCH_7M</b></b> is set to 1 when generating code for the ARMv7-M architecture. This architecture is for example used by the Cortex-M3 processor. </p>
+<p>The <b>#define <b>ARM_ARCH_7M</b></b> is set to 1 when generating code for the Armv7-M architecture. This architecture is for example used by the Cortex-M3 processor. </p>
 
 </div>
 </div>
@@ -244,7 +244,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>The <b>#define <b>ARM_ARCH_8M_BASE</b></b> is set to 1 when generating code for the ARMv8-M architecture baseline variant. </p>
+<p>The <b>#define <b>ARM_ARCH_8M_BASE</b></b> is set to 1 when generating code for the Armv8-M architecture baseline variant. </p>
 
 </div>
 </div>
@@ -257,7 +257,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>The <b>#define <b>ARM_ARCH_8M_MAIN</b></b> is set to 1 when generating code for the ARMv8-M architecture mainline variant. </p>
+<p>The <b>#define <b>ARM_ARCH_8M_MAIN</b></b> is set to 1 when generating code for the Armv8-M architecture mainline variant. </p>
 
 </div>
 </div>
@@ -390,7 +390,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying ARM processor core and compiler settings.</p>
+<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line">uint16_t val16;</div>
 <div class="line"> </div>
@@ -409,7 +409,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying ARM processor core and compiler settings.</p>
+<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line">uint16_t val16 = 0U;</div>
 <div class="line"> </div>
@@ -429,7 +429,7 @@ Macros</h2></td></tr>
       </table>
 </div><div class="memdoc">
 <dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000004">Deprecated:</a></b></dt><dd>Do not use this macro. It has been superseded by <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</dd></dl>
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read/write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying ARM processor core and compiler settings.</p>
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read/write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32;</div>
 <div class="line"> </div>
@@ -448,7 +448,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying ARM processor core and compiler settings.</p>
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32;</div>
 <div class="line"> </div>
@@ -467,7 +467,7 @@ Macros</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying ARM processor core and compiler settings.</p>
+<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
 <p><b> Code Example:</b> </p>
 <div class="fragment"><div class="line">uint32_t val32 = 0U;</div>
 <div class="line"> </div>
@@ -521,7 +521,7 @@ Macros</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__context__trustzone__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,11 +110,11 @@ $(document).ready(function(){initNavTree('group__context__trustzone__functions.h
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">RTOS Context Management<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for ARMv8-M</a></div></div>  </div>
+<div class="title">RTOS Context Management<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>RTOS Thread Context Management for ARMv8-M TrustZone.  
+<p>RTOS Thread Context Management for Armv8-M TrustZone.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
@@ -259,7 +259,7 @@ value 0 no memory available or internal error </dd></dl>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__coreregister__trustzone__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,11 +110,11 @@ $(document).ready(function(){initNavTree('group__coreregister__trustzone__functi
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">Core Register Access Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for ARMv8-M</a></div></div>  </div>
+<div class="title">Core Register Access Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>Core register Access functions related to TrustZone for ARMv8-M.  
+<p>Core register Access functions related to TrustZone for Armv8-M.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
@@ -162,16 +162,16 @@ Functions</h2></td></tr>
 <tr class="memdesc:ga4f0912db7bc65439d23817c1d372a7a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Fault Mask (non-secure)  <a href="#ga4f0912db7bc65439d23817c1d372a7a4">More...</a><br/></td></tr>
 <tr class="separator:ga4f0912db7bc65439d23817c1d372a7a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga5da646ec291b6a183f38497ce92be51c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga5da646ec291b6a183f38497ce92be51c">__TZ_get_PSPLIM_NS</a> (void)</td></tr>
-<tr class="memdesc:ga5da646ec291b6a183f38497ce92be51c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit (non-secure)  <a href="#ga5da646ec291b6a183f38497ce92be51c">More...</a><br/></td></tr>
+<tr class="memdesc:ga5da646ec291b6a183f38497ce92be51c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#ga5da646ec291b6a183f38497ce92be51c">More...</a><br/></td></tr>
 <tr class="separator:ga5da646ec291b6a183f38497ce92be51c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga81e0995ee0fd2a9dcd9e9681bc22c76f">__TZ_set_PSPLIM_NS</a> (uint32_t ProcStackPtrLimit)</td></tr>
-<tr class="memdesc:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer (non-secure)  <a href="#ga81e0995ee0fd2a9dcd9e9681bc22c76f">More...</a><br/></td></tr>
+<tr class="memdesc:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#ga81e0995ee0fd2a9dcd9e9681bc22c76f">More...</a><br/></td></tr>
 <tr class="separator:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gada00853d3e49fa8d21f375c53d28fa51"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gada00853d3e49fa8d21f375c53d28fa51">__TZ_get_MSPLIM_NS</a> (void)</td></tr>
-<tr class="memdesc:gada00853d3e49fa8d21f375c53d28fa51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit (non-secure)  <a href="#gada00853d3e49fa8d21f375c53d28fa51">More...</a><br/></td></tr>
+<tr class="memdesc:gada00853d3e49fa8d21f375c53d28fa51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#gada00853d3e49fa8d21f375c53d28fa51">More...</a><br/></td></tr>
 <tr class="separator:gada00853d3e49fa8d21f375c53d28fa51"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:gad2013f4d4311d6db253594a12d192617"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gad2013f4d4311d6db253594a12d192617">__TZ_set_MSPLIM_NS</a> (uint32_t MainStackPtrLimit)</td></tr>
-<tr class="memdesc:gad2013f4d4311d6db253594a12d192617"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit (non-secure)  <a href="#gad2013f4d4311d6db253594a12d192617">More...</a><br/></td></tr>
+<tr class="memdesc:gad2013f4d4311d6db253594a12d192617"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#gad2013f4d4311d6db253594a12d192617">More...</a><br/></td></tr>
 <tr class="separator:gad2013f4d4311d6db253594a12d192617"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
@@ -279,7 +279,6 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <p>Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. </p>
 <dl class="section return"><dt>Returns</dt><dd>MSPLIM register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
 
 </div>
 </div>
@@ -342,7 +341,6 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <p>Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. </p>
 <dl class="section return"><dt>Returns</dt><dd>PSPLIM register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
 
 </div>
 </div>
@@ -492,7 +490,6 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
 
 </div>
 </div>
@@ -570,7 +567,6 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
 
 </div>
 </div>
@@ -602,7 +598,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__fpu__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -124,7 +124,7 @@ Functions</h2></td></tr>
 <tr class="separator:ga6bcad99ce80a0e7e4ddc6f2379081756"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Some Cortex-M processors include optional floating-point arithmetic functionality, with support for single and double-precision arithmetic. The Cortex-M processor with FPU is an implementation of the single-precision and double-precision variant of the ARMv7-M Architecture with Floating-Point Extension (FPv5). </p>
+<p>Some Cortex-M processors include optional floating-point arithmetic functionality, with support for single and double-precision arithmetic. The Cortex-M processor with FPU is an implementation of the single-precision and double-precision variant of the Armv7-M Architecture with Floating-Point Extension (FPv5). </p>
 <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="ga6bcad99ce80a0e7e4ddc6f2379081756"></a>
 <div class="memitem">
@@ -154,7 +154,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__intrinsic__CPU__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -248,7 +248,7 @@ Functions</h2></td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
 <p>The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the <a class="el" href="index.html#ref_man_sec">Cortex-M Reference Manuals</a> for detailed information about these Cortex-M instructions.</p>
-<dl class="section note"><dt>Note</dt><dd>When using the ARM Compiler Toolchain the following <a class="el" href="group__intrinsic__CPU__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler: <a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a>, &lt;Bruno: add more...&gt;. The usage of the Embedded Assembler can be disabled by with <b><em>define __NO_EMBEDDED_ASM</em></b>. This avoids potential side effects of the Embedded Assembler. Refer to <b>Compiler User Guide - Using the Inline and Embedded Assemblers of the ARM Compiler</b> for more information. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>When using the Arm Compiler Toolchain the following <a class="el" href="group__intrinsic__CPU__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler: <a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a>, &lt;Bruno: add more...&gt;. The usage of the Embedded Assembler can be disabled by with <b><em>define __NO_EMBEDDED_ASM</em></b>. This avoids potential side effects of the Embedded Assembler. Refer to <b>Compiler User Guide - Using the Inline and Embedded Assemblers of the Arm Compiler</b> for more information. </dd></dl>
 <h2 class="groupheader">Function Documentation</h2>
 <a class="anchor" id="ga92f5621626711931da71eaa8bf301af7"></a>
 <div class="memitem">
@@ -304,7 +304,7 @@ Functions</h2></td></tr>
       </table>
 </div><div class="memdoc">
 <p>This function counts the number of leading zeros of a data value.</p>
-<p>On ARMv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __CLZ is implemented in software.</p>
+<p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __CLZ is implemented in software.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to count the leading zeros </td></tr>
@@ -387,7 +387,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -412,7 +412,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -437,7 +437,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -462,7 +462,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -487,7 +487,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -512,7 +512,7 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -914,7 +914,7 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -949,7 +949,7 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -987,7 +987,7 @@ Functions</h2></td></tr>
 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
 <dd>
 1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1025,7 +1025,7 @@ Functions</h2></td></tr>
 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
 <dd>
 1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1063,7 +1063,7 @@ Functions</h2></td></tr>
 <dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
 <dd>
 1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1098,7 +1098,7 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only availabe for ARMv8-M Architecture. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only availabe for Armv8-M Architecture. </dd></dl>
 
 </div>
 </div>
@@ -1406,7 +1406,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__intrinsic__SIMD__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -3114,7 +3114,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__mpu__defines.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,7 +110,7 @@ $(document).ready(function(){initNavTree('group__mpu__defines.html','');});
   <div class="summary">
 <a href="#define-members">Macros</a>  </div>
   <div class="headertitle">
-<div class="title">Define values<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for ARMv7-M</a></div></div>  </div>
+<div class="title">Define values<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -237,7 +237,7 @@ Macros</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__mpu__functions.html

@@ -3,8 +3,8 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>MPU Functions for ARMv7-M</title>
-<title>CMSIS-Core (Cortex-M): MPU Functions for ARMv7-M</title>
+<title>MPU Functions for Armv7-M</title>
+<title>CMSIS-Core (Cortex-M): MPU Functions for Armv7-M</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
 <link href="cmsis.css" rel="stylesheet" type="text/css" />
 <script type="text/javascript" src="jquery.js"></script>
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -113,7 +113,7 @@ $(document).ready(function(){initNavTree('group__mpu__functions.html','');});
 <a href="#define-members">Macros</a> &#124;
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">MPU Functions for ARMv7-M</div>  </div>
+<div class="title">MPU Functions for Armv7-M</div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -506,7 +506,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__nvic__trustzone__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,11 +110,11 @@ $(document).ready(function(){initNavTree('group__nvic__trustzone__functions.html
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">NVIC Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for ARMv8-M</a></div></div>  </div>
+<div class="title">NVIC Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for ARMv8-M.  
+<p>Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
@@ -369,7 +369,7 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <p>Reads the priority grouping field from the non-secure NVIC when in secure state. </p>
 <dl class="section return"><dt>Returns</dt><dd>Priority grouping field (SCB-&gt;AIRCR [10:8] PRIGROUP field). </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Mainline. </dd></dl>
 <dl class="section see"><dt>See Also</dt><dd><ul>
 <li><a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a> </li>
 </ul>
@@ -463,7 +463,7 @@ Functions</h2></td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for ARMv8-M Mainline. </dd></dl>
+<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Mainline. </dd></dl>
 <dl class="section see"><dt>See Also</dt><dd><ul>
 <li><a class="el" href="group__NVIC__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a> </li>
 </ul>
@@ -476,7 +476,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__peripheral__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -340,7 +340,7 @@ Register Bit Fields</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__sau__trustzone__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,11 +110,11 @@ $(document).ready(function(){initNavTree('group__sau__trustzone__functions.html'
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">SAU Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for ARMv8-M</a></div></div>  </div>
+<div class="title">SAU Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>Secure Attribution Unit (SAU) functions related to TrustZone for ARMv8-M.  
+<p>Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
@@ -189,7 +189,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__system__init__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -134,7 +134,7 @@ Variables</h2></td></tr>
 <tr class="separator:gaa3cd3e43291e81e795d642b79b6088e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>ARM provides a template file <b>system_<em>device</em>.c</b> that must be adapted by the silicon vendor to match their actual device. As a <b>minimum requirement</b>, this file must provide:</p>
+<p>Arm provides a template file <b>system_<em>device</em>.c</b> that must be adapted by the silicon vendor to match their actual device. As a <b>minimum requirement</b>, this file must provide:</p>
 <ul>
 <li>A device-specific system configuration function, <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit()</a>.</li>
 <li>A global variable that contains the system frequency, <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>.</li>
@@ -219,7 +219,7 @@ Code Example</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__systick__trustzone__functions.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,11 +110,11 @@ $(document).ready(function(){initNavTree('group__systick__trustzone__functions.h
   <div class="summary">
 <a href="#func-members">Functions</a>  </div>
   <div class="headertitle">
-<div class="title">SysTick Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for ARMv8-M</a></div></div>  </div>
+<div class="title">SysTick Functions<div class="ingroups"><a class="el" href="group__trustzone__functions.html">TrustZone for Armv8-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>SysTick functions related to TrustZone for ARMv8-M.  
+<p>SysTick functions related to TrustZone for Armv8-M.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
@@ -161,7 +161,7 @@ Functions</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__trustzone__functions.html

@@ -3,8 +3,8 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>TrustZone for ARMv8-M</title>
-<title>CMSIS-Core (Cortex-M): TrustZone for ARMv8-M</title>
+<title>TrustZone for Armv8-M</title>
+<title>CMSIS-Core (Cortex-M): TrustZone for Armv8-M</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
 <link href="cmsis.css" rel="stylesheet" type="text/css" />
 <script type="text/javascript" src="jquery.js"></script>
@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -110,33 +110,33 @@ $(document).ready(function(){initNavTree('group__trustzone__functions.html','');
   <div class="summary">
 <a href="#groups">Content</a>  </div>
   <div class="headertitle">
-<div class="title">TrustZone for ARMv8-M</div>  </div>
+<div class="title">TrustZone for Armv8-M</div>  </div>
 </div><!--header-->
 <div class="contents">
 
-<p>Functions that related to optional ARMv8-M security extension.  
+<p>Functions that related to optional Armv8-M security extension.  
 <a href="#details">More...</a></p>
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="groups"></a>
 Content</h2></td></tr>
 <tr class="memitem:group__coreregister__trustzone__functions"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html">Core Register Access Functions</a></td></tr>
-<tr class="memdesc:group__coreregister__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core register Access functions related to TrustZone for ARMv8-M. <br/></td></tr>
+<tr class="memdesc:group__coreregister__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Core register Access functions related to TrustZone for Armv8-M. <br/></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:group__nvic__trustzone__functions"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html">NVIC Functions</a></td></tr>
-<tr class="memdesc:group__nvic__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for ARMv8-M. <br/></td></tr>
+<tr class="memdesc:group__nvic__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M. <br/></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:group__systick__trustzone__functions"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__systick__trustzone__functions.html">SysTick Functions</a></td></tr>
-<tr class="memdesc:group__systick__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">SysTick functions related to TrustZone for ARMv8-M. <br/></td></tr>
+<tr class="memdesc:group__systick__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">SysTick functions related to TrustZone for Armv8-M. <br/></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:group__sau__trustzone__functions"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__sau__trustzone__functions.html">SAU Functions</a></td></tr>
-<tr class="memdesc:group__sau__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Attribution Unit (SAU) functions related to TrustZone for ARMv8-M. <br/></td></tr>
+<tr class="memdesc:group__sau__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M. <br/></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:group__context__trustzone__functions"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__context__trustzone__functions.html">RTOS Context Management</a></td></tr>
-<tr class="memdesc:group__context__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">RTOS Thread Context Management for ARMv8-M TrustZone. <br/></td></tr>
+<tr class="memdesc:group__context__trustzone__functions"><td class="mdescLeft">&#160;</td><td class="mdescRight">RTOS Thread Context Management for Armv8-M TrustZone. <br/></td></tr>
 <tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>The ARMv8-M architecture has optional ARMv8-M security extension based on ARM TrustZone technology. To access ARM TrustZone extensions for ARMv8-M additional CMSIS functions are provided:</p>
+<p>The Armv8-M architecture has optional Armv8-M security extension based on Arm TrustZone technology. To access Arm TrustZone extensions for Armv8-M additional CMSIS functions are provided:</p>
 <ul>
 <li><a class="el" href="group__coreregister__trustzone__functions.html">Core Register Access Functions</a></li>
 <li><a class="el" href="group__nvic__trustzone__functions.html">NVIC Functions</a></li>
@@ -149,7 +149,7 @@ Content</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__version__control__depricated__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -192,7 +192,7 @@ Macros</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/group__version__control__gr.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -246,7 +246,7 @@ Macros</h2></td></tr>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/index.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -123,8 +123,8 @@ $(document).ready(function(){initNavTree('index.html','');});
 <p>The following sections provide details about the CMSIS-Core (Cortex-M):</p>
 <ul>
 <li><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li>
-<li><a class="el" href="using_TrustZone_pg.html">Using TrustZone&reg; for ARMv8-M</a> describes how to use the security extensions available in the ARMv8-M architecture.</li>
-<li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-Core (Cortex-M) in detail and explains how to adapt template files provided by ARM to silicon vendor devices.</li>
+<li><a class="el" href="using_TrustZone_pg.html">Using TrustZone&reg; for Armv8-M</a> describes how to use the security extensions available in the Armv8-M architecture.</li>
+<li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-Core (Cortex-M) in detail and explains how to adapt template files provided by Arm to silicon vendor devices.</li>
 <li><a class="el" href="coreMISRA_Exceptions_pg.html">MISRA-C Deviations</a> describes the violations to the MISRA standard.</li>
 <li><a href="Modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
 <li><a href="Annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
@@ -140,43 +140,43 @@ $(document).ready(function(){initNavTree('index.html','');});
 <tr>
 <td><b>CMSIS\Core\Include</b> </td><td>CMSIS-Core (Cortex-M) header files (for example core_cm3.h, core_cmInstr.h, etc.) </td></tr>
 <tr>
-<td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">ARM reference implementations</a> of Cortex-M devices </td></tr>
+<td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">Arm reference implementations</a> of Cortex-M devices </td></tr>
 <tr>
 <td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> for extension by silicon vendors </td></tr>
 </table>
 <hr/>
 <h1><a class="anchor" id="ref_v6-v8M"></a>
 Processor Support</h1>
-<p>CMSIS supports the complete range of <a href="http://www.arm.com/products/processors/cortex-m/index.php" target="_blank"><b>Cortex-M processors</b></a> (with exception of Cortex-M1) and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>ARMv8-M architecture</b></a> including security extensions.</p>
+<p>CMSIS supports the complete range of <a href="http://www.arm.com/products/processors/cortex-m/index.php" target="_blank"><b>Cortex-M processors</b></a> (with exception of Cortex-M1) and the <a href="http://www.arm.com/products/processors/instruction-set-architectures/armv8-m-architecture.php" target="_blank"><b>Armv8-M architecture</b></a> including security extensions.</p>
 <h2><a class="anchor" id="ref_man_sec"></a>
 Cortex-M Reference Manuals</h2>
 <p>The Cortex-M Device Generic User Guides contain the programmers model and detailed information about the core peripherals and are available for:</p>
 <ul>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/DUI0497A_cortex_m0_r0p0_generic_ug.pdf" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a> (ARMv6-M architecture)</li>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/DUI0662B_cortex_m0p_r0p1_dgug.pdf" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a> (ARMv6-M architecture)</li>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/DUI0497A_cortex_m0_r0p0_generic_ug.pdf" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/DUI0662B_cortex_m0p_r0p1_dgug.pdf" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
 <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf" target="_blank"><b>Cortex-M4 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a> (ARMv7-M architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646a/DUI0646A_cortex_m7_dgug.pdf" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
 </ul>
 <p>The <b>Cortex-M23</b> and <b>Cortex-M33</b> are described with Technical Reference Manuals that are available here:</p>
 <ul>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0550c/cortex_m23_r1p0_technical_reference_manual_DDI0550C_en.pdf" target="_blank"><b>Cortex-M23 Technical Reference Manual</b></a> (ARMv8-M baseline architecture)</li>
-<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.100230_0002_00_en/cortex_m33_trm_100230_0002_00_en.pdf" target="_blank"><b>Cortex-M33 Technical Reference Manual</b></a> (ARMv8-M mainline architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0550c/cortex_m23_r1p0_technical_reference_manual_DDI0550C_en.pdf" target="_blank"><b>Cortex-M23 Technical Reference Manual</b></a> (Armv8-M baseline architecture)</li>
+<li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.100230_0002_00_en/cortex_m33_trm_100230_0002_00_en.pdf" target="_blank"><b>Cortex-M33 Technical Reference Manual</b></a> (Armv8-M mainline architecture)</li>
 </ul>
 <h2><a class="anchor" id="ARMv8M"></a>
-ARMv8-M Architecture</h2>
-<p>ARMv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both ARMv8-M profiles are supported by CMSIS.</p>
-<p>The ARMv8-M Architecture is described in the <a href="http://developer.arm.com/products/architecture/m-profile/docs/ddi0553/latest/armv8-m-architecture-reference-manual" target="_blank"><b>ARMv8-M Architecture Reference Manual</b></a>.</p>
+Armv8-M Architecture</h2>
+<p>Armv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both Armv8-M profiles are supported by CMSIS.</p>
+<p>The Armv8-M Architecture is described in the <a href="http://developer.arm.com/products/architecture/m-profile/docs/ddi0553/latest/armv8-m-architecture-reference-manual" target="_blank"><b>Armv8-M Architecture Reference Manual</b></a>.</p>
 <hr/>
 <h1><a class="anchor" id="tested_tools_sec"></a>
 Tested and Verified Toolchains</h1>
-<p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by ARM have been tested and verified with the following toolchains:</p>
+<p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by Arm have been tested and verified with the following toolchains:</p>
 <ul>
-<li>ARM: ARM Compiler 5.06 update 6 (not for Cortex-M23, Cortex-M33, ARMv8-M)</li>
-<li>ARM: ARM Compiler 6.9</li>
-<li>ARM: ARM Compiler 6.6.1 (not for Cortex-M0, Cortex-M23, Cortex-M33, ARMv8-M)</li>
-<li>GNU: GNU Tools for ARM Embedded 6.3.1 20170620</li>
-<li>IAR: IAR ANSI C/C++ Compiler for ARM 8.20.1.14183</li>
+<li>Arm: Arm Compiler 5.06 update 6 (not for Cortex-M23, Cortex-M33, Armv8-M)</li>
+<li>Arm: Arm Compiler 6.9</li>
+<li>Arm: Arm Compiler 6.6.2 (not for Cortex-M0, Cortex-M23, Cortex-M33, Armv8-M)</li>
+<li>GNU: GNU Tools for Arm Embedded 6.3.1 20170620</li>
+<li>IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183</li>
 </ul>
 <hr/>
  </div></div><!-- contents -->
@@ -184,7 +184,7 @@ Tested and Verified Toolchains</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/modules.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -123,16 +123,16 @@ $(document).ready(function(){initNavTree('modules.html','');});
 <tr id="row_6_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic__CPU__gr.html" target="_self">Intrinsic Functions for CPU Instructions</a></td><td class="desc">Functions that generate specific Cortex-M CPU Instructions </td></tr>
 <tr id="row_7_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__intrinsic__SIMD__gr.html" target="_self">Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]</a></td><td class="desc">Access to dedicated SIMD instructions </td></tr>
 <tr id="row_8_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__fpu__functions.html" target="_self">FPU Functions</a></td><td class="desc">Functions that relate to the Floating-Point Arithmetic Unit </td></tr>
-<tr id="row_9_" class="even"><td class="entry"><img id="arr_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="group__mpu__functions.html" target="_self">MPU Functions for ARMv7-M</a></td><td class="desc">Functions that relate to the Memory Protection Unit </td></tr>
+<tr id="row_9_" class="even"><td class="entry"><img id="arr_9_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('9_')"/><a class="el" href="group__mpu__functions.html" target="_self">MPU Functions for Armv7-M</a></td><td class="desc">Functions that relate to the Memory Protection Unit </td></tr>
 <tr id="row_9_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__mpu__defines.html" target="_self">Define values</a></td><td class="desc">Define values for MPU region setup </td></tr>
 <tr id="row_10_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__SysTick__gr.html" target="_self">Systick Timer (SYSTICK)</a></td><td class="desc">Initialize and start the SysTick timer </td></tr>
 <tr id="row_11_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__ITM__Debug__gr.html" target="_self">Debug Access</a></td><td class="desc">Debug Access to the Instrumented Trace Macrocell (ITM) </td></tr>
-<tr id="row_12_" class="even"><td class="entry"><img id="arr_12_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('12_')"/><a class="el" href="group__trustzone__functions.html" target="_self">TrustZone for ARMv8-M</a></td><td class="desc">Functions that related to optional ARMv8-M security extension </td></tr>
-<tr id="row_12_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__coreregister__trustzone__functions.html" target="_self">Core Register Access Functions</a></td><td class="desc">Core register Access functions related to TrustZone for ARMv8-M </td></tr>
-<tr id="row_12_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nvic__trustzone__functions.html" target="_self">NVIC Functions</a></td><td class="desc">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for ARMv8-M </td></tr>
-<tr id="row_12_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__systick__trustzone__functions.html" target="_self">SysTick Functions</a></td><td class="desc">SysTick functions related to TrustZone for ARMv8-M </td></tr>
-<tr id="row_12_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sau__trustzone__functions.html" target="_self">SAU Functions</a></td><td class="desc">Secure Attribution Unit (SAU) functions related to TrustZone for ARMv8-M </td></tr>
-<tr id="row_12_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__context__trustzone__functions.html" target="_self">RTOS Context Management</a></td><td class="desc">RTOS Thread Context Management for ARMv8-M TrustZone </td></tr>
+<tr id="row_12_" class="even"><td class="entry"><img id="arr_12_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('12_')"/><a class="el" href="group__trustzone__functions.html" target="_self">TrustZone for Armv8-M</a></td><td class="desc">Functions that related to optional Armv8-M security extension </td></tr>
+<tr id="row_12_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__coreregister__trustzone__functions.html" target="_self">Core Register Access Functions</a></td><td class="desc">Core register Access functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_12_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__nvic__trustzone__functions.html" target="_self">NVIC Functions</a></td><td class="desc">Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_12_2_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__systick__trustzone__functions.html" target="_self">SysTick Functions</a></td><td class="desc">SysTick functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_12_3_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__sau__trustzone__functions.html" target="_self">SAU Functions</a></td><td class="desc">Secure Attribution Unit (SAU) functions related to TrustZone for Armv8-M </td></tr>
+<tr id="row_12_4_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__context__trustzone__functions.html" target="_self">RTOS Context Management</a></td><td class="desc">RTOS Thread Context Management for Armv8-M TrustZone </td></tr>
 <tr id="row_13_" class="even"><td class="entry"><img id="arr_13_" src="ftv2mlastnode.png" alt="\" width="16" height="22" onclick="toggleFolder('13_')"/><a class="el" href="group__cache__functions__m7.html" target="_self">Cache Functions  (only Cortex-M7)</a></td><td class="desc">Functions for Instruction and Data Cache </td></tr>
 <tr id="row_13_0_"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="group__Icache__functions__m7.html" target="_self">I-Cache Functions</a></td><td class="desc">Functions for the instruction cache </td></tr>
 <tr id="row_13_1_" class="even"><td class="entry"><img src="ftv2blank.png" alt="&#160;" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="group__Dcache__functions__m7.html" target="_self">D-Cache Functions</a></td><td class="desc">Functions for the data cache </td></tr>
@@ -143,7 +143,7 @@ $(document).ready(function(){initNavTree('modules.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/modules.js

@@ -9,9 +9,9 @@ var modules =
     [ "Intrinsic Functions for CPU Instructions", "group__intrinsic__CPU__gr.html", "group__intrinsic__CPU__gr" ],
     [ "Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]", "group__intrinsic__SIMD__gr.html", "group__intrinsic__SIMD__gr" ],
     [ "FPU Functions", "group__fpu__functions.html", "group__fpu__functions" ],
-    [ "MPU Functions for ARMv7-M", "group__mpu__functions.html", "group__mpu__functions" ],
+    [ "MPU Functions for Armv7-M", "group__mpu__functions.html", "group__mpu__functions" ],
     [ "Systick Timer (SYSTICK)", "group__SysTick__gr.html", "group__SysTick__gr" ],
     [ "Debug Access", "group__ITM__Debug__gr.html", "group__ITM__Debug__gr" ],
-    [ "TrustZone for ARMv8-M", "group__trustzone__functions.html", "group__trustzone__functions" ],
+    [ "TrustZone for Armv8-M", "group__trustzone__functions.html", "group__trustzone__functions" ],
     [ "Cache Functions  (only Cortex-M7)", "group__cache__functions__m7.html", "group__cache__functions__m7" ]
 ];

docs/Core/html/navtree.js

@@ -4,13 +4,13 @@ var NAVTREE =
     [ "Overview", "index.html", [
       [ "Processor Support", "index.html#ref_v6-v8M", [
         [ "Cortex-M Reference Manuals", "index.html#ref_man_sec", null ],
-        [ "ARMv8-M Architecture", "index.html#ARMv8M", null ]
+        [ "Armv8-M Architecture", "index.html#ARMv8M", null ]
       ] ],
       [ "Tested and Verified Toolchains", "index.html#tested_tools_sec", null ]
     ] ],
     [ "Revision History of CMSIS-Core (Cortex-M)", "core_revisionHistory.html", null ],
     [ "Using CMSIS in Embedded Applications", "using_pg.html", "using_pg" ],
-    [ "Using TrustZone for ARMv8-M", "using_TrustZone_pg.html", [
+    [ "Using TrustZone for Armv8-M", "using_TrustZone_pg.html", [
       [ "Simplified Use Case with TrustZone", "using_TrustZone_pg.html#useCase_TrustZone", [
         [ "Program Examples", "using_TrustZone_pg.html#Example_TrustZone", null ]
       ] ],
@@ -35,7 +35,8 @@ var NAVTREE =
 var NAVTREEINDEX =
 [
 "annotated.html",
-"group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c"
+"group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c",
+"using_ARM_pg.html#using_ARM_Lib_sec"
 ];
 
 var SYNCONMSG = 'click to disable panel synchronisation';

docs/Core/html/navtreeindex1.js

@@ -102,16 +102,31 @@ var NAVTREEINDEX1 =
 "structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36":[9,5,5],
 "structFPU__Type.html#af1b708c5e413739150df3d16ca3b7061":[9,5,1],
 "structITM__Type.html":[9,7],
-"structITM__Type.html#a04b9fbc83759cb818dfa161d39628426":[9,7,4],
-"structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e":[9,7,1],
-"structITM__Type.html#a5834885903a557674f078f3b71fa8bc8":[9,7,8],
-"structITM__Type.html#a962a970dfd286cad7f8a8577e87d4ad3":[9,7,7],
-"structITM__Type.html#acd03c6858f7b678dab6a6121462e7807":[9,7,5],
-"structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275":[9,7,9],
-"structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2":[9,7,6],
-"structITM__Type.html#af4c205be465780a20098387120bdb482":[9,7,0],
-"structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b":[9,7,3],
-"structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce":[9,7,2],
+"structITM__Type.html#a04b9fbc83759cb818dfa161d39628426":[9,7,19],
+"structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537":[9,7,4],
+"structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d":[9,7,17],
+"structITM__Type.html#a30bb2b166b1723867da4a708935677ba":[9,7,0],
+"structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8":[9,7,9],
+"structITM__Type.html#a43451f43f514108d9eaed5b017f8d921":[9,7,3],
+"structITM__Type.html#a5834885903a557674f078f3b71fa8bc8":[9,7,23],
+"structITM__Type.html#a66eb82a070953f09909f39b8e516fb91":[9,7,6],
+"structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5":[9,7,8],
+"structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d":[9,7,2],
+"structITM__Type.html#a8471c4d77b7107cf580587509da69f38":[9,7,12],
+"structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4":[9,7,11],
+"structITM__Type.html#a962a970dfd286cad7f8a8577e87d4ad3":[9,7,22],
+"structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94":[9,7,7],
+"structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158":[9,7,14],
+"structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a":[9,7,10],
+"structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f":[9,7,1],
+"structITM__Type.html#acd03c6858f7b678dab6a6121462e7807":[9,7,20],
+"structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6":[9,7,16],
+"structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0":[9,7,5],
+"structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275":[9,7,24],
+"structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2":[9,7,21],
+"structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3":[9,7,13],
+"structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37":[9,7,15],
+"structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e":[9,7,18],
 "structMPU__Type.html":[8,9,1],
 "structMPU__Type.html#a1658326c6762637eeef8a79bb467445e":[8,9,1,2],
 "structMPU__Type.html#a207f6e9c3af753367554cc06df300a55":[8,9,1,8],
@@ -234,15 +249,5 @@ var NAVTREEINDEX1 =
 "unionxPSR__Type.html#add7cbd2b0abd8954d62cd7831796ac7c":[9,14,6],
 "unionxPSR__Type.html#af14df16ea0690070c45b95f2116b7a0a":[9,14,8],
 "unionxPSR__Type.html#af438e0f407357e914a70b5bd4d6a97c5":[9,14,0],
-"using_ARM_pg.html":[2,2],
-"using_ARM_pg.html#using_ARM_Lib_sec":[2,2,0],
-"using_CMSIS.html":[2,0],
-"using_TrustZone_pg.html":[3],
-"using_TrustZone_pg.html#CMSIS_Files_TrustZone":[3,2],
-"using_TrustZone_pg.html#Example_TrustZone":[3,0,0],
-"using_TrustZone_pg.html#Model_TrustZone":[3,1],
-"using_TrustZone_pg.html#RTOS_TrustZone":[3,2,0],
-"using_TrustZone_pg.html#useCase_TrustZone":[3,0],
-"using_VTOR_pg.html":[2,1],
-"using_pg.html":[2]
+"using_ARM_pg.html":[2,2]
 };

docs/Core/html/navtreeindex2.js

@@ -0,0 +1,13 @@
+var NAVTREEINDEX2 =
+{
+"using_ARM_pg.html#using_ARM_Lib_sec":[2,2,0],
+"using_CMSIS.html":[2,0],
+"using_TrustZone_pg.html":[3],
+"using_TrustZone_pg.html#CMSIS_Files_TrustZone":[3,2],
+"using_TrustZone_pg.html#Example_TrustZone":[3,0,0],
+"using_TrustZone_pg.html#Model_TrustZone":[3,1],
+"using_TrustZone_pg.html#RTOS_TrustZone":[3,2,0],
+"using_TrustZone_pg.html#useCase_TrustZone":[3,0],
+"using_VTOR_pg.html":[2,1],
+"using_pg.html":[2]
+};

docs/Core/html/pages.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -117,8 +117,8 @@ $(document).ready(function(){initNavTree('pages.html','');});
 <tr id="row_1_"><td class="entry"><img id="arr_1_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('1_')"/><a class="el" href="using_pg.html" target="_self">Using CMSIS in Embedded Applications</a></td><td class="desc"></td></tr>
 <tr id="row_1_0_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="using_CMSIS.html" target="_self">Basic CMSIS Example</a></td><td class="desc"></td></tr>
 <tr id="row_1_1_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="using_VTOR_pg.html" target="_self">Using Interrupt Vector Remap</a></td><td class="desc"></td></tr>
-<tr id="row_1_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="using_ARM_pg.html" target="_self">Using CMSIS with generic ARM Processors</a></td><td class="desc"></td></tr>
-<tr id="row_2_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="using_TrustZone_pg.html" target="_self">Using TrustZone for ARMv8-M</a></td><td class="desc"></td></tr>
+<tr id="row_1_2_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><a class="el" href="using_ARM_pg.html" target="_self">Using CMSIS with generic Arm Processors</a></td><td class="desc"></td></tr>
+<tr id="row_2_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="using_TrustZone_pg.html" target="_self">Using TrustZone for Armv8-M</a></td><td class="desc"></td></tr>
 <tr id="row_3_" class="even"><td class="entry"><img id="arr_3_" src="ftv2mnode.png" alt="o" width="16" height="22" onclick="toggleFolder('3_')"/><a class="el" href="templates_pg.html" target="_self">CMSIS-Core Device Templates</a></td><td class="desc"></td></tr>
 <tr id="row_3_0_"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="startup_s_pg.html" target="_self">Startup File startup_&lt;device&gt;.s</a></td><td class="desc"></td></tr>
 <tr id="row_3_1_" class="even"><td class="entry"><img src="ftv2vertline.png" alt="|" width="16" height="22" /><img src="ftv2node.png" alt="o" width="16" height="22" /><a class="el" href="system_c_pg.html" target="_self">System Configuration Files system_&lt;device&gt;.c and system_&lt;device&gt;.h</a></td><td class="desc"></td></tr>
@@ -134,7 +134,7 @@ $(document).ready(function(){initNavTree('pages.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/partition_h_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -111,7 +111,7 @@ $(document).ready(function(){initNavTree('partition_h_pg.html','');});
 <div class="title">System Partition Header File partition_&lt;device&gt;.h </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>The <a class="el" href="partition_h_pg.html">System Partition Header File partition_&lt;device&gt;.h</a> contains the initial setup of the TrustZone hardware in an ARMv8-M system. The function <a class="el" href="group__sau__trustzone__functions.html#ga6093bc5939ea8924fbcfdffb8f0553f1">TZ_SAU_Setup</a> is call from <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> and uses the settings in this file to initialize the Secure Attribute Unit (SAU) and define non-secure interrupts (register NVIC_INIT_ITNS). The following initializations are performed:</p>
+<div class="textblock"><p>The <a class="el" href="partition_h_pg.html">System Partition Header File partition_&lt;device&gt;.h</a> contains the initial setup of the TrustZone hardware in an Armv8-M system. The function <a class="el" href="group__sau__trustzone__functions.html#ga6093bc5939ea8924fbcfdffb8f0553f1">TZ_SAU_Setup</a> is call from <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> and uses the settings in this file to initialize the Secure Attribute Unit (SAU) and define non-secure interrupts (register NVIC_INIT_ITNS). The following initializations are performed:</p>
 <ul>
 <li><a class="el" href="partition_h_pg.html#sau_ctrlregister_sec">SAU CTRL register settings</a> provides settings for the SAU CTRL register.</li>
 <li><a class="el" href="partition_h_pg.html#sau_regions_sect">Configuration of the SAU Address Regions</a> provides configuration of the SAU Address Regions.</li>
@@ -265,7 +265,7 @@ Configuration of Interrupt Target settings</h1>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/printComponentTabs.js

@@ -18,6 +18,7 @@ var arr = [];
  arr.push( new tabElement( "CORE_M",  "/Core/html/",        "CMSIS-Core(M)")    );
  arr.push( new tabElement( "DRV",     "/Driver/html/",      "Driver")    );
  arr.push( new tabElement( "DSP",     "/DSP/html/",         "DSP")       );
+ arr.push( new tabElement( "NN",      "/NN/html/",          "NN")       );
  arr.push( new tabElement( "RTOSv1",  "/RTOS/html/",        "RTOS v1")   );
  arr.push( new tabElement( "RTOSv2",  "/RTOS2/html/",       "RTOS v2")   );
  arr.push( new tabElement( "PACK",    "/Pack/html/",        "Pack")      );

docs/Core/html/regMap_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -291,7 +291,7 @@ $(document).ready(function(){initNavTree('regMap_pg.html','');});
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/search/all_11.js

@@ -7,7 +7,7 @@ var searchData=
   ['tpi_5ftype',['TPI_Type',['../structTPI__Type.html',1,'']]],
   ['tpr',['TPR',['../structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2',1,'ITM_Type']]],
   ['trigger',['TRIGGER',['../structTPI__Type.html#a4d4cd2357f72333a82a1313228287bbd',1,'TPI_Type']]],
-  ['trustzone_20for_20armv8_2dm',['TrustZone for ARMv8-M',['../group__trustzone__functions.html',1,'']]],
+  ['trustzone_20for_20armv8_2dm',['TrustZone for Armv8-M',['../group__trustzone__functions.html',1,'']]],
   ['type',['TYPE',['../structMPU__Type.html#aba02af87f77577c725cf73879cabb609',1,'MPU_Type']]],
   ['tz_5fallocmodulecontext_5fs',['TZ_AllocModuleContext_S',['../group__context__trustzone__functions.html#gacd016f166bee549a0d3e970132e64a90',1,'Ref_Trustzone.txt']]],
   ['tz_5ffreemodulecontext_5fs',['TZ_FreeModuleContext_S',['../group__context__trustzone__functions.html#gac84f678fbe974f8b02c683e0b8046524',1,'Ref_Trustzone.txt']]],

docs/Core/html/search/all_12.js

@@ -5,9 +5,9 @@ var searchData=
   ['u8',['u8',['../structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275',1,'ITM_Type']]],
   ['usagefault_5firqn',['UsageFault_IRQn',['../group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf',1,'Ref_NVIC.txt']]],
   ['using_2etxt',['Using.txt',['../Using_8txt.html',1,'']]],
-  ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic ARM Processors',['../using_ARM_pg.html',1,'using_pg']]],
+  ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic Arm Processors',['../using_ARM_pg.html',1,'using_pg']]],
   ['using_20cmsis_20in_20embedded_20applications',['Using CMSIS in Embedded Applications',['../using_pg.html',1,'']]],
-  ['using_20trustzone_20for_20armv8_2dm',['Using TrustZone for ARMv8-M',['../using_TrustZone_pg.html',1,'']]],
+  ['using_20trustzone_20for_20armv8_2dm',['Using TrustZone for Armv8-M',['../using_TrustZone_pg.html',1,'']]],
   ['using_20interrupt_20vector_20remap',['Using Interrupt Vector Remap',['../using_VTOR_pg.html',1,'using_pg']]],
   ['usingtrustzone_2etxt',['UsingTrustZone.txt',['../UsingTrustZone_8txt.html',1,'']]]
 ];

docs/Core/html/search/all_3.js

@@ -5,6 +5,10 @@ var searchData=
   ['calib',['CALIB',['../structSysTick__Type.html#afcadb0c6d35b21cdc0018658a13942de',1,'SysTick_Type']]],
   ['ccr',['CCR',['../structSCB__Type.html#a2d6653b0b70faac936046a02809b577f',1,'SCB_Type']]],
   ['cfsr',['CFSR',['../structSCB__Type.html#a0cda9e061b42373383418663092ad19a',1,'SCB_Type']]],
+  ['cid0',['CID0',['../structITM__Type.html#a30bb2b166b1723867da4a708935677ba',1,'ITM_Type']]],
+  ['cid1',['CID1',['../structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f',1,'ITM_Type']]],
+  ['cid2',['CID2',['../structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d',1,'ITM_Type']]],
+  ['cid3',['CID3',['../structITM__Type.html#a43451f43f514108d9eaed5b017f8d921',1,'ITM_Type']]],
   ['claimclr',['CLAIMCLR',['../structTPI__Type.html#a0e10e292cb019a832b03ddd055b2f6ac',1,'TPI_Type']]],
   ['claimset',['CLAIMSET',['../structTPI__Type.html#af8b7d15fa5252b733dd4b11fa1b5730a',1,'TPI_Type']]],
   ['cmsis_5fnvic_5fvirtual',['CMSIS_NVIC_VIRTUAL',['../group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c',1,'Ref_NVIC.txt']]],

docs/Core/html/search/all_4.js

@@ -6,6 +6,7 @@ var searchData=
   ['debugmonitor_5firqn',['DebugMonitor_IRQn',['../group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c',1,'Ref_NVIC.txt']]],
   ['demcr',['DEMCR',['../structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee',1,'CoreDebug_Type']]],
   ['deprecated_20list',['Deprecated List',['../deprecated.html',1,'']]],
+  ['devarch',['DEVARCH',['../structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537',1,'ITM_Type']]],
   ['device_20header_20file_20_3cdevice_2eh_3e',['Device Header File <device.h>',['../device_h_pg.html',1,'templates_pg']]],
   ['devid',['DEVID',['../structTPI__Type.html#abc0ecda8a5446bc754080276bad77514',1,'TPI_Type']]],
   ['devtype',['DEVTYPE',['../structTPI__Type.html#ad98855854a719bbea33061e71529a472',1,'TPI_Type']]],

docs/Core/html/search/all_8.js

@@ -6,11 +6,13 @@ var searchData=
   ['icpr',['ICPR',['../structNVIC__Type.html#a8d8f45d9c5c67bba3c153c55574bac95',1,'NVIC_Type']]],
   ['icsr',['ICSR',['../structSCB__Type.html#a0ca18ef984d132c6bf4d9b61cd00f05a',1,'SCB_Type']]],
   ['ictr',['ICTR',['../structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762',1,'SCnSCB_Type']]],
+  ['imcr',['IMCR',['../structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0',1,'ITM_Type']]],
   ['intrinsic_20functions_20for_20cpu_20instructions',['Intrinsic Functions for CPU Instructions',['../group__intrinsic__CPU__gr.html',1,'']]],
   ['intrinsic_20functions_20for_20simd_20instructions_20_5bonly_20cortex_2dm4_20and_20cortex_2dm7_5d',['Intrinsic Functions for SIMD Instructions [only Cortex-M4 and Cortex-M7]',['../group__intrinsic__SIMD__gr.html',1,'']]],
   ['ip',['IP',['../structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd',1,'NVIC_Type']]],
   ['ipsr_5ftype',['IPSR_Type',['../unionIPSR__Type.html',1,'']]],
   ['irqn_5ftype',['IRQn_Type',['../group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8',1,'Ref_NVIC.txt']]],
+  ['irr',['IRR',['../structITM__Type.html#a66eb82a070953f09909f39b8e516fb91',1,'ITM_Type']]],
   ['isar',['ISAR',['../structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066',1,'SCB_Type']]],
   ['iser',['ISER',['../structNVIC__Type.html#a9fccef5a60a0d5e81fcd7869a6274f47',1,'NVIC_Type']]],
   ['ispr',['ISPR',['../structNVIC__Type.html#a8f731a9f428efc86e8d311b52ce823d0',1,'NVIC_Type']]],
@@ -24,5 +26,6 @@ var searchData=
   ['itm_5frxbuffer',['ITM_RxBuffer',['../group__ITM__Debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8',1,'Ref_Debug.txt']]],
   ['itm_5fsendchar',['ITM_SendChar',['../group__ITM__Debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1',1,'Ref_Debug.txt']]],
   ['itm_5ftype',['ITM_Type',['../structITM__Type.html',1,'']]],
+  ['iwr',['IWR',['../structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94',1,'ITM_Type']]],
   ['interrupts_20and_20exceptions_20_28nvic_29',['Interrupts and Exceptions (NVIC)',['../group__NVIC__gr.html',1,'']]]
 ];

docs/Core/html/search/all_9.js

@@ -1,5 +1,7 @@
 var searchData=
 [
+  ['lar',['LAR',['../structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5',1,'ITM_Type']]],
   ['load',['LOAD',['../structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd',1,'SysTick_Type']]],
+  ['lsr',['LSR',['../structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8',1,'ITM_Type']]],
   ['lsucnt',['LSUCNT',['../structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1',1,'DWT_Type']]]
 ];

docs/Core/html/search/all_a.js

@@ -9,7 +9,7 @@ var searchData=
   ['misra_2etxt',['MISRA.txt',['../MISRA_8txt.html',1,'']]],
   ['mmfar',['MMFAR',['../structSCB__Type.html#a2d03d0b7cec2254f39eb1c46c7445e80',1,'SCB_Type']]],
   ['mmfr',['MMFR',['../structSCB__Type.html#aa11887804412bda283cc85a83fdafa7c',1,'SCB_Type']]],
-  ['mpu_20functions_20for_20armv7_2dm',['MPU Functions for ARMv7-M',['../group__mpu__functions.html',1,'']]],
+  ['mpu_20functions_20for_20armv7_2dm',['MPU Functions for Armv7-M',['../group__mpu__functions.html',1,'']]],
   ['mpu_5ftype',['MPU_Type',['../structMPU__Type.html',1,'']]],
   ['mvfr0',['MVFR0',['../structFPU__Type.html#a4f19014defe6033d070b80af19ef627c',1,'FPU_Type']]],
   ['mvfr1',['MVFR1',['../structFPU__Type.html#a66f8cfa49a423b480001a4e101bf842d',1,'FPU_Type']]]

docs/Core/html/search/all_d.js

@@ -4,6 +4,14 @@ var searchData=
   ['pendsv_5firqn',['PendSV_IRQn',['../group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2',1,'Ref_NVIC.txt']]],
   ['peripheral_20access',['Peripheral Access',['../group__peripheral__gr.html',1,'']]],
   ['pfr',['PFR',['../structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d',1,'SCB_Type']]],
-  ['port',['PORT',['../structITM__Type.html#af4c205be465780a20098387120bdb482',1,'ITM_Type']]],
+  ['pid0',['PID0',['../structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a',1,'ITM_Type']]],
+  ['pid1',['PID1',['../structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4',1,'ITM_Type']]],
+  ['pid2',['PID2',['../structITM__Type.html#a8471c4d77b7107cf580587509da69f38',1,'ITM_Type']]],
+  ['pid3',['PID3',['../structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3',1,'ITM_Type']]],
+  ['pid4',['PID4',['../structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158',1,'ITM_Type']]],
+  ['pid5',['PID5',['../structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37',1,'ITM_Type']]],
+  ['pid6',['PID6',['../structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6',1,'ITM_Type']]],
+  ['pid7',['PID7',['../structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d',1,'ITM_Type']]],
+  ['port',['PORT',['../structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e',1,'ITM_Type']]],
   ['pvd_5fstm_5firqn',['PVD_STM_IRQn',['../group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86',1,'Ref_NVIC.txt']]]
 ];

docs/Core/html/search/all_f.js

@@ -26,9 +26,9 @@ var searchData=
   ['ref_5fversioncontrol_2etxt',['Ref_VersionControl.txt',['../Ref__VersionControl_8txt.html',1,'']]],
   ['regmap_5fcmsis2arm_5fdoc_2etxt',['RegMap_CMSIS2ARM_Doc.txt',['../RegMap__CMSIS2ARM__Doc_8txt.html',1,'']]],
   ['register_20mapping',['Register Mapping',['../regMap_pg.html',1,'']]],
-  ['reserved0',['RESERVED0',['../structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80',1,'NVIC_Type::RESERVED0()'],['../structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6',1,'SCB_Type::RESERVED0()'],['../structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1',1,'SCnSCB_Type::RESERVED0()'],['../structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e',1,'ITM_Type::RESERVED0()'],['../structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36',1,'FPU_Type::RESERVED0()'],['../structDWT__Type.html#addd893d655ed90d40705b20170daac59',1,'DWT_Type::RESERVED0()'],['../structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9',1,'TPI_Type::RESERVED0()']]],
-  ['reserved1',['RESERVED1',['../structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce',1,'ITM_Type::RESERVED1()'],['../structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4',1,'DWT_Type::RESERVED1()'],['../structTPI__Type.html#ac3956fe93987b725d89d3be32738da12',1,'TPI_Type::RESERVED1()']]],
-  ['reserved2',['RESERVED2',['../structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72',1,'NVIC_Type::RESERVED2()'],['../structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b',1,'ITM_Type::RESERVED2()'],['../structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738',1,'DWT_Type::RESERVED2()'],['../structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096',1,'TPI_Type::RESERVED2()']]],
+  ['reserved0',['RESERVED0',['../structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80',1,'NVIC_Type::RESERVED0()'],['../structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6',1,'SCB_Type::RESERVED0()'],['../structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1',1,'SCnSCB_Type::RESERVED0()'],['../structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36',1,'FPU_Type::RESERVED0()'],['../structDWT__Type.html#addd893d655ed90d40705b20170daac59',1,'DWT_Type::RESERVED0()'],['../structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9',1,'TPI_Type::RESERVED0()']]],
+  ['reserved1',['RESERVED1',['../structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4',1,'DWT_Type::RESERVED1()'],['../structTPI__Type.html#ac3956fe93987b725d89d3be32738da12',1,'TPI_Type::RESERVED1()']]],
+  ['reserved2',['RESERVED2',['../structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72',1,'NVIC_Type::RESERVED2()'],['../structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738',1,'DWT_Type::RESERVED2()'],['../structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096',1,'TPI_Type::RESERVED2()']]],
   ['reserved3',['RESERVED3',['../structNVIC__Type.html#a9dd330835dbf21471e7b5be8692d77ab',1,'NVIC_Type::RESERVED3()'],['../structTPI__Type.html#a31700c8cdd26e4c094db72af33d9f24c',1,'TPI_Type::RESERVED3()']]],
   ['reserved4',['RESERVED4',['../structNVIC__Type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790',1,'NVIC_Type::RESERVED4()'],['../structTPI__Type.html#a684071216fafee4e80be6aaa932cec46',1,'TPI_Type::RESERVED4()']]],
   ['reserved5',['RESERVED5',['../structNVIC__Type.html#a4f753b4f824270175af045ac99bc12e8',1,'NVIC_Type::RESERVED5()'],['../structTPI__Type.html#a3f80dd93f6bab6524603a7aa58de9a30',1,'TPI_Type::RESERVED5()']]],

docs/Core/html/search/groups_4.js

@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['mpu_20functions_20for_20armv7_2dm',['MPU Functions for ARMv7-M',['../group__mpu__functions.html',1,'']]]
+  ['mpu_20functions_20for_20armv7_2dm',['MPU Functions for Armv7-M',['../group__mpu__functions.html',1,'']]]
 ];

docs/Core/html/search/groups_9.js

@@ -1,4 +1,4 @@
 var searchData=
 [
-  ['trustzone_20for_20armv8_2dm',['TrustZone for ARMv8-M',['../group__trustzone__functions.html',1,'']]]
+  ['trustzone_20for_20armv8_2dm',['TrustZone for Armv8-M',['../group__trustzone__functions.html',1,'']]]
 ];

docs/Core/html/search/pages_7.js

@@ -1,7 +1,7 @@
 var searchData=
 [
-  ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic ARM Processors',['../using_ARM_pg.html',1,'using_pg']]],
+  ['using_20cmsis_20with_20generic_20arm_20processors',['Using CMSIS with generic Arm Processors',['../using_ARM_pg.html',1,'using_pg']]],
   ['using_20cmsis_20in_20embedded_20applications',['Using CMSIS in Embedded Applications',['../using_pg.html',1,'']]],
-  ['using_20trustzone_20for_20armv8_2dm',['Using TrustZone for ARMv8-M',['../using_TrustZone_pg.html',1,'']]],
+  ['using_20trustzone_20for_20armv8_2dm',['Using TrustZone for Armv8-M',['../using_TrustZone_pg.html',1,'']]],
   ['using_20interrupt_20vector_20remap',['Using Interrupt Vector Remap',['../using_VTOR_pg.html',1,'using_pg']]]
 ];

docs/Core/html/search/variables_3.js

@@ -4,6 +4,10 @@ var searchData=
   ['calib',['CALIB',['../structSysTick__Type.html#afcadb0c6d35b21cdc0018658a13942de',1,'SysTick_Type']]],
   ['ccr',['CCR',['../structSCB__Type.html#a2d6653b0b70faac936046a02809b577f',1,'SCB_Type']]],
   ['cfsr',['CFSR',['../structSCB__Type.html#a0cda9e061b42373383418663092ad19a',1,'SCB_Type']]],
+  ['cid0',['CID0',['../structITM__Type.html#a30bb2b166b1723867da4a708935677ba',1,'ITM_Type']]],
+  ['cid1',['CID1',['../structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f',1,'ITM_Type']]],
+  ['cid2',['CID2',['../structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d',1,'ITM_Type']]],
+  ['cid3',['CID3',['../structITM__Type.html#a43451f43f514108d9eaed5b017f8d921',1,'ITM_Type']]],
   ['claimclr',['CLAIMCLR',['../structTPI__Type.html#a0e10e292cb019a832b03ddd055b2f6ac',1,'TPI_Type']]],
   ['claimset',['CLAIMSET',['../structTPI__Type.html#af8b7d15fa5252b733dd4b11fa1b5730a',1,'TPI_Type']]],
   ['comp0',['COMP0',['../structDWT__Type.html#a61c2965af5bc0643f9af65620b0e67c9',1,'DWT_Type']]],

docs/Core/html/search/variables_4.js

@@ -3,6 +3,7 @@ var searchData=
   ['dcrdr',['DCRDR',['../structCoreDebug__Type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55',1,'CoreDebug_Type']]],
   ['dcrsr',['DCRSR',['../structCoreDebug__Type.html#af907cf64577eaf927dac6787df6dd98b',1,'CoreDebug_Type']]],
   ['demcr',['DEMCR',['../structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee',1,'CoreDebug_Type']]],
+  ['devarch',['DEVARCH',['../structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537',1,'ITM_Type']]],
   ['devid',['DEVID',['../structTPI__Type.html#abc0ecda8a5446bc754080276bad77514',1,'TPI_Type']]],
   ['devtype',['DEVTYPE',['../structTPI__Type.html#ad98855854a719bbea33061e71529a472',1,'TPI_Type']]],
   ['dfr',['DFR',['../structSCB__Type.html#a85dd6fe77aab17e7ea89a52c59da6004',1,'SCB_Type']]],

docs/Core/html/search/variables_8.js

@@ -5,7 +5,9 @@ var searchData=
   ['icpr',['ICPR',['../structNVIC__Type.html#a8d8f45d9c5c67bba3c153c55574bac95',1,'NVIC_Type']]],
   ['icsr',['ICSR',['../structSCB__Type.html#a0ca18ef984d132c6bf4d9b61cd00f05a',1,'SCB_Type']]],
   ['ictr',['ICTR',['../structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762',1,'SCnSCB_Type']]],
+  ['imcr',['IMCR',['../structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0',1,'ITM_Type']]],
   ['ip',['IP',['../structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd',1,'NVIC_Type']]],
+  ['irr',['IRR',['../structITM__Type.html#a66eb82a070953f09909f39b8e516fb91',1,'ITM_Type']]],
   ['isar',['ISAR',['../structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066',1,'SCB_Type']]],
   ['iser',['ISER',['../structNVIC__Type.html#a9fccef5a60a0d5e81fcd7869a6274f47',1,'NVIC_Type']]],
   ['ispr',['ISPR',['../structNVIC__Type.html#a8f731a9f428efc86e8d311b52ce823d0',1,'NVIC_Type']]],
@@ -14,5 +16,6 @@ var searchData=
   ['itatbctr0',['ITATBCTR0',['../structTPI__Type.html#aaa573b2e073e76e93c51ecec79c616d0',1,'TPI_Type']]],
   ['itatbctr2',['ITATBCTR2',['../structTPI__Type.html#ab358319b969d3fed0f89bbe33e9f1652',1,'TPI_Type']]],
   ['itctrl',['ITCTRL',['../structTPI__Type.html#aaa4c823c10f115f7517c82ef86a5a68d',1,'TPI_Type']]],
-  ['itm_5frxbuffer',['ITM_RxBuffer',['../group__ITM__Debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8',1,'Ref_Debug.txt']]]
+  ['itm_5frxbuffer',['ITM_RxBuffer',['../group__ITM__Debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8',1,'Ref_Debug.txt']]],
+  ['iwr',['IWR',['../structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94',1,'ITM_Type']]]
 ];

docs/Core/html/search/variables_9.js

@@ -1,5 +1,7 @@
 var searchData=
 [
+  ['lar',['LAR',['../structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5',1,'ITM_Type']]],
   ['load',['LOAD',['../structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd',1,'SysTick_Type']]],
+  ['lsr',['LSR',['../structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8',1,'ITM_Type']]],
   ['lsucnt',['LSUCNT',['../structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1',1,'DWT_Type']]]
 ];

docs/Core/html/search/variables_c.js

@@ -2,5 +2,13 @@ var searchData=
 [
   ['pcsr',['PCSR',['../structDWT__Type.html#a6353ca1d1ad9bc1be05d3b5632960113',1,'DWT_Type']]],
   ['pfr',['PFR',['../structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d',1,'SCB_Type']]],
-  ['port',['PORT',['../structITM__Type.html#af4c205be465780a20098387120bdb482',1,'ITM_Type']]]
+  ['pid0',['PID0',['../structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a',1,'ITM_Type']]],
+  ['pid1',['PID1',['../structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4',1,'ITM_Type']]],
+  ['pid2',['PID2',['../structITM__Type.html#a8471c4d77b7107cf580587509da69f38',1,'ITM_Type']]],
+  ['pid3',['PID3',['../structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3',1,'ITM_Type']]],
+  ['pid4',['PID4',['../structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158',1,'ITM_Type']]],
+  ['pid5',['PID5',['../structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37',1,'ITM_Type']]],
+  ['pid6',['PID6',['../structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6',1,'ITM_Type']]],
+  ['pid7',['PID7',['../structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d',1,'ITM_Type']]],
+  ['port',['PORT',['../structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e',1,'ITM_Type']]]
 ];

docs/Core/html/search/variables_e.js

@@ -8,9 +8,9 @@ var searchData=
   ['rbar_5fa1',['RBAR_A1',['../structMPU__Type.html#af8b510a85b175edfd8dd8cc93e967066',1,'MPU_Type']]],
   ['rbar_5fa2',['RBAR_A2',['../structMPU__Type.html#a80d534f0dfc080c841e1772c7a68e1a2',1,'MPU_Type']]],
   ['rbar_5fa3',['RBAR_A3',['../structMPU__Type.html#a207f6e9c3af753367554cc06df300a55',1,'MPU_Type']]],
-  ['reserved0',['RESERVED0',['../structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80',1,'NVIC_Type::RESERVED0()'],['../structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6',1,'SCB_Type::RESERVED0()'],['../structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1',1,'SCnSCB_Type::RESERVED0()'],['../structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e',1,'ITM_Type::RESERVED0()'],['../structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36',1,'FPU_Type::RESERVED0()'],['../structDWT__Type.html#addd893d655ed90d40705b20170daac59',1,'DWT_Type::RESERVED0()'],['../structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9',1,'TPI_Type::RESERVED0()']]],
-  ['reserved1',['RESERVED1',['../structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce',1,'ITM_Type::RESERVED1()'],['../structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4',1,'DWT_Type::RESERVED1()'],['../structTPI__Type.html#ac3956fe93987b725d89d3be32738da12',1,'TPI_Type::RESERVED1()']]],
-  ['reserved2',['RESERVED2',['../structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72',1,'NVIC_Type::RESERVED2()'],['../structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b',1,'ITM_Type::RESERVED2()'],['../structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738',1,'DWT_Type::RESERVED2()'],['../structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096',1,'TPI_Type::RESERVED2()']]],
+  ['reserved0',['RESERVED0',['../structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80',1,'NVIC_Type::RESERVED0()'],['../structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6',1,'SCB_Type::RESERVED0()'],['../structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1',1,'SCnSCB_Type::RESERVED0()'],['../structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36',1,'FPU_Type::RESERVED0()'],['../structDWT__Type.html#addd893d655ed90d40705b20170daac59',1,'DWT_Type::RESERVED0()'],['../structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9',1,'TPI_Type::RESERVED0()']]],
+  ['reserved1',['RESERVED1',['../structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4',1,'DWT_Type::RESERVED1()'],['../structTPI__Type.html#ac3956fe93987b725d89d3be32738da12',1,'TPI_Type::RESERVED1()']]],
+  ['reserved2',['RESERVED2',['../structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72',1,'NVIC_Type::RESERVED2()'],['../structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738',1,'DWT_Type::RESERVED2()'],['../structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096',1,'TPI_Type::RESERVED2()']]],
   ['reserved3',['RESERVED3',['../structNVIC__Type.html#a9dd330835dbf21471e7b5be8692d77ab',1,'NVIC_Type::RESERVED3()'],['../structTPI__Type.html#a31700c8cdd26e4c094db72af33d9f24c',1,'TPI_Type::RESERVED3()']]],
   ['reserved4',['RESERVED4',['../structNVIC__Type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790',1,'NVIC_Type::RESERVED4()'],['../structTPI__Type.html#a684071216fafee4e80be6aaa932cec46',1,'TPI_Type::RESERVED4()']]],
   ['reserved5',['RESERVED5',['../structNVIC__Type.html#a4f753b4f824270175af045ac99bc12e8',1,'NVIC_Type::RESERVED5()'],['../structTPI__Type.html#a3f80dd93f6bab6524603a7aa58de9a30',1,'TPI_Type::RESERVED5()']]],

docs/Core/html/startup_s_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -150,7 +150,7 @@ $(document).ready(function(){initNavTree('startup_s_pg.html','');});
 <div class="line">                B       .</div>
 </div><!-- fragment --><h1><a class="anchor" id="startup_s_sec"></a>
 startup_Device.s Template File</h1>
-<p>An ARM Compiler <a class="el" href="startup_s_pg.html#startup_s_sec">startup_Device.s Template File</a> for an ARMv7-M processor like Cortex-M3 is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.</p>
+<p>An Arm Compiler <a class="el" href="startup_s_pg.html#startup_s_sec">startup_Device.s Template File</a> for an Armv7-M processor like Cortex-M3 is shown below. The files for other compiler vendors differ slightly in the syntax, but not in the overall structure.</p>
 <pre class="fragment">;/**************************************************************************//**
 ; * @file     startup_&lt;Device&gt;.s
 ; * @brief    CMSIS Cortex-M ARMv7-M based Core Device Startup File for
@@ -349,7 +349,7 @@ __user_initial_stackheap PROC
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structARM__MPU__Region__t.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -116,7 +116,7 @@ $(document).ready(function(){initNavTree('structARM__MPU__Region__t.html','');})
   <div class="summary">
 <a href="#pub-attribs">Data Fields</a>  </div>
   <div class="headertitle">
-<div class="title">ARM_MPU_Region_t Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for ARMv7-M</a></div></div>  </div>
+<div class="title">ARM_MPU_Region_t Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -169,7 +169,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structCoreDebug__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -193,7 +193,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structCoreDebug__Type.html">CoreDebug_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structDWT__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -478,7 +478,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structDWT__Type.html">DWT_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structFPU__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -223,7 +223,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structFPU__Type.html">FPU_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structITM__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -125,84 +125,303 @@ $(document).ready(function(){initNavTree('structITM__Type.html','');});
 <table class="memberdecls">
 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
 Data Fields</h2></td></tr>
-<tr class="memitem:af4c205be465780a20098387120bdb482"><td class="memItemLeft" >union {</td></tr>
+<tr class="memitem:af95bc1810f9ea802d628cb9dea81e02e"><td class="memItemLeft" >union {</td></tr>
 <tr class="memitem:a19715ce0fd48d4015c27db6d0a41d49a"><td class="memItemLeft" >&#160;&#160;&#160;__OM uint8_t&#160;&#160;&#160;<a class="el" href="structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275">u8</a></td></tr>
-<tr class="memdesc:a19715ce0fd48d4015c27db6d0a41d49a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 8-bit.  <a href="#a19715ce0fd48d4015c27db6d0a41d49a">More...</a><br/></td></tr>
 <tr class="separator:a19715ce0fd48d4015c27db6d0a41d49a"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:add6779a5b967324d2700661c93283103"><td class="memItemLeft" >&#160;&#160;&#160;__OM uint16_t&#160;&#160;&#160;<a class="el" href="structITM__Type.html#a962a970dfd286cad7f8a8577e87d4ad3">u16</a></td></tr>
-<tr class="memdesc:add6779a5b967324d2700661c93283103"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 16-bit.  <a href="#add6779a5b967324d2700661c93283103">More...</a><br/></td></tr>
 <tr class="separator:add6779a5b967324d2700661c93283103"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="memItemLeft" >&#160;&#160;&#160;__OM uint32_t&#160;&#160;&#160;<a class="el" href="structITM__Type.html#a5834885903a557674f078f3b71fa8bc8">u32</a></td></tr>
-<tr class="memdesc:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port 32-bit.  <a href="#a74a1dd7cc6bced8cb3b1da2ce6ea7eed">More...</a><br/></td></tr>
 <tr class="separator:a74a1dd7cc6bced8cb3b1da2ce6ea7eed"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af4c205be465780a20098387120bdb482"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#af4c205be465780a20098387120bdb482">PORT</a> [32]</td></tr>
-<tr class="memdesc:af4c205be465780a20098387120bdb482"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0x000 ( /W) ITM Stimulus Port Registers.  <a href="#af4c205be465780a20098387120bdb482">More...</a><br/></td></tr>
-<tr class="separator:af4c205be465780a20098387120bdb482"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:a2c5ae30385b5f370d023468ea9914c0e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e">RESERVED0</a> [864]</td></tr>
-<tr class="memdesc:a2c5ae30385b5f370d023468ea9914c0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#a2c5ae30385b5f370d023468ea9914c0e">More...</a><br/></td></tr>
-<tr class="separator:a2c5ae30385b5f370d023468ea9914c0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af95bc1810f9ea802d628cb9dea81e02e"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e">PORT</a> [32U]</td></tr>
+<tr class="separator:af95bc1810f9ea802d628cb9dea81e02e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:acd03c6858f7b678dab6a6121462e7807"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#acd03c6858f7b678dab6a6121462e7807">TER</a></td></tr>
-<tr class="memdesc:acd03c6858f7b678dab6a6121462e7807"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0xE00 (R/W) ITM Trace Enable Register.  <a href="#acd03c6858f7b678dab6a6121462e7807">More...</a><br/></td></tr>
 <tr class="separator:acd03c6858f7b678dab6a6121462e7807"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:afffce5b93bbfedbaee85357d0b07ebce"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce">RESERVED1</a> [15]</td></tr>
-<tr class="memdesc:afffce5b93bbfedbaee85357d0b07ebce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#afffce5b93bbfedbaee85357d0b07ebce">More...</a><br/></td></tr>
-<tr class="separator:afffce5b93bbfedbaee85357d0b07ebce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ae907229ba50538bf370fbdfd54c099a2"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2">TPR</a></td></tr>
-<tr class="memdesc:ae907229ba50538bf370fbdfd54c099a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0xE40 (R/W) ITM Trace Privilege Register.  <a href="#ae907229ba50538bf370fbdfd54c099a2">More...</a><br/></td></tr>
 <tr class="separator:ae907229ba50538bf370fbdfd54c099a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b">RESERVED2</a> [15]</td></tr>
-<tr class="memdesc:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved.  <a href="#af56b2f07bc6b42cd3e4d17e1b27cff7b">More...</a><br/></td></tr>
-<tr class="separator:af56b2f07bc6b42cd3e4d17e1b27cff7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a04b9fbc83759cb818dfa161d39628426"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a04b9fbc83759cb818dfa161d39628426">TCR</a></td></tr>
-<tr class="memdesc:a04b9fbc83759cb818dfa161d39628426"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset: 0xE80 (R/W) ITM Trace Control Register.  <a href="#a04b9fbc83759cb818dfa161d39628426">More...</a><br/></td></tr>
 <tr class="separator:a04b9fbc83759cb818dfa161d39628426"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa9da04891e48d1a2f054de186e9c4c94"><td class="memItemLeft" align="right" valign="top">__OM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94">IWR</a></td></tr>
+<tr class="separator:aa9da04891e48d1a2f054de186e9c4c94"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a66eb82a070953f09909f39b8e516fb91"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a66eb82a070953f09909f39b8e516fb91">IRR</a></td></tr>
+<tr class="separator:a66eb82a070953f09909f39b8e516fb91"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ae2ce4d3a54df2fd11a197ccac4406cd0"><td class="memItemLeft" align="right" valign="top">__IOM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0">IMCR</a></td></tr>
+<tr class="separator:ae2ce4d3a54df2fd11a197ccac4406cd0"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a7f9c2a2113a11c7f3e98915f95b669d5"><td class="memItemLeft" align="right" valign="top">__OM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5">LAR</a></td></tr>
+<tr class="separator:a7f9c2a2113a11c7f3e98915f95b669d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a3861c67933a24dd6632288c4ed0b80c8"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8">LSR</a></td></tr>
+<tr class="separator:a3861c67933a24dd6632288c4ed0b80c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a2372a4ebb63e36d1eb3fcf83a74fd537"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537">DEVARCH</a></td></tr>
+<tr class="separator:a2372a4ebb63e36d1eb3fcf83a74fd537"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aad5e11dd4baf6d941bd6c7450f60a158"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158">PID4</a></td></tr>
+<tr class="separator:aad5e11dd4baf6d941bd6c7450f60a158"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af9085648bf18f69b5f9d1136d45e1d37"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37">PID5</a></td></tr>
+<tr class="separator:af9085648bf18f69b5f9d1136d45e1d37"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ad34dbe6b1072c77d36281049c8b169f6"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6">PID6</a></td></tr>
+<tr class="separator:ad34dbe6b1072c77d36281049c8b169f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a2bcec6803f28f30d5baf5e20e3517d3d"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d">PID7</a></td></tr>
+<tr class="separator:a2bcec6803f28f30d5baf5e20e3517d3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ab4a4cc97ad658e9c46cf17490daffb8a"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a">PID0</a></td></tr>
+<tr class="separator:ab4a4cc97ad658e9c46cf17490daffb8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a89ea1d805a668d6589b22d8e678eb6a4"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4">PID1</a></td></tr>
+<tr class="separator:a89ea1d805a668d6589b22d8e678eb6a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a8471c4d77b7107cf580587509da69f38"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a8471c4d77b7107cf580587509da69f38">PID2</a></td></tr>
+<tr class="separator:a8471c4d77b7107cf580587509da69f38"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:af317d5e2d946d70e6fb67c02b92cc8a3"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3">PID3</a></td></tr>
+<tr class="separator:af317d5e2d946d70e6fb67c02b92cc8a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a30bb2b166b1723867da4a708935677ba"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a30bb2b166b1723867da4a708935677ba">CID0</a></td></tr>
+<tr class="separator:a30bb2b166b1723867da4a708935677ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:ac40df2c3a6cef02f90b4e82c8204756f"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f">CID1</a></td></tr>
+<tr class="separator:ac40df2c3a6cef02f90b4e82c8204756f"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a8000b92e4e528ae7ac4cb8b8d9f6757d"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d">CID2</a></td></tr>
+<tr class="separator:a8000b92e4e528ae7ac4cb8b8d9f6757d"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:a43451f43f514108d9eaed5b017f8d921"><td class="memItemLeft" align="right" valign="top">__IM uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structITM__Type.html#a43451f43f514108d9eaed5b017f8d921">CID3</a></td></tr>
+<tr class="separator:a43451f43f514108d9eaed5b017f8d921"><td class="memSeparator" colspan="2">&#160;</td></tr>
 </table>
 <h2 class="groupheader">Field Documentation</h2>
-<a class="anchor" id="af4c205be465780a20098387120bdb482"></a>
+<a class="anchor" id="a30bb2b166b1723867da4a708935677ba"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">__OM { ... }    ITM_Type::PORT[32]</td>
+          <td class="memname">__IM uint32_t ITM_Type::CID0</td>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 </p>
 
 </div>
 </div>
-<a class="anchor" id="a2c5ae30385b5f370d023468ea9914c0e"></a>
+<a class="anchor" id="ac40df2c3a6cef02f90b4e82c8204756f"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">uint32_t ITM_Type::RESERVED0[864]</td>
+          <td class="memname">__IM uint32_t ITM_Type::CID1</td>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 </p>
 
 </div>
 </div>
-<a class="anchor" id="afffce5b93bbfedbaee85357d0b07ebce"></a>
+<a class="anchor" id="a8000b92e4e528ae7ac4cb8b8d9f6757d"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">uint32_t ITM_Type::RESERVED1[15]</td>
+          <td class="memname">__IM uint32_t ITM_Type::CID2</td>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 </p>
 
 </div>
 </div>
-<a class="anchor" id="af56b2f07bc6b42cd3e4d17e1b27cff7b"></a>
+<a class="anchor" id="a43451f43f514108d9eaed5b017f8d921"></a>
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">uint32_t ITM_Type::RESERVED2[15]</td>
+          <td class="memname">__IM uint32_t ITM_Type::CID3</td>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xFFC (R/ ) ITM Component Identification Register #3 </p>
+
+</div>
+</div>
+<a class="anchor" id="a2372a4ebb63e36d1eb3fcf83a74fd537"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::DEVARCH</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFBC (R/ ) ITM Device Architecture Register (Cortex-M33 only) </p>
+
+</div>
+</div>
+<a class="anchor" id="ae2ce4d3a54df2fd11a197ccac4406cd0"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IOM uint32_t ITM_Type::IMCR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xF00 (R/W) ITM Integration Mode Control Register </p>
+
+</div>
+</div>
+<a class="anchor" id="a66eb82a070953f09909f39b8e516fb91"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::IRR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xEFC (R/ ) ITM Integration Read Register </p>
+
+</div>
+</div>
+<a class="anchor" id="aa9da04891e48d1a2f054de186e9c4c94"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__OM uint32_t ITM_Type::IWR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xEF8 ( /W) ITM Integration Write Register </p>
+
+</div>
+</div>
+<a class="anchor" id="a7f9c2a2113a11c7f3e98915f95b669d5"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__OM uint32_t ITM_Type::LAR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFB0 ( /W) ITM Lock Access Register </p>
+
+</div>
+</div>
+<a class="anchor" id="a3861c67933a24dd6632288c4ed0b80c8"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::LSR</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFB4 (R/ ) ITM Lock Status Register </p>
+
+</div>
+</div>
+<a class="anchor" id="ab4a4cc97ad658e9c46cf17490daffb8a"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID0</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 </p>
+
+</div>
+</div>
+<a class="anchor" id="a89ea1d805a668d6589b22d8e678eb6a4"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID1</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 </p>
+
+</div>
+</div>
+<a class="anchor" id="a8471c4d77b7107cf580587509da69f38"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 </p>
+
+</div>
+</div>
+<a class="anchor" id="af317d5e2d946d70e6fb67c02b92cc8a3"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID3</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 </p>
+
+</div>
+</div>
+<a class="anchor" id="aad5e11dd4baf6d941bd6c7450f60a158"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID4</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 </p>
+
+</div>
+</div>
+<a class="anchor" id="af9085648bf18f69b5f9d1136d45e1d37"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID5</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 </p>
+
+</div>
+</div>
+<a class="anchor" id="ad34dbe6b1072c77d36281049c8b169f6"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID6</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 </p>
+
+</div>
+</div>
+<a class="anchor" id="a2bcec6803f28f30d5baf5e20e3517d3d"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__IM uint32_t ITM_Type::PID7</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 </p>
+
+</div>
+</div>
+<a class="anchor" id="af95bc1810f9ea802d628cb9dea81e02e"></a>
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">__OM { ... }    ITM_Type::PORT[32U]</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Offset: 0x000 ( /W) ITM Stimulus Port Registers </p>
 
 </div>
 </div>
@@ -215,6 +434,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xE80 (R/W) ITM Trace Control Register </p>
 
 </div>
 </div>
@@ -227,6 +447,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xE00 (R/W) ITM Trace Enable Register </p>
 
 </div>
 </div>
@@ -239,6 +460,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0xE40 (R/W) ITM Trace Privilege Register </p>
 
 </div>
 </div>
@@ -251,6 +473,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0x000 ( /W) ITM Stimulus Port 16-bit </p>
 
 </div>
 </div>
@@ -263,6 +486,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0x000 ( /W) ITM Stimulus Port 32-bit </p>
 
 </div>
 </div>
@@ -275,6 +499,7 @@ Data Fields</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
+<p>Offset: 0x000 ( /W) ITM Stimulus Port 8-bit </p>
 
 </div>
 </div>
@@ -284,7 +509,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structITM__Type.html">ITM_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structITM__Type.js

@@ -1,9 +1,24 @@
 var structITM__Type =
 [
-    [ "PORT", "structITM__Type.html#af4c205be465780a20098387120bdb482", null ],
-    [ "RESERVED0", "structITM__Type.html#a2c5ae30385b5f370d023468ea9914c0e", null ],
-    [ "RESERVED1", "structITM__Type.html#afffce5b93bbfedbaee85357d0b07ebce", null ],
-    [ "RESERVED2", "structITM__Type.html#af56b2f07bc6b42cd3e4d17e1b27cff7b", null ],
+    [ "CID0", "structITM__Type.html#a30bb2b166b1723867da4a708935677ba", null ],
+    [ "CID1", "structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f", null ],
+    [ "CID2", "structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d", null ],
+    [ "CID3", "structITM__Type.html#a43451f43f514108d9eaed5b017f8d921", null ],
+    [ "DEVARCH", "structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537", null ],
+    [ "IMCR", "structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0", null ],
+    [ "IRR", "structITM__Type.html#a66eb82a070953f09909f39b8e516fb91", null ],
+    [ "IWR", "structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94", null ],
+    [ "LAR", "structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5", null ],
+    [ "LSR", "structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8", null ],
+    [ "PID0", "structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a", null ],
+    [ "PID1", "structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4", null ],
+    [ "PID2", "structITM__Type.html#a8471c4d77b7107cf580587509da69f38", null ],
+    [ "PID3", "structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3", null ],
+    [ "PID4", "structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158", null ],
+    [ "PID5", "structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37", null ],
+    [ "PID6", "structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6", null ],
+    [ "PID7", "structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d", null ],
+    [ "PORT", "structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e", null ],
     [ "TCR", "structITM__Type.html#a04b9fbc83759cb818dfa161d39628426", null ],
     [ "TER", "structITM__Type.html#acd03c6858f7b678dab6a6121462e7807", null ],
     [ "TPR", "structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2", null ],

docs/Core/html/structMPU__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -116,7 +116,7 @@ $(document).ready(function(){initNavTree('structMPU__Type.html','');});
   <div class="summary">
 <a href="#pub-attribs">Data Fields</a>  </div>
   <div class="headertitle">
-<div class="title">MPU_Type Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for ARMv7-M</a></div></div>  </div>
+<div class="title">MPU_Type Struct Reference<div class="ingroups"><a class="el" href="group__mpu__functions.html">MPU Functions for Armv7-M</a></div></div>  </div>
 </div><!--header-->
 <div class="contents">
 
@@ -366,13 +366,13 @@ Data Fields</h2></td></tr>
 <tr>
 <td align="left">[31:24] </td><td align="left">- </td><td align="left">Reserved. </td></tr>
 <tr>
-<td align="left">[23:16] </td><td align="left">IREGION </td><td align="left">Instruction region. RAZ. ARMv7-M only supports a unified MPU. </td></tr>
+<td align="left">[23:16] </td><td align="left">IREGION </td><td align="left">Instruction region. RAZ. Armv7-M only supports a unified MPU. </td></tr>
 <tr>
 <td align="left">[15:8] </td><td align="left">DREGION </td><td align="left">Number of regions supported by the MPU. If this field reads-as-zero the processor does not implement an MPU. </td></tr>
 <tr>
 <td align="left">[7:1] </td><td align="left">- </td><td align="left">Reserved. </td></tr>
 <tr>
-<td align="left">[0] </td><td align="left">SEPARATE </td><td align="left">Indicates support for separate instruction and data address maps. RAZ. ARMv7-M only supports a unified MPU. </td></tr>
+<td align="left">[0] </td><td align="left">SEPARATE </td><td align="left">Indicates support for separate instruction and data address maps. RAZ. Armv7-M only supports a unified MPU. </td></tr>
 </table>
 
 </div>
@@ -383,7 +383,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structMPU__Type.html">MPU_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structNVIC__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -328,7 +328,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structNVIC__Type.html">NVIC_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structSCB__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -448,7 +448,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structSCB__Type.html">SCB_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structSCnSCB__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -178,7 +178,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structSCnSCB__Type.html">SCnSCB_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structSysTick__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -193,7 +193,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structSysTick__Type.html">SysTick_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/structTPI__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -493,7 +493,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="structTPI__Type.html">TPI_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/system_c_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -122,10 +122,10 @@ system_Device.c Template File</h1>
  * @brief    CMSIS Cortex-M# Device Peripheral Access Layer Source File for
  *           Device &lt;Device&gt;
  * @version  V5.00
- * @date     28. September 2016
+ * @date     10. January 2018
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -194,10 +194,10 @@ system_Device.h Template File</h1>
  * @brief    CMSIS Cortex-M# Device Peripheral Access Layer Header File for
  *           Device &lt;Device&gt;
  * @version  V5.00
- * @date     02. March 2016
+ * @date     10. January 2018
  ******************************************************************************/
 /*
- * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -253,7 +253,7 @@ extern void SystemCoreClockUpdate (void);
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/templates_pg.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -111,7 +111,7 @@ $(document).ready(function(){initNavTree('templates_pg.html','');});
 <div class="title">CMSIS-Core Device Templates </div>  </div>
 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p>ARM supplies CMSIS-Core device template files for the all supported Cortex-M processors and various compiler vendors. Refer to the list of <a class="el" href="index.html#tested_tools_sec">Tested and Verified Toolchains</a> for compliance.</p>
+<div class="textblock"><p>Arm supplies CMSIS-Core device template files for the all supported Cortex-M processors and various compiler vendors. Refer to the list of <a class="el" href="index.html#tested_tools_sec">Tested and Verified Toolchains</a> for compliance.</p>
 <p>These CMSIS-Core device template files include the following:</p>
 <ul>
 <li>Register names of the Core Peripherals and names of the Core Exception Vectors.</li>
@@ -125,7 +125,7 @@ $(document).ready(function(){initNavTree('templates_pg.html','');});
 CMSIS-Core File Structure</div></div>
  <h1><a class="anchor" id="CMSIS_Processor_files"></a>
 CMSIS-Core Processor Files</h1>
-<p>The CMSIS-Core processor files provided by ARM are in the directory .\CMSIS\Core\Include. These header files define all processor specific attributes do not need any modifications. The <b>core_&lt;cpu&gt;.h</b> defines the core peripherals and provides helper functions that access the core registers. One file is available for each supported Cortex-M processor:</p>
+<p>The CMSIS-Core processor files provided by Arm are in the directory .\CMSIS\Core\Include. These header files define all processor specific attributes do not need any modifications. The <b>core_&lt;cpu&gt;.h</b> defines the core peripherals and provides helper functions that access the core registers. One file is available for each supported Cortex-M processor:</p>
 <table class="doxtable">
 <tr>
 <th align="left">Header File </th><th align="left">Processor  </th></tr>
@@ -148,9 +148,9 @@ CMSIS-Core Processor Files</h1>
 <tr>
 <td align="left">core_sc300.h </td><td align="left">for the SecurCore SC300 processor </td></tr>
 <tr>
-<td align="left">core_armv8mbl.h </td><td align="left">for the ARMv8-M Baseline processor </td></tr>
+<td align="left">core_armv8mbl.h </td><td align="left">for the Armv8-M Baseline processor </td></tr>
 <tr>
-<td align="left">core_armv8mml.h </td><td align="left">for the ARMv8-M Mainline processor </td></tr>
+<td align="left">core_armv8mml.h </td><td align="left">for the Armv8-M Mainline processor </td></tr>
 </table>
 <h1><a class="anchor" id="device_examples"></a>
 Device Examples</h1>
@@ -193,19 +193,19 @@ Device Examples</h1>
 <tr>
 <td align="left">ARM SC300 </td><td align="left">ARM SC300 </td><td align="left">SC300 based device </td></tr>
 <tr>
-<td align="left">ARMv8-M Baseline </td><td align="left">ARMv8MBL </td><td align="left">ARMv8-M Baseline based device with TrustZone </td></tr>
+<td align="left">ARMv8-M Baseline </td><td align="left">ARMv8MBL </td><td align="left">Armv8-M Baseline based device with TrustZone </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML </td><td align="left">ARMv8-M Mainline based device with TrustZone </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML </td><td align="left">Armv8-M Mainline based device with TrustZone </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DP </td><td align="left">ARMv8-M Mainline based device with TrustZone and double precision FPU </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DP </td><td align="left">Armv8-M Mainline based device with TrustZone and double precision FPU </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_SP </td><td align="left">ARMv8-M Mainline based device with TrustZone and single precision FPU </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_SP </td><td align="left">Armv8-M Mainline based device with TrustZone and single precision FPU </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP </td><td align="left">ARMv8-M Mainline based device with TrustZone and SIMD </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP </td><td align="left">Armv8-M Mainline based device with TrustZone and SIMD </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_DP </td><td align="left">ARMv8-M Mainline based device with TrustZone, SIMD, and double precision FPU </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_DP </td><td align="left">Armv8-M Mainline based device with TrustZone, SIMD, and double precision FPU </td></tr>
 <tr>
-<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_SP </td><td align="left">ARMv8-M Mainline based device with TrustZone, SIMD, and single precision FPU </td></tr>
+<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_SP </td><td align="left">Armv8-M Mainline based device with TrustZone, SIMD, and single precision FPU </td></tr>
 </table>
 <h1><a class="anchor" id="template_files_sec"></a>
 Template Files</h1>
@@ -219,9 +219,9 @@ Template Files</h1>
 <tr>
 <th>Template File </th><th>Description  </th></tr>
 <tr>
-<td>.\Device\_Template_Vendor\Vendor\Device\Source\ARM\startup_Device.s </td><td>Startup file template for ARM C/C++ Compiler.  </td></tr>
+<td>.\Device\_Template_Vendor\Vendor\Device\Source\ARM\startup_Device.s </td><td>Startup file template for Arm C/C++ Compiler.  </td></tr>
 <tr>
-<td>.\Device\_Template_Vendor\Vendor\Device\Source\GCC\startup_Device.s </td><td>Startup file template for GNU GCC ARM Embedded Compiler.  </td></tr>
+<td>.\Device\_Template_Vendor\Vendor\Device\Source\GCC\startup_Device.s </td><td>Startup file template for GNU GCC Arm Embedded Compiler.  </td></tr>
 <tr>
 <td>.\Device\_Template_Vendor\Vendor\Device\Source\IAR\startup_Device.s </td><td>Startup file template for IAR C/C++ Compiler.  </td></tr>
 <tr>
@@ -263,7 +263,7 @@ Template Files</h1>
 <!-- start footer part -->
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:57 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/unionAPSR__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -254,7 +254,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionAPSR__Type.html">APSR_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 

docs/Core/html/unionCONTROL__Type.html

@@ -32,7 +32,7 @@
   <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
   <td style="padding-left: 0.5em;">
    <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.1.0</span>
+   &#160;<span id="projectnumber">Version 5.1.1</span>
    </div>
    <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
   </td>
@@ -224,7 +224,7 @@ Data Fields</h2></td></tr>
 <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
   <ul>
     <li class="navelem"><a class="el" href="unionCONTROL__Type.html">CONTROL_Type</a></li>
-    <li class="footer">Generated on Thu Nov 16 2017 17:05:58 for CMSIS-Core (Cortex-M) by ARM Ltd. All rights reserved.
+    <li class="footer">Generated on Thu Feb 22 2018 10:02:45 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved.
 	<!--
     <a href="http://www.doxygen.org/index.html">
     <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6