CoreValidation: Added test cases for unaligned half-word and word access macro functions.

Change-Id: I48d79209cf8a905812ed5a20dd0ac1aa438c5125

CMSIS/CoreValidation/Include/cmsis_cv.h

@@ -48,6 +48,8 @@ extern void cmsis_cv (void);
   extern void TC_CoreInstr_LoadStoreUnpriv (void);
   extern void TC_CoreInstr_LoadStoreAcquire (void);
   extern void TC_CoreInstr_LoadStoreAcquireExclusive (void);
+  extern void TC_CoreInstr_UnalignedUint16 (void);
+  extern void TC_CoreInstr_UnalignedUint32 (void);
 #endif
 
 #if defined(RTE_CV_CORESIMD) && RTE_CV_CORESIMD

CMSIS/CoreValidation/Source/CV_CoreInstr.c

@@ -744,3 +744,69 @@ void TC_CoreInstr_LoadStoreAcquireExclusive (void) {
   ASSERT_TRUE(TC_CoreInstr_LoadStoreAcquireExclusive_word == u32+1U);
 #endif
 }
+
+
+/**
+\brief Test case: TC_CoreInstr_UnalignedUint16
+\details
+Checks macro functions to access unaligned uint16_t values:
+- __UNALIGNED_UINT16_READ
+- __UNALIGNED_UINT16_WRITE
+*/
+void TC_CoreInstr_UnalignedUint16(void) {
+  uint8_t buffer[3] = { 0U, 0U, 0U };
+  uint16_t val;
+  
+  for(int i=0; i<2; i++) {
+    __UNALIGNED_UINT16_WRITE(&(buffer[i]), 0x4711U);
+    ASSERT_TRUE(buffer[i]       == 0x11U);
+    ASSERT_TRUE(buffer[i+1]     == 0x47U);
+    ASSERT_TRUE(buffer[(i+2)%3] == 0x00U);
+  
+    buffer[i] = 0x12U;
+    buffer[i+1] = 0x46U;
+  
+    val = __UNALIGNED_UINT16_READ(&(buffer[i]));
+    ASSERT_TRUE(val == 0x4612U);
+  
+    buffer[i]   = 0x00U;
+    buffer[i+1] = 0x00U;
+  }
+}
+
+
+/**
+\brief Test case: TC_CoreInstr_UnalignedUint32
+\details
+Checks macro functions to access unaligned uint32_t values:
+- __UNALIGNED_UINT32_READ
+- __UNALIGNED_UINT32_WRITE
+*/
+void TC_CoreInstr_UnalignedUint32(void) {
+  uint8_t buffer[7] = { 0U, 0U, 0U, 0U, 0U, 0U, 0U };
+  uint32_t val;
+  
+  for(int i=0; i<4; i++) {
+    __UNALIGNED_UINT32_WRITE(&(buffer[i]), 0x08154711UL);
+    ASSERT_TRUE(buffer[i+0]     == 0x11U);
+    ASSERT_TRUE(buffer[i+1]     == 0x47U);
+    ASSERT_TRUE(buffer[i+2]     == 0x15U);
+    ASSERT_TRUE(buffer[i+3]     == 0x08U);
+    ASSERT_TRUE(buffer[(i+4)%7] == 0x00U);
+    ASSERT_TRUE(buffer[(i+5)%7] == 0x00U);
+    ASSERT_TRUE(buffer[(i+6)%7] == 0x00U);
+  
+    buffer[i+0] = 0x12U;
+    buffer[i+1] = 0x46U;
+    buffer[i+2] = 0x14U;
+    buffer[i+3] = 0x09U;
+  
+    val = __UNALIGNED_UINT32_READ(&(buffer[i]));
+    ASSERT_TRUE(val == 0x09144612UL);
+  
+    buffer[i+0] = 0x00U;
+    buffer[i+1] = 0x00U;
+    buffer[i+2] = 0x00U;
+    buffer[i+3] = 0x00U;
+  }
+}

CMSIS/CoreValidation/Source/cmsis_cv.c

@@ -63,6 +63,8 @@ static TEST_CASE TC_LIST[] = {
     TCD ( TC_CoreInstr_LoadStoreUnpriv,            TC_COREINSTR_LOADSTOREUNPRIV_EN           ),
     TCD ( TC_CoreInstr_LoadStoreAcquire,           TC_COREINSTR_LOADSTOREACQUIRE_EN          ),
     TCD ( TC_CoreInstr_LoadStoreAcquireExclusive,  TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN ),
+    TCD ( TC_CoreInstr_UnalignedUint16,            TC_COREINSTR_UNALIGNEDUINT16_EN           ),
+    TCD ( TC_CoreInstr_UnalignedUint32,            TC_COREINSTR_UNALIGNEDUINT32_EN           ),
 
   #elif defined(__CORTEX_A)
     TCD (TC_CoreInstr_NOP,                         TC_COREINSTR_NOP_EN                 ),

CMSIS/CoreValidation/Tests/Cortex-M0/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0plus/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0plus/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0plus/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M0plus/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23NS/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23NS/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23NS/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23S/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23S/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M23S/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M3/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M3/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M3/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M3/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33NS/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33NS/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33NS/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33S/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33S/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M33S/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4FP/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4FP/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4FP/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M4FP/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7DP/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7DP/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7DP/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7DP/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7SP/AC5/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7SP/AC6/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7SP/GCC/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/Cortex-M7SP/IAR/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1

CMSIS/CoreValidation/Tests/config/core_m/CV_Config.h

@@ -73,6 +73,10 @@
 #define TC_COREINSTR_LOADSTOREACQUIRE_EN           1
 // <q0> TC_CoreInstr_LoadStoreAcquireExclusive
 #define TC_COREINSTR_LOADSTOREACQUIREEXCLUSIVE_EN  1
+// <q0> TC_CoreInstr_UnalignedUint16
+#define TC_COREINSTR_UNALIGNEDUINT16_EN            1
+// <q0> TC_CoreInstr_UnalignedUint32
+#define TC_COREINSTR_UNALIGNEDUINT32_EN            1
 
 // <q0> TC_CoreSimd_SatAddSub
 #define TC_CORESIMD_SATADDSUB_EN                   1