Core: Fixed minor compiler and MISRA warnings.

CMSIS/Core/Include/cmsis_armcc.h

@@ -754,14 +754,11 @@ __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint3
   \param [in]    sat  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __USAT(int32_t val, uint32_t sat) {
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(uint32_t val, uint32_t sat) {
   if (sat <= 31U) {
-    const int32_t max = (int32_t)((1U << sat) - 1U);
-    const int32_t min = 0;
+    const uint32_t max = ((1U << sat) - 1U);
     if (val > max) {
       return max;
-    } else if (val < min) {
-      return min;
     }
   }
   return val;

CMSIS/Core/Include/cmsis_armclang.h

@@ -684,7 +684,7 @@ __attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t
   \details Returns the current value of the Floating Point Status/Control register.
   \return               Floating Point Status/Control register value
  */
-#define __get_FPSCR      __builtin_arm_get_fpscr
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
 
 /**
   \brief   Set FPSCR
@@ -1071,14 +1071,11 @@ __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint3
   \param [in]    sat  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __USAT(int32_t val, uint32_t sat) {
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(uint32_t val, uint32_t sat) {
   if (sat <= 31U) {
-    const int32_t max = (int32_t)((1U << sat) - 1U);
-    const int32_t min = 0;
+    const uint32_t max = ((1U << sat) - 1U);
     if (val > max) {
       return max;
-    } else if (val < min) {
-      return min;
     }
   }
   return val;

CMSIS/Core/Include/cmsis_gcc.h

@@ -1095,11 +1095,12 @@ __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
 /**
   \brief   Signed Saturate
   \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (1..32)
   \return             Saturated value
  */
 #define __SSAT(ARG1,ARG2) \
+__extension__ \
 ({                          \
   int32_t __RES, __ARG1 = (ARG1); \
   __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
@@ -1110,11 +1111,12 @@ __attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
 /**
   \brief   Unsigned Saturate
   \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (0..31)
   \return             Saturated value
  */
 #define __USAT(ARG1,ARG2) \
+ __extension__ \
 ({                          \
   uint32_t __RES, __ARG1 = (ARG1); \
   __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
@@ -1263,14 +1265,11 @@ __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint3
   \param [in]    sat  Bit position to saturate to (0..31)
   \return             Saturated value
  */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __USAT(int32_t val, uint32_t sat) {
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(uint32_t val, uint32_t sat) {
   if (sat <= 31U) {
-    const int32_t max = (int32_t)((1U << sat) - 1U);
-    const int32_t min = 0;
+    const uint32_t max = ((1U << sat) - 1U);
     if (val > max) {
       return max;
-    } else if (val < min) {
-      return min;
     }
   }
   return val;

CMSIS/Core/Include/mpu_armv7.h

@@ -66,7 +66,10 @@
 * \param Region The region to be configured, number 0 to 15.
 * \param BaseAddress The base address for the region.
 */
-#define ARM_MPU_RBAR(Region, BaseAddress) ((BaseAddress & MPU_RBAR_ADDR_Msk) | (Region & MPU_RBAR_REGION_Msk) | (1UL << MPU_RBAR_VALID_Pos))
+#define ARM_MPU_RBAR(Region, BaseAddress) \
+  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
+   ((Region) & MPU_RBAR_REGION_Msk)    |  \
+   (MPU_RBAR_VALID_Msk))
 
 /**
 * MPU Region Attribut and Size Register Value
@@ -81,15 +84,15 @@
 * \param Size              Region size of the region to be configured, for example 4K, 8K.
 */                         
 #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
-  ((DisableExec      << MPU_RASR_XN_Pos)     & MPU_RASR_XN_Msk)     | \
-  ((AccessPermission << MPU_RASR_AP_Pos)     & MPU_RASR_AP_Msk)     | \
-  ((TypeExtField     << MPU_RASR_TEX_Pos)    & MPU_RASR_TEX_Msk)    | \
-  ((IsShareable      << MPU_RASR_S_Pos)      & MPU_RASR_S_Msk)      | \
-  ((IsCacheable      << MPU_RASR_C_Pos)      & MPU_RASR_C_Msk)      | \
-  ((IsBufferable     << MPU_RASR_B_Pos)      & MPU_RASR_B_Msk)      | \
-  ((SubRegionDisable << MPU_RASR_SRD_Pos)    & MPU_RASR_SRD_Msk)    | \
-  ((Size             << MPU_RASR_SIZE_Pos)   & MPU_RASR_SIZE_Msk)   | \
-  ((1UL              << MPU_RASR_ENABLE_Pos) & MPU_RASR_ENABLE_Msk)
+  ((((DisableExec     ) << MPU_RASR_XN_Pos)     & MPU_RASR_XN_Msk)     | \
+   (((AccessPermission) << MPU_RASR_AP_Pos)     & MPU_RASR_AP_Msk)     | \
+   (((TypeExtField    ) << MPU_RASR_TEX_Pos)    & MPU_RASR_TEX_Msk)    | \
+   (((IsShareable     ) << MPU_RASR_S_Pos)      & MPU_RASR_S_Msk)      | \
+   (((IsCacheable     ) << MPU_RASR_C_Pos)      & MPU_RASR_C_Msk)      | \
+   (((IsBufferable    ) << MPU_RASR_B_Pos)      & MPU_RASR_B_Msk)      | \
+   (((SubRegionDisable) << MPU_RASR_SRD_Pos)    & MPU_RASR_SRD_Msk)    | \
+   (((Size            ) << MPU_RASR_SIZE_Pos)   & MPU_RASR_SIZE_Msk)   | \
+   (MPU_RASR_ENABLE_Msk))
 
 
 /**

CMSIS/Core_A/Include/cmsis_armclang.h

@@ -558,4 +558,4 @@ __STATIC_INLINE void __FPU_Enable(void)
   );
 }
 
-#endif /* __CMSIS_ARMCC_H */
+#endif /* __CMSIS_ARMCLANG_H */