Przeglądaj źródła

CoreValidation: Fixed Validation test for Cortex-M33 without DSP on GCC.

Jonatan Antoni 8 lat temu
rodzic
commit
df3f42926f

+ 2 - 0
CMSIS/CoreValidation/Source/CV_CoreFunc.c

@@ -372,6 +372,8 @@ void TC_CoreFunc_FPSCR(void) {
 
 #if (defined (__FPU_USED   ) && (__FPU_USED    == 1U))
   ASSERT_TRUE(result != fpscr);
+#else
+  (void)result;
 #endif
 }
 #endif

+ 1 - 1
CMSIS/CoreValidation/Source/CV_MPU_ARMv8.c

@@ -12,7 +12,7 @@
  *      Test implementation
  *----------------------------------------------------------------------------*/
 
-static void ClearMpu() {
+static void ClearMpu(void) {
   for(uint32_t i = 0U; i < 8U; ++i) {
     MPU->RNR = i;
     MPU->RBAR = 0U;

+ 3 - 3
CMSIS/CoreValidation/Tests/Cortex-M33/GCC/CMSIS_CV.uvprojx

@@ -239,7 +239,7 @@
             <wLevel>3</wLevel>
             <uThumb>1</uThumb>
             <VariousControls>
-              <MiscControls>-mcpu=cortex-m33 -Wall -Wextra -Wstrict-prototypes -Wshadow</MiscControls>
+              <MiscControls>-march=armv8-m.main -mtune=cortex-m33 -Wall -Wextra -Wstrict-prototypes -Wshadow</MiscControls>
               <Define></Define>
               <Undefine></Undefine>
               <IncludePath>.;..\..\..\Include</IncludePath>
@@ -249,7 +249,7 @@
             <bBE>0</bBE>
             <interw>1</interw>
             <VariousControls>
-              <MiscControls>-mcpu=cortex-m33 -Wall</MiscControls>
+              <MiscControls>-march=armv8-m.main -mtune=cortex-m33 -Wall</MiscControls>
               <Define></Define>
               <Undefine></Undefine>
               <IncludePath>.;..\..\..\Include</IncludePath>
@@ -266,7 +266,7 @@
             <BSSAddressRange></BSSAddressRange>
             <IncludeLibs></IncludeLibs>
             <IncludeDir></IncludeDir>
-            <Misc>-mcpu=cortex-m33 --specs=rdimon.specs</Misc>
+            <Misc>-march=armv8-m.main -mtune=cortex-m33 --specs=rdimon.specs</Misc>
             <ScatterFile>.\RTE\Device\ARMCM33\gcc_arm.ld</ScatterFile>
           </LDarm>
         </TargetArm>