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@@ -1,5 +1,5 @@
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/*
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- * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
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+ * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -83,6 +83,25 @@ void basic_arm_depthwise_conv_s8(void)
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free(ctx.buf);
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TEST_ASSERT_EQUAL(expected, result);
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TEST_ASSERT_TRUE(validate(output, basic_output_ref, BASIC_DST_SIZE));
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+
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+ ctx.buf = NULL;
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+ ctx.size = 0;
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+
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+ result = arm_depthwise_conv_wrapper_s8(&ctx,
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+ &dw_conv_params,
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+ &quant_params,
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+ &input_dims,
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+ input_data,
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+ &filter_dims,
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+ basic_weights,
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+ &bias_dims,
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+ bias_data,
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+ &output_dims,
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+ output);
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+
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+ free(ctx.buf);
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+ TEST_ASSERT_EQUAL(expected, result);
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+ TEST_ASSERT_TRUE(validate(output, basic_output_ref, BASIC_DST_SIZE));
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}
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void stride2pad1_arm_depthwise_conv_s8(void)
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@@ -143,6 +162,25 @@ void stride2pad1_arm_depthwise_conv_s8(void)
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free(ctx.buf);
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TEST_ASSERT_EQUAL(expected, result);
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TEST_ASSERT_TRUE(validate(output, stride2pad1_output_ref, STRIDE2PAD1_DST_SIZE));
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+
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+ ctx.buf = NULL;
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+ ctx.size = 0;
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+
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+ result = arm_depthwise_conv_wrapper_s8(&ctx,
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+ &dw_conv_params,
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+ &quant_params,
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+ &input_dims,
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+ input_data,
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+ &filter_dims,
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+ kernel_data,
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+ &bias_dims,
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+ bias_data,
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+ &output_dims,
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+ output);
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+
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+ free(ctx.buf);
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+ TEST_ASSERT_EQUAL(expected, result);
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+ TEST_ASSERT_TRUE(validate(output, stride2pad1_output_ref, STRIDE2PAD1_DST_SIZE));
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}
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void depthwise_2_arm_depthwise_conv_s8(void)
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@@ -203,6 +241,25 @@ void depthwise_2_arm_depthwise_conv_s8(void)
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free(ctx.buf);
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TEST_ASSERT_EQUAL(expected, result);
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TEST_ASSERT_TRUE(validate(output, depthwise_2_output_ref, DEPTHWISE_2_DST_SIZE));
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+
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+ ctx.buf = NULL;
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+ ctx.size = 0;
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+
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+ result = arm_depthwise_conv_s8(&ctx,
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+ &dw_conv_params,
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+ &quant_params,
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+ &input_dims,
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+ input_data,
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+ &filter_dims,
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+ kernel_data,
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+ &bias_dims,
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+ bias_data,
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+ &output_dims,
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+ output);
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+
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+ free(ctx.buf);
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+ TEST_ASSERT_EQUAL(expected, result);
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+ TEST_ASSERT_TRUE(validate(output, depthwise_2_output_ref, DEPTHWISE_2_DST_SIZE));
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}
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void depthwise_out_activation_arm_depthwise_conv_s8(void)
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@@ -263,6 +320,25 @@ void depthwise_out_activation_arm_depthwise_conv_s8(void)
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free(ctx.buf);
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TEST_ASSERT_EQUAL(expected, result);
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TEST_ASSERT_TRUE(validate(output, depthwise_out_activation_output_ref, DEPTHWISE_OUT_ACTIVATION_DST_SIZE));
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+
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+ ctx.buf = NULL;
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+ ctx.size = 0;
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+
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+ result = arm_depthwise_conv_s8(&ctx,
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+ &dw_conv_params,
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+ &quant_params,
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+ &input_dims,
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+ input_data,
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+ &filter_dims,
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+ kernel_data,
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+ &bias_dims,
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+ bias_data,
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+ &output_dims,
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+ output);
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+
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+ free(ctx.buf);
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+ TEST_ASSERT_EQUAL(expected, result);
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+ TEST_ASSERT_TRUE(validate(output, depthwise_out_activation_output_ref, DEPTHWISE_OUT_ACTIVATION_DST_SIZE));
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}
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void depthwise_mult_batches_arm_depthwise_conv_s8(void)
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@@ -323,4 +399,23 @@ void depthwise_mult_batches_arm_depthwise_conv_s8(void)
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free(ctx.buf);
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TEST_ASSERT_EQUAL(expected, result);
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TEST_ASSERT_TRUE(validate(output, depthwise_mult_batches_output_ref, DEPTHWISE_MULT_BATCHES_DST_SIZE));
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+
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+ ctx.buf = NULL;
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+ ctx.size = 0;
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+
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+ result = arm_depthwise_conv_s8(&ctx,
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+ &dw_conv_params,
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+ &quant_params,
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+ &input_dims,
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+ input_data,
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+ &filter_dims,
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+ kernel_data,
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+ &bias_dims,
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+ bias_data,
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+ &output_dims,
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+ output);
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+
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+ free(ctx.buf);
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+ TEST_ASSERT_EQUAL(expected, result);
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+ TEST_ASSERT_TRUE(validate(output, depthwise_mult_batches_output_ref, DEPTHWISE_MULT_BATCHES_DST_SIZE));
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}
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