 GuentherMartin
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a18a6b7ad6
CMSIS-Core: aligned __disable_irq, __disable_fault_irq between supported compilers (#1187)
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%!s(int64=4) %!d(string=hai) anos |
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Jonatan Antoni
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4d414083e3
CoreValidation: Added test cases for Cortex-M cache functions.
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%!s(int64=5) %!d(string=hai) anos |
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Jonatan Antoni
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0b16b65d51
CoreValidation: Added test case for __FPU_Enable.
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%!s(int64=6) %!d(string=hai) anos |
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Jonatan Antoni
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0ac02767c8
Core(A): Fixed VBAR cp15 register access functions (Issue #301).
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%!s(int64=8) %!d(string=hai) anos |
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Jonatan Antoni
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17b53ef2a2
Core(A): Refactored L1 Cache maintenance to be compiler agnostic.
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%!s(int64=8) %!d(string=hai) anos |
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Jonatan Antoni
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44c3918b78
Core-A: Add 64bit Generic Counter registers access functions
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%!s(int64=8) %!d(string=hai) anos |
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Jonatan Antoni
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61be213755
CoreValidation: Initial contribution of a test suite for validating CMSIS-Core.
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%!s(int64=8) %!d(string=hai) anos |
