 Joseph Yiu
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d23a6949a0
Correct bit field width in EWIC Event Number ID Reg and TCM Error Bank Reg (#1622)
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2 tahun lalu |
|
Joseph Yiu
|
627a96f5a4
Correct typo in comment MPU Sample Register
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2 tahun lalu |
|
GuentherMartin
|
3e2cb40223
Core(M): Add Cortex-M55/M85 PMU events
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2 tahun lalu |
|
Martin Günther
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5c190aee4e
Core(M): Add Cortex-M55/M85 EWIC register
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2 tahun lalu |
|
Alan Phipps
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8c4ca7b408
Core(M): Enable support for TI Arm Clang Compiler (tiarmclang)
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2 tahun lalu |
|
grasci
|
f9d30ef008
CMSIS-Core(M): update CM85, CM55 core header files.
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3 tahun lalu |
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GuentherMartin
|
12bcacdcd4
Updated Cortex-M55 core header
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3 tahun lalu |
|
Martin Günther
|
4075efea8d
CMSIS-Core(M): Add missing registers to core_cm55.h
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3 tahun lalu |
|
Chris Reed
|
efd2b93c8d
Core: add missing Secure Fault syndrome registers and fix register name typo. (#1346)
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4 tahun lalu |
|
Wilfried Chauveau
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a6aec0c580
Fix PMU_Type in core_m55 and core_armv81mml.
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4 tahun lalu |
|
GuentherMartin
|
2e1a5d1386
CMSIS-Core(M): incorrect use of SCB_SHCSR_MEMFAULTACT_Pos in MMFSR defines (#1172)
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4 tahun lalu |
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FabKlein
|
ae9887cea6
[CMSIS Core] Added CM55 Power Mode Control Registers definition
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4 tahun lalu |
|
Edmund Player
|
185ed11473
Changed ARM_PMU_Get_EVCNTR() function to mask top 16 bits of result so it's guaranteed to work across any Armv8.1-M implementation (not just Cortex-M55)
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5 tahun lalu |
|
Jonatan Antoni
|
fa6076b91b
Core(M): Fixed device config checks for missing defines.
|
5 tahun lalu |
|
Jonatan Antoni
|
f0f420b065
Core(M): Fix-up to Armv8.1-M core headers after adding PMU.
|
5 tahun lalu |
|
Edmund Player
|
61ef0a67b0
Updated pmu_armv8.h with PMU functions and event macros.
|
5 tahun lalu |
|
Jonatan Antoni
|
01f1b6be67
Core(M): Removed __MVE_PRESENT and __MVE_USED macros for Armv8.1-M based devices.
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5 tahun lalu |
|
Jonatan Antoni
|
8ced160cc8
Core(M): Refactored/aligned L1 Cache Functions
|
5 tahun lalu |
|
GuentherMartin
|
bd8a0f1956
Added Cortex-M55 support.
|
5 tahun lalu |
