arm_const_structs.c 28 KB

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  1. /* ----------------------------------------------------------------------
  2. * Project: CMSIS DSP Library
  3. * Title: arm_const_structs.c
  4. * Description: Constant structs that are initialized for user convenience.
  5. * For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
  6. *
  7. * $Date: 27. January 2017
  8. * $Revision: V.1.5.1
  9. *
  10. * Target Processor: Cortex-M cores
  11. * -------------------------------------------------------------------- */
  12. /*
  13. * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  14. *
  15. * SPDX-License-Identifier: Apache-2.0
  16. *
  17. * Licensed under the Apache License, Version 2.0 (the License); you may
  18. * not use this file except in compliance with the License.
  19. * You may obtain a copy of the License at
  20. *
  21. * www.apache.org/licenses/LICENSE-2.0
  22. *
  23. * Unless required by applicable law or agreed to in writing, software
  24. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  25. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  26. * See the License for the specific language governing permissions and
  27. * limitations under the License.
  28. */
  29. #include "arm_math.h"
  30. #include "arm_const_structs.h"
  31. /*
  32. ALLOW TABLE is true when config table is enabled and the Tramsform folder is included
  33. for compilation.
  34. */
  35. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
  36. /* Floating-point structs */
  37. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16))
  38. const arm_cfft_instance_f64 arm_cfft_sR_f64_len16 = {
  39. 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH
  40. };
  41. #endif
  42. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32))
  43. const arm_cfft_instance_f64 arm_cfft_sR_f64_len32 = {
  44. 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH
  45. };
  46. #endif
  47. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64))
  48. const arm_cfft_instance_f64 arm_cfft_sR_f64_len64 = {
  49. 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH
  50. };
  51. #endif
  52. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128))
  53. const arm_cfft_instance_f64 arm_cfft_sR_f64_len128 = {
  54. 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH
  55. };
  56. #endif
  57. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256))
  58. const arm_cfft_instance_f64 arm_cfft_sR_f64_len256 = {
  59. 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH
  60. };
  61. #endif
  62. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512))
  63. const arm_cfft_instance_f64 arm_cfft_sR_f64_len512 = {
  64. 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH
  65. };
  66. #endif
  67. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024))
  68. const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024 = {
  69. 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH
  70. };
  71. #endif
  72. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048))
  73. const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048 = {
  74. 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH
  75. };
  76. #endif
  77. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096))
  78. const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096 = {
  79. 4096, (const float64_t *)twiddleCoefF64_4096, armBitRevIndexTableF64_4096, ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH
  80. };
  81. #endif
  82. /* Floating-point structs */
  83. #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
  84. /*
  85. Those structures cannot be used to initialize the MVE version of the FFT F32 instances.
  86. So they are not compiled when MVE is defined.
  87. For the MVE version, the new arm_cfft_init_f32 must be used.
  88. */
  89. #if !defined(__CC_ARM)
  90. const arm_cfft_instance_f16 arm_cfft_sR_f16_len16 = {
  91. 16, twiddleCoefF16_16, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
  92. };
  93. const arm_cfft_instance_f16 arm_cfft_sR_f16_len32 = {
  94. 32, twiddleCoefF16_32, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
  95. };
  96. const arm_cfft_instance_f16 arm_cfft_sR_f16_len64 = {
  97. 64, twiddleCoefF16_64, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
  98. };
  99. const arm_cfft_instance_f16 arm_cfft_sR_f16_len128 = {
  100. 128, twiddleCoefF16_128, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
  101. };
  102. const arm_cfft_instance_f16 arm_cfft_sR_f16_len256 = {
  103. 256, twiddleCoefF16_256, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
  104. };
  105. const arm_cfft_instance_f16 arm_cfft_sR_f16_len512 = {
  106. 512, twiddleCoefF16_512, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
  107. };
  108. const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024 = {
  109. 1024, twiddleCoefF16_1024, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
  110. };
  111. const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048 = {
  112. 2048, twiddleCoefF16_2048, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
  113. };
  114. const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096 = {
  115. 4096, twiddleCoefF16_4096, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
  116. };
  117. #endif
  118. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
  119. const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
  120. 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
  121. };
  122. #endif
  123. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
  124. const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
  125. 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
  126. };
  127. #endif
  128. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
  129. const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
  130. 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
  131. };
  132. #endif
  133. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
  134. const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
  135. 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
  136. };
  137. #endif
  138. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
  139. const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
  140. 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
  141. };
  142. #endif
  143. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
  144. const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
  145. 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
  146. };
  147. #endif
  148. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
  149. const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
  150. 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
  151. };
  152. #endif
  153. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
  154. const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
  155. 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
  156. };
  157. #endif
  158. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
  159. const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
  160. 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
  161. };
  162. #endif
  163. #endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
  164. /* Fixed-point structs */
  165. #if !defined(ARM_MATH_MVEI)
  166. /*
  167. Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
  168. So they are not compiled when MVE is defined.
  169. For the MVE version, the new arm_cfft_init_f32 must be used.
  170. */
  171. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
  172. const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
  173. 16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
  174. };
  175. #endif
  176. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
  177. const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
  178. 32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
  179. };
  180. #endif
  181. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
  182. const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
  183. 64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
  184. };
  185. #endif
  186. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
  187. const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
  188. 128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
  189. };
  190. #endif
  191. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
  192. const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
  193. 256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
  194. };
  195. #endif
  196. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
  197. const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
  198. 512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
  199. };
  200. #endif
  201. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
  202. const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
  203. 1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
  204. };
  205. #endif
  206. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
  207. const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
  208. 2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
  209. };
  210. #endif
  211. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
  212. const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
  213. 4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
  214. };
  215. #endif
  216. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
  217. const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
  218. 16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
  219. };
  220. #endif
  221. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
  222. const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
  223. 32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
  224. };
  225. #endif
  226. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
  227. const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
  228. 64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
  229. };
  230. #endif
  231. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
  232. const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
  233. 128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
  234. };
  235. #endif
  236. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
  237. const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
  238. 256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
  239. };
  240. #endif
  241. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
  242. const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
  243. 512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
  244. };
  245. #endif
  246. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
  247. const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
  248. 1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
  249. };
  250. #endif
  251. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
  252. const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
  253. 2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
  254. };
  255. #endif
  256. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
  257. const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
  258. 4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
  259. };
  260. #endif
  261. #endif /* !defined(ARM_MATH_MVEI) */
  262. /* Structure for real-value inputs */
  263. /* Double precision strucs */
  264. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32))
  265. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len32 = {
  266. { 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH },
  267. 32U,
  268. (float64_t *)twiddleCoefF64_rfft_32
  269. };
  270. #endif
  271. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64))
  272. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len64 = {
  273. { 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH },
  274. 64U,
  275. (float64_t *)twiddleCoefF64_rfft_64
  276. };
  277. #endif
  278. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128))
  279. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len128 = {
  280. { 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH },
  281. 128U,
  282. (float64_t *)twiddleCoefF64_rfft_128
  283. };
  284. #endif
  285. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256))
  286. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len256 = {
  287. { 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH },
  288. 256U,
  289. (float64_t *)twiddleCoefF64_rfft_256
  290. };
  291. #endif
  292. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512))
  293. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len512 = {
  294. { 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH },
  295. 512U,
  296. (float64_t *)twiddleCoefF64_rfft_512
  297. };
  298. #endif
  299. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024))
  300. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len1024 = {
  301. { 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH },
  302. 1024U,
  303. (float64_t *)twiddleCoefF64_rfft_1024
  304. };
  305. #endif
  306. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048))
  307. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len2048 = {
  308. { 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH },
  309. 2048U,
  310. (float64_t *)twiddleCoefF64_rfft_2048
  311. };
  312. #endif
  313. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096))
  314. const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len4096 = {
  315. { 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH },
  316. 4096U,
  317. (float64_t *)twiddleCoefF64_rfft_4096
  318. };
  319. #endif
  320. /* Floating-point structs */
  321. #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
  322. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
  323. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
  324. { 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
  325. 32U,
  326. (float32_t *)twiddleCoef_rfft_32
  327. };
  328. #endif
  329. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
  330. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
  331. { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
  332. 64U,
  333. (float32_t *)twiddleCoef_rfft_64
  334. };
  335. #endif
  336. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
  337. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
  338. { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
  339. 128U,
  340. (float32_t *)twiddleCoef_rfft_128
  341. };
  342. #endif
  343. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
  344. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
  345. { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
  346. 256U,
  347. (float32_t *)twiddleCoef_rfft_256
  348. };
  349. #endif
  350. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
  351. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
  352. { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
  353. 512U,
  354. (float32_t *)twiddleCoef_rfft_512
  355. };
  356. #endif
  357. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
  358. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
  359. { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
  360. 1024U,
  361. (float32_t *)twiddleCoef_rfft_1024
  362. };
  363. #endif
  364. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
  365. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
  366. { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
  367. 2048U,
  368. (float32_t *)twiddleCoef_rfft_2048
  369. };
  370. #endif
  371. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
  372. const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
  373. { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
  374. 4096U,
  375. (float32_t *)twiddleCoef_rfft_4096
  376. };
  377. #endif
  378. #endif /* #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
  379. /* Fixed-point structs */
  380. /* q31_t */
  381. #if !defined(ARM_MATH_MVEI)
  382. /*
  383. Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
  384. So they are not compiled when MVE is defined.
  385. For the MVE version, the new arm_cfft_init_f32 must be used.
  386. */
  387. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
  388. const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
  389. 32U,
  390. 0,
  391. 1,
  392. 256U,
  393. (q31_t*)realCoefAQ31,
  394. (q31_t*)realCoefBQ31,
  395. &arm_cfft_sR_q31_len16
  396. };
  397. #endif
  398. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
  399. const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
  400. 64U,
  401. 0,
  402. 1,
  403. 128U,
  404. (q31_t*)realCoefAQ31,
  405. (q31_t*)realCoefBQ31,
  406. &arm_cfft_sR_q31_len32
  407. };
  408. #endif
  409. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
  410. const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
  411. 128U,
  412. 0,
  413. 1,
  414. 64U,
  415. (q31_t*)realCoefAQ31,
  416. (q31_t*)realCoefBQ31,
  417. &arm_cfft_sR_q31_len64
  418. };
  419. #endif
  420. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
  421. const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
  422. 256U,
  423. 0,
  424. 1,
  425. 32U,
  426. (q31_t*)realCoefAQ31,
  427. (q31_t*)realCoefBQ31,
  428. &arm_cfft_sR_q31_len128
  429. };
  430. #endif
  431. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
  432. const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
  433. 512U,
  434. 0,
  435. 1,
  436. 16U,
  437. (q31_t*)realCoefAQ31,
  438. (q31_t*)realCoefBQ31,
  439. &arm_cfft_sR_q31_len256
  440. };
  441. #endif
  442. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
  443. const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
  444. 1024U,
  445. 0,
  446. 1,
  447. 8U,
  448. (q31_t*)realCoefAQ31,
  449. (q31_t*)realCoefBQ31,
  450. &arm_cfft_sR_q31_len512
  451. };
  452. #endif
  453. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
  454. const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
  455. 2048U,
  456. 0,
  457. 1,
  458. 4U,
  459. (q31_t*)realCoefAQ31,
  460. (q31_t*)realCoefBQ31,
  461. &arm_cfft_sR_q31_len1024
  462. };
  463. #endif
  464. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
  465. const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
  466. 4096U,
  467. 0,
  468. 1,
  469. 2U,
  470. (q31_t*)realCoefAQ31,
  471. (q31_t*)realCoefBQ31,
  472. &arm_cfft_sR_q31_len2048
  473. };
  474. #endif
  475. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
  476. const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
  477. 8192U,
  478. 0,
  479. 1,
  480. 1U,
  481. (q31_t*)realCoefAQ31,
  482. (q31_t*)realCoefBQ31,
  483. &arm_cfft_sR_q31_len4096
  484. };
  485. #endif
  486. /* q15_t */
  487. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
  488. const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
  489. 32U,
  490. 0,
  491. 1,
  492. 256U,
  493. (q15_t*)realCoefAQ15,
  494. (q15_t*)realCoefBQ15,
  495. &arm_cfft_sR_q15_len16
  496. };
  497. #endif
  498. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
  499. const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
  500. 64U,
  501. 0,
  502. 1,
  503. 128U,
  504. (q15_t*)realCoefAQ15,
  505. (q15_t*)realCoefBQ15,
  506. &arm_cfft_sR_q15_len32
  507. };
  508. #endif
  509. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
  510. const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
  511. 128U,
  512. 0,
  513. 1,
  514. 64U,
  515. (q15_t*)realCoefAQ15,
  516. (q15_t*)realCoefBQ15,
  517. &arm_cfft_sR_q15_len64
  518. };
  519. #endif
  520. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
  521. const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
  522. 256U,
  523. 0,
  524. 1,
  525. 32U,
  526. (q15_t*)realCoefAQ15,
  527. (q15_t*)realCoefBQ15,
  528. &arm_cfft_sR_q15_len128
  529. };
  530. #endif
  531. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
  532. const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
  533. 512U,
  534. 0,
  535. 1,
  536. 16U,
  537. (q15_t*)realCoefAQ15,
  538. (q15_t*)realCoefBQ15,
  539. &arm_cfft_sR_q15_len256
  540. };
  541. #endif
  542. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
  543. const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
  544. 1024U,
  545. 0,
  546. 1,
  547. 8U,
  548. (q15_t*)realCoefAQ15,
  549. (q15_t*)realCoefBQ15,
  550. &arm_cfft_sR_q15_len512
  551. };
  552. #endif
  553. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
  554. const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
  555. 2048U,
  556. 0,
  557. 1,
  558. 4U,
  559. (q15_t*)realCoefAQ15,
  560. (q15_t*)realCoefBQ15,
  561. &arm_cfft_sR_q15_len1024
  562. };
  563. #endif
  564. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
  565. const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
  566. 4096U,
  567. 0,
  568. 1,
  569. 2U,
  570. (q15_t*)realCoefAQ15,
  571. (q15_t*)realCoefBQ15,
  572. &arm_cfft_sR_q15_len2048
  573. };
  574. #endif
  575. #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
  576. const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
  577. 8192U,
  578. 0,
  579. 1,
  580. 1U,
  581. (q15_t*)realCoefAQ15,
  582. (q15_t*)realCoefBQ15,
  583. &arm_cfft_sR_q15_len4096
  584. };
  585. #endif
  586. #endif /* !defined(ARM_MATH_MVEI) */
  587. #endif