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  117. <p>Defines to configure and check device capabilities.  
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    123. 

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    126. 

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    129. 

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  130. <tr class="separator:ga71248e1e7db00ff28754b6fd80807654"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  132. <tr class="memdesc:gac6a3f185c4640e06443c18b3c8d93f53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M3 Core revision r0p1.  <a href="#gac6a3f185c4640e06443c18b3c8d93f53">More...</a><br/></td></tr>
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  135. <tr class="memdesc:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M4 Core revision r0p1.  <a href="#ga45a97e4bb8b6ce7c334acc5f45ace3ba">More...</a><br/></td></tr>
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  138. <tr class="memdesc:ga8eb40c0d30a09a0ae388e56b21d8f22c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M7 Core revision r0p1.  <a href="#ga8eb40c0d30a09a0ae388e56b21d8f22c">More...</a><br/></td></tr>
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  141. <tr class="memdesc:gaf293b060f9c15592d18e6b0b977194bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">SC000 Core revision r0p1.  <a href="#gaf293b060f9c15592d18e6b0b977194bf">More...</a><br/></td></tr>
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    144. 

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    147. 

  147. <tr class="memdesc:ga0f6c2b504ee424a7895fd7a420acdd0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M23 Core revision r0p1.  <a href="#ga0f6c2b504ee424a7895fd7a420acdd0e">More...</a><br/></td></tr>
    148. 

  148. <tr class="separator:ga0f6c2b504ee424a7895fd7a420acdd0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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    150. 

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    151. 

  151. <tr class="separator:ga178e7a57b608f3e20d1c0cf18a2c2ac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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    153. 

  153. <tr class="memdesc:gadd339c07b13a763dda6e83f4c05122f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M35P Core revision r0p1.  <a href="#gadd339c07b13a763dda6e83f4c05122f6">More...</a><br/></td></tr>
    154. 

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    156. 

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    157. 

  157. <tr class="separator:gaea2d16e963063038cde86cee33c4ef37"><td class="memSeparator" colspan="2">&#160;</td></tr>
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    159. 

  159. <tr class="memdesc:ga645c9be694a2d5b5a5b772a0102c727a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8-M Baseline device Core revision r0p1.  <a href="#ga645c9be694a2d5b5a5b772a0102c727a">More...</a><br/></td></tr>
    160. 

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    161. 

  161. <tr class="memitem:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gadb7d425f5ad0389b0eb1c6a69f8eb214">__ARMv8MML_REV</a></td></tr>
    162. 

  162. <tr class="memdesc:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8-M Mainline device Core revision r0p1.  <a href="#gadb7d425f5ad0389b0eb1c6a69f8eb214">More...</a><br/></td></tr>
    163. 

  163. <tr class="separator:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="memSeparator" colspan="2">&#160;</td></tr>
    164. 

  164. <tr class="memitem:ga4dd7b69d473733e59cd99fc786174cd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga4dd7b69d473733e59cd99fc786174cd3">__ARMv81MML_REV</a></td></tr>
    165. 

  165. <tr class="memdesc:ga4dd7b69d473733e59cd99fc786174cd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8.1-M Baseline device Core revision r0p1.  <a href="#ga4dd7b69d473733e59cd99fc786174cd3">More...</a><br/></td></tr>
    166. 

  166. <tr class="separator:ga4dd7b69d473733e59cd99fc786174cd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
    167. 

  167. <tr class="memitem:gae3fe3587d5100c787e02102ce3944460"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a></td></tr>
    168. 

  168. <tr class="memdesc:gae3fe3587d5100c787e02102ce3944460"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of Bits used for Priority Levels.  <a href="#gae3fe3587d5100c787e02102ce3944460">More...</a><br/></td></tr>
    169. 

  169. <tr class="separator:gae3fe3587d5100c787e02102ce3944460"><td class="memSeparator" colspan="2">&#160;</td></tr>
    170. 

  170. <tr class="memitem:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a></td></tr>
    171. 

  171. <tr class="memdesc:gab58771b4ec03f9bdddc84770f7c95c68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 if a venor specfic SysTick configuration is used.  <a href="#gab58771b4ec03f9bdddc84770f7c95c68">More...</a><br/></td></tr>
    172. 

  172. <tr class="separator:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memSeparator" colspan="2">&#160;</td></tr>
    173. 

  173. <tr class="memitem:gaddbae1a1b57539f398eb5546a17de8f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a></td></tr>
    174. 

  174. <tr class="memdesc:gaddbae1a1b57539f398eb5546a17de8f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">VTOR present or not.  <a href="#gaddbae1a1b57539f398eb5546a17de8f6">More...</a><br/></td></tr>
    175. 

  175. <tr class="separator:gaddbae1a1b57539f398eb5546a17de8f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    176. 

  176. <tr class="memitem:ga4127d1b31aaf336fab3d7329d117f448"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a></td></tr>
    177. 

  177. <tr class="memdesc:ga4127d1b31aaf336fab3d7329d117f448"><td class="mdescLeft">&#160;</td><td class="mdescRight">MPU present or not.  <a href="#ga4127d1b31aaf336fab3d7329d117f448">More...</a><br/></td></tr>
    178. 

  178. <tr class="separator:ga4127d1b31aaf336fab3d7329d117f448"><td class="memSeparator" colspan="2">&#160;</td></tr>
    179. 

  179. <tr class="memitem:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a></td></tr>
    180. 

  180. <tr class="memdesc:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="mdescLeft">&#160;</td><td class="mdescRight">FPU present or not.  <a href="#gac1ba8a48ca926bddc88be9bfd7d42641">More...</a><br/></td></tr>
    181. 

  181. <tr class="separator:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memSeparator" colspan="2">&#160;</td></tr>
    182. 

  182. <tr class="memitem:ga2a528de57b6217f9fc9d4487d0db6328"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a></td></tr>
    183. 

  183. <tr class="memdesc:ga2a528de57b6217f9fc9d4487d0db6328"><td class="mdescLeft">&#160;</td><td class="mdescRight">Double precision FPU present.  <a href="#ga2a528de57b6217f9fc9d4487d0db6328">More...</a><br/></td></tr>
    184. 

  184. <tr class="separator:ga2a528de57b6217f9fc9d4487d0db6328"><td class="memSeparator" colspan="2">&#160;</td></tr>
    185. 

  185. <tr class="memitem:ga165f052f5641898a02bb07096dc177b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga165f052f5641898a02bb07096dc177b6">__DSP_PRESENT</a></td></tr>
    186. 

  186. <tr class="memdesc:ga165f052f5641898a02bb07096dc177b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSP extension present or not.  <a href="#ga165f052f5641898a02bb07096dc177b6">More...</a><br/></td></tr>
    187. 

  187. <tr class="separator:ga165f052f5641898a02bb07096dc177b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    188. 

  188. <tr class="memitem:gadae9d54c744e525135b097c618bae3c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a></td></tr>
    189. 

  189. <tr class="memdesc:gadae9d54c744e525135b097c618bae3c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">SAU regions present or not.  <a href="#gadae9d54c744e525135b097c618bae3c4">More...</a><br/></td></tr>
    190. 

  190. <tr class="separator:gadae9d54c744e525135b097c618bae3c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    191. 

  191. <tr class="memitem:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga1c6eba273d4d6189eee91c6cbe7ec289">__PMU_PRESENT</a></td></tr>
    192. 

  192. <tr class="memdesc:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU present or not.  <a href="#ga1c6eba273d4d6189eee91c6cbe7ec289">More...</a><br/></td></tr>
    193. 

  193. <tr class="separator:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="memSeparator" colspan="2">&#160;</td></tr>
    194. 

  194. <tr class="memitem:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga9d4c51d9ca3eae58635d1040a3fb5fd2">__PMU_NUM_EVENTCNT</a></td></tr>
    195. 

  195. <tr class="memdesc:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU Event Counters.  <a href="#ga9d4c51d9ca3eae58635d1040a3fb5fd2">More...</a><br/></td></tr>
    196. 

  196. <tr class="separator:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
    197. 

  197. <tr class="memitem:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga3580fa1aeb7c2ed580904f8f70f8a919">__ICACHE_PRESENT</a></td></tr>
    198. 

  198. <tr class="memdesc:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction Cache present or not.  <a href="#ga3580fa1aeb7c2ed580904f8f70f8a919">More...</a><br/></td></tr>
    199. 

  199. <tr class="separator:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="memSeparator" colspan="2">&#160;</td></tr>
    200. 

  200. <tr class="memitem:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">__DCACHE_PRESENT</a></td></tr>
    201. 

  201. <tr class="memdesc:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Cache present or not.  <a href="#ga11d3ac679daeb58d0cec0a4e6ca59010">More...</a><br/></td></tr>
    202. 

  202. <tr class="separator:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="memSeparator" colspan="2">&#160;</td></tr>
    203. 

  203. <tr class="memitem:gacbb998663708df6626abb09378303019"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gacbb998663708df6626abb09378303019">__DTCM_PRESENT</a></td></tr>
    204. 

  204. <tr class="memdesc:gacbb998663708df6626abb09378303019"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Tightly Coupled Memory is present or not.  <a href="#gacbb998663708df6626abb09378303019">More...</a><br/></td></tr>
    205. 

  205. <tr class="separator:gacbb998663708df6626abb09378303019"><td class="memSeparator" colspan="2">&#160;</td></tr>
    206. 

  206. </table>
    207. 

  207. <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
    208. 

  208. <p>Defines to configure and check device capabilities. </p>
    209. 

  209. <p>These defines are used by the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in order to enable or disable functionality provided by CMSIS-Core(M) dependent on the device capabilities. </p>
    210. 

  210. <h2 class="groupheader">Macro Definition Documentation</h2>
    211. 

  211. <a class="anchor" id="ga4dd7b69d473733e59cd99fc786174cd3"></a>
    212. 

  212. <div class="memitem">
    213. 

  213. <div class="memproto">
    214. 

  214.       <table class="memname">
    215. 

  215.         <tr>
    216. 

  216.           <td class="memname">#define __ARMv81MML_REV</td>
    217. 

  217.         </tr>
    218. 

  218.       </table>
    219. 

  219. </div><div class="memdoc">
    220. 

  220. 

  221. <p>Armv8.1-M Baseline device Core revision r0p1. </p>
    222. 

  222. <p>([15:8] revision number, [7:0] patch number) </p>
    223. 

  223. 

  224. </div>
    225. 

  225. </div>
    226. 

  226. <a class="anchor" id="ga645c9be694a2d5b5a5b772a0102c727a"></a>
    227. 

  227. <div class="memitem">
    228. 

  228. <div class="memproto">
    229. 

  229.       <table class="memname">
    230. 

  230.         <tr>
    231. 

  231.           <td class="memname">#define __ARMv8MBL_REV</td>
    232. 

  232.         </tr>
    233. 

  233.       </table>
    234. 

  234. </div><div class="memdoc">
    235. 

  235. 

  236. <p>Armv8-M Baseline device Core revision r0p1. </p>
    237. 

  237. <p>([15:8] revision number, [7:0] patch number) </p>
    238. 

  238. 

  239. </div>
    240. 

  240. </div>
    241. 

  241. <a class="anchor" id="gadb7d425f5ad0389b0eb1c6a69f8eb214"></a>
    242. 

  242. <div class="memitem">
    243. 

  243. <div class="memproto">
    244. 

  244.       <table class="memname">
    245. 

  245.         <tr>
    246. 

  246.           <td class="memname">#define __ARMv8MML_REV</td>
    247. 

  247.         </tr>
    248. 

  248.       </table>
    249. 

  249. </div><div class="memdoc">
    250. 

  250. 

  251. <p>Armv8-M Mainline device Core revision r0p1. </p>
    252. 

  252. <p>([15:8] revision number, [7:0] patch number) </p>
    253. 

  253. 

  254. </div>
    255. 

  255. </div>
    256. 

  256. <a class="anchor" id="ga905517438930a3f13cbc632e52990534"></a>
    257. 

  257. <div class="memitem">
    258. 

  258. <div class="memproto">
    259. 

  259.       <table class="memname">
    260. 

  260.         <tr>
    261. 

  261.           <td class="memname">#define __CM0_REV</td>
    262. 

  262.         </tr>
    263. 

  263.       </table>
    264. 

  264. </div><div class="memdoc">
    265. 

  265. 

  266. <p>Cortex-M0 Core revision r0p1. </p>
    267. 

  267. <p>([15:8] revision number, [7:0] patch number) </p>
    268. 

  268. 

  269. </div>
    270. 

  270. </div>
    271. 

  271. <a class="anchor" id="ga2b7180ed347a0e902c5765deb46e650e"></a>
    272. 

  272. <div class="memitem">
    273. 

  273. <div class="memproto">
    274. 

  274.       <table class="memname">
    275. 

  275.         <tr>
    276. 

  276.           <td class="memname">#define __CM0PLUS_REV</td>
    277. 

  277.         </tr>
    278. 

  278.       </table>
    279. 

  279. </div><div class="memdoc">
    280. 

  280. 

  281. <p>Cortex-M0+ Core revision r0p1. </p>
    282. 

  282. <p>([15:8] revision number, [7:0] patch number) </p>
    283. 

  283. 

  284. </div>
    285. 

  285. </div>
    286. 

  286. <a class="anchor" id="ga71248e1e7db00ff28754b6fd80807654"></a>
    287. 

  287. <div class="memitem">
    288. 

  288. <div class="memproto">
    289. 

  289.       <table class="memname">
    290. 

  290.         <tr>
    291. 

  291.           <td class="memname">#define __CM1_REV</td>
    292. 

  292.         </tr>
    293. 

  293.       </table>
    294. 

  294. </div><div class="memdoc">
    295. 

  295. 

  296. <p>Cortex-M1 Core revision r0p1. </p>
    297. 

  297. <p>([15:8] revision number, [7:0] patch number) </p>
    298. 

  298. 

  299. </div>
    300. 

  300. </div>
    301. 

  301. <a class="anchor" id="ga0f6c2b504ee424a7895fd7a420acdd0e"></a>
    302. 

  302. <div class="memitem">
    303. 

  303. <div class="memproto">
    304. 

  304.       <table class="memname">
    305. 

  305.         <tr>
    306. 

  306.           <td class="memname">#define __CM23_REV</td>
    307. 

  307.         </tr>
    308. 

  308.       </table>
    309. 

  309. </div><div class="memdoc">
    310. 

  310. 

  311. <p>Cortex-M23 Core revision r0p1. </p>
    312. 

  312. <p>([15:8] revision number, [7:0] patch number) </p>
    313. 

  313. 

  314. </div>
    315. 

  315. </div>
    316. 

  316. <a class="anchor" id="ga178e7a57b608f3e20d1c0cf18a2c2ac3"></a>
    317. 

  317. <div class="memitem">
    318. 

  318. <div class="memproto">
    319. 

  319.       <table class="memname">
    320. 

  320.         <tr>
    321. 

  321.           <td class="memname">#define __CM33_REV</td>
    322. 

  322.         </tr>
    323. 

  323.       </table>
    324. 

  324. </div><div class="memdoc">
    325. 

  325. 

  326. <p>Cortex-M33 Core revision r0p1. </p>
    327. 

  327. <p>([15:8] revision number, [7:0] patch number) </p>
    328. 

  328. 

  329. </div>
    330. 

  330. </div>
    331. 

  331. <a class="anchor" id="gadd339c07b13a763dda6e83f4c05122f6"></a>
    332. 

  332. <div class="memitem">
    333. 

  333. <div class="memproto">
    334. 

  334.       <table class="memname">
    335. 

  335.         <tr>
    336. 

  336.           <td class="memname">#define __CM35P_REV</td>
    337. 

  337.         </tr>
    338. 

  338.       </table>
    339. 

  339. </div><div class="memdoc">
    340. 

  340. 

  341. <p>Cortex-M35P Core revision r0p1. </p>
    342. 

  342. <p>([15:8] revision number, [7:0] patch number) </p>
    343. 

  343. 

  344. </div>
    345. 

  345. </div>
    346. 

  346. <a class="anchor" id="gac6a3f185c4640e06443c18b3c8d93f53"></a>
    347. 

  347. <div class="memitem">
    348. 

  348. <div class="memproto">
    349. 

  349.       <table class="memname">
    350. 

  350.         <tr>
    351. 

  351.           <td class="memname">#define __CM3_REV</td>
    352. 

  352.         </tr>
    353. 

  353.       </table>
    354. 

  354. </div><div class="memdoc">
    355. 

  355. 

  356. <p>Cortex-M3 Core revision r0p1. </p>
    357. 

  357. <p>([15:8] revision number, [7:0] patch number) </p>
    358. 

  358. 

  359. </div>
    360. 

  360. </div>
    361. 

  361. <a class="anchor" id="ga45a97e4bb8b6ce7c334acc5f45ace3ba"></a>
    362. 

  362. <div class="memitem">
    363. 

  363. <div class="memproto">
    364. 

  364.       <table class="memname">
    365. 

  365.         <tr>
    366. 

  366.           <td class="memname">#define __CM4_REV</td>
    367. 

  367.         </tr>
    368. 

  368.       </table>
    369. 

  369. </div><div class="memdoc">
    370. 

  370. 

  371. <p>Cortex-M4 Core revision r0p1. </p>
    372. 

  372. <p>([15:8] revision number, [7:0] patch number) </p>
    373. 

  373. 

  374. </div>
    375. 

  375. </div>
    376. 

  376. <a class="anchor" id="gaea2d16e963063038cde86cee33c4ef37"></a>
    377. 

  377. <div class="memitem">
    378. 

  378. <div class="memproto">
    379. 

  379.       <table class="memname">
    380. 

  380.         <tr>
    381. 

  381.           <td class="memname">#define __CM55_REV</td>
    382. 

  382.         </tr>
    383. 

  383.       </table>
    384. 

  384. </div><div class="memdoc">
    385. 

  385. 

  386. <p>Cortex-M55 Core revision r0p1. </p>
    387. 

  387. <p>([15:8] revision number, [7:0] patch number) </p>
    388. 

  388. 

  389. </div>
    390. 

  390. </div>
    391. 

  391. <a class="anchor" id="ga8eb40c0d30a09a0ae388e56b21d8f22c"></a>
    392. 

  392. <div class="memitem">
    393. 

  393. <div class="memproto">
    394. 

  394.       <table class="memname">
    395. 

  395.         <tr>
    396. 

  396.           <td class="memname">#define __CM7_REV</td>
    397. 

  397.         </tr>
    398. 

  398.       </table>
    399. 

  399. </div><div class="memdoc">
    400. 

  400. 

  401. <p>Cortex-M7 Core revision r0p1. </p>
    402. 

  402. <p>([15:8] revision number, [7:0] patch number) </p>
    403. 

  403. 

  404. </div>
    405. 

  405. </div>
    406. 

  406. <a class="anchor" id="ga11d3ac679daeb58d0cec0a4e6ca59010"></a>
    407. 

  407. <div class="memitem">
    408. 

  408. <div class="memproto">
    409. 

  409.       <table class="memname">
    410. 

  410.         <tr>
    411. 

  411.           <td class="memname">#define __DCACHE_PRESENT</td>
    412. 

  412.         </tr>
    413. 

  413.       </table>
    414. 

  414. </div><div class="memdoc">
    415. 

  415. 

  416. <p>Data Cache present or not. </p>
    417. 

  417. 

  418. </div>
    419. 

  419. </div>
    420. 

  420. <a class="anchor" id="ga165f052f5641898a02bb07096dc177b6"></a>
    421. 

  421. <div class="memitem">
    422. 

  422. <div class="memproto">
    423. 

  423.       <table class="memname">
    424. 

  424.         <tr>
    425. 

  425.           <td class="memname">#define __DSP_PRESENT</td>
    426. 

  426.         </tr>
    427. 

  427.       </table>
    428. 

  428. </div><div class="memdoc">
    429. 

  429. 

  430. <p>DSP extension present or not. </p>
    431. 

  431. 

  432. </div>
    433. 

  433. </div>
    434. 

  434. <a class="anchor" id="gacbb998663708df6626abb09378303019"></a>
    435. 

  435. <div class="memitem">
    436. 

  436. <div class="memproto">
    437. 

  437.       <table class="memname">
    438. 

  438.         <tr>
    439. 

  439.           <td class="memname">#define __DTCM_PRESENT</td>
    440. 

  440.         </tr>
    441. 

  441.       </table>
    442. 

  442. </div><div class="memdoc">
    443. 

  443. 

  444. <p>Data Tightly Coupled Memory is present or not. </p>
    445. 

  445. 

  446. </div>
    447. 

  447. </div>
    448. 

  448. <a class="anchor" id="ga2a528de57b6217f9fc9d4487d0db6328"></a>
    449. 

  449. <div class="memitem">
    450. 

  450. <div class="memproto">
    451. 

  451.       <table class="memname">
    452. 

  452.         <tr>
    453. 

  453.           <td class="memname">#define __FPU_DP</td>
    454. 

  454.         </tr>
    455. 

  455.       </table>
    456. 

  456. </div><div class="memdoc">
    457. 

  457. 

  458. <p>Double precision FPU present. </p>
    459. 

  459. <p>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine the whether the FPU is with single or double precision as shown in the table below. </p>
    460. 

  460. <table  class="cmtable">
    461. 

  461. <tr bgcolor="cyan">
    462. 

  462. <td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td><b>Description</b>  </td></tr>
    463. 

  463. <tr>
    464. 

  464. <td align="center">0 </td><td align="center"><em>ignored</em> </td><td>Processor has no FPU. The value set for <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a>.   </td></tr>
    465. 

  465. <tr>
    466. 

  466. <td align="center">1 </td><td align="center">0 </td><td>Processor with FPU with single precision.  </td></tr>
    467. 

  467. <tr>
    468. 

  468. <td align="center">1 </td><td align="center">1 </td><td>Processor with FPU with double precision.  </td></tr>
    469. 

  469. </table>
    470. 

  470. 

  471. </div>
    472. 

  472. </div>
    473. 

  473. <a class="anchor" id="gac1ba8a48ca926bddc88be9bfd7d42641"></a>
    474. 

  474. <div class="memitem">
    475. 

  475. <div class="memproto">
    476. 

  476.       <table class="memname">
    477. 

  477.         <tr>
    478. 

  478.           <td class="memname">#define __FPU_PRESENT</td>
    479. 

  479.         </tr>
    480. 

  480.       </table>
    481. 

  481. </div><div class="memdoc">
    482. 

  482. 

  483. <p>FPU present or not. </p>
    484. 

  484. <p>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine the whether the FPU is with single or double precision as shown in the table below. </p>
    485. 

  485. <table  class="cmtable">
    486. 

  486. <tr bgcolor="cyan">
    487. 

  487. <td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td><b>Description</b>  </td></tr>
    488. 

  488. <tr>
    489. 

  489. <td align="center">0 </td><td align="center"><em>ignored</em> </td><td>Processor has no FPU. The value set for <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a>.  </td></tr>
    490. 

  490. <tr>
    491. 

  491. <td align="center">1 </td><td align="center">0 </td><td>Processor with FPU with single precision.  </td></tr>
    492. 

  492. <tr>
    493. 

  493. <td align="center">1 </td><td align="center">1 </td><td>Processor with FPU with double precision.  </td></tr>
    494. 

  494. </table>
    495. 

  495. <p>FPU present</p>
    496. 

  496. <p>The </p>
    497. 

  497. 

  498. </div>
    499. 

  499. </div>
    500. 

  500. <a class="anchor" id="ga3580fa1aeb7c2ed580904f8f70f8a919"></a>
    501. 

  501. <div class="memitem">
    502. 

  502. <div class="memproto">
    503. 

  503.       <table class="memname">
    504. 

  504.         <tr>
    505. 

  505.           <td class="memname">#define __ICACHE_PRESENT</td>
    506. 

  506.         </tr>
    507. 

  507.       </table>
    508. 

  508. </div><div class="memdoc">
    509. 

  509. 

  510. <p>Instruction Cache present or not. </p>
    511. 

  511. 

  512. </div>
    513. 

  513. </div>
    514. 

  514. <a class="anchor" id="ga4127d1b31aaf336fab3d7329d117f448"></a>
    515. 

  515. <div class="memitem">
    516. 

  516. <div class="memproto">
    517. 

  517.       <table class="memname">
    518. 

  518.         <tr>
    519. 

  519.           <td class="memname">#define __MPU_PRESENT</td>
    520. 

  520.         </tr>
    521. 

  521.       </table>
    522. 

  522. </div><div class="memdoc">
    523. 

  523. 

  524. <p>MPU present or not. </p>
    525. 

  525. 

  526. </div>
    527. 

  527. </div>
    528. 

  528. <a class="anchor" id="gae3fe3587d5100c787e02102ce3944460"></a>
    529. 

  529. <div class="memitem">
    530. 

  530. <div class="memproto">
    531. 

  531.       <table class="memname">
    532. 

  532.         <tr>
    533. 

  533.           <td class="memname">#define __NVIC_PRIO_BITS</td>
    534. 

  534.         </tr>
    535. 

  535.       </table>
    536. 

  536. </div><div class="memdoc">
    537. 

  537. 

  538. <p>Number of Bits used for Priority Levels. </p>
    539. 

  539. 

  540. </div>
    541. 

  541. </div>
    542. 

  542. <a class="anchor" id="ga9d4c51d9ca3eae58635d1040a3fb5fd2"></a>
    543. 

  543. <div class="memitem">
    544. 

  544. <div class="memproto">
    545. 

  545.       <table class="memname">
    546. 

  546.         <tr>
    547. 

  547.           <td class="memname">#define __PMU_NUM_EVENTCNT</td>
    548. 

  548.         </tr>
    549. 

  549.       </table>
    550. 

  550. </div><div class="memdoc">
    551. 

  551. 

  552. <p>PMU Event Counters. </p>
    553. 

  553. <p>The number of Event counters if PMU is present (see <a class="el" href="group__device__config.html#ga1c6eba273d4d6189eee91c6cbe7ec289">__PMU_PRESENT</a>) </p>
    554. 

  554. 

  555. </div>
    556. 

  556. </div>
    557. 

  557. <a class="anchor" id="ga1c6eba273d4d6189eee91c6cbe7ec289"></a>
    558. 

  558. <div class="memitem">
    559. 

  559. <div class="memproto">
    560. 

  560.       <table class="memname">
    561. 

  561.         <tr>
    562. 

  562.           <td class="memname">#define __PMU_PRESENT</td>
    563. 

  563.         </tr>
    564. 

  564.       </table>
    565. 

  565. </div><div class="memdoc">
    566. 

  566. 

  567. <p>PMU present or not. </p>
    568. 

  568. 

  569. </div>
    570. 

  570. </div>
    571. 

  571. <a class="anchor" id="gadae9d54c744e525135b097c618bae3c4"></a>
    572. 

  572. <div class="memitem">
    573. 

  573. <div class="memproto">
    574. 

  574.       <table class="memname">
    575. 

  575.         <tr>
    576. 

  576.           <td class="memname">#define __SAUREGION_PRESENT</td>
    577. 

  577.         </tr>
    578. 

  578.       </table>
    579. 

  579. </div><div class="memdoc">
    580. 

  580. 

  581. <p>SAU regions present or not. </p>
    582. 

  582. 

  583. </div>
    584. 

  584. </div>
    585. 

  585. <a class="anchor" id="gaf293b060f9c15592d18e6b0b977194bf"></a>
    586. 

  586. <div class="memitem">
    587. 

  587. <div class="memproto">
    588. 

  588.       <table class="memname">
    589. 

  589.         <tr>
    590. 

  590.           <td class="memname">#define __SC000_REV</td>
    591. 

  591.         </tr>
    592. 

  592.       </table>
    593. 

  593. </div><div class="memdoc">
    594. 

  594. 

  595. <p>SC000 Core revision r0p1. </p>
    596. 

  596. <p>([15:8] revision number, [7:0] patch number) </p>
    597. 

  597. 

  598. </div>
    599. 

  599. </div>
    600. 

  600. <a class="anchor" id="ga3029728b4fc64727b43bcfd853a7180b"></a>
    601. 

  601. <div class="memitem">
    602. 

  602. <div class="memproto">
    603. 

  603.       <table class="memname">
    604. 

  604.         <tr>
    605. 

  605.           <td class="memname">#define __SC300_REV</td>
    606. 

  606.         </tr>
    607. 

  607.       </table>
    608. 

  608. </div><div class="memdoc">
    609. 

  609. 

  610. <p>SC300 Core revision r0p1. </p>
    611. 

  611. <p>([15:8] revision number, [7:0] patch number) </p>
    612. 

  612. 

  613. </div>
    614. 

  614. </div>
    615. 

  615. <a class="anchor" id="gab58771b4ec03f9bdddc84770f7c95c68"></a>
    616. 

  616. <div class="memitem">
    617. 

  617. <div class="memproto">
    618. 

  618.       <table class="memname">
    619. 

  619.         <tr>
    620. 

  620.           <td class="memname">#define __Vendor_SysTickConfig</td>
    621. 

  621.         </tr>
    622. 

  622.       </table>
    623. 

  623. </div><div class="memdoc">
    624. 

  624. 

  625. <p>Set to 1 if a venor specfic SysTick configuration is used. </p>
    626. 

  626. <p>If this define is set to 1, then the default <a class="el" href="group__SysTick__gr.html#gabe47de40e9b0ad465b752297a9d9f427">SysTick_Config</a> function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function. </p>
    627. 

  627. 

  628. </div>
    629. 

  629. </div>
    630. 

  630. <a class="anchor" id="gaddbae1a1b57539f398eb5546a17de8f6"></a>
    631. 

  631. <div class="memitem">
    632. 

  632. <div class="memproto">
    633. 

  633.       <table class="memname">
    634. 

  634.         <tr>
    635. 

  635.           <td class="memname">#define __VTOR_PRESENT</td>
    636. 

  636.         </tr>
    637. 

  637.       </table>
    638. 

  638. </div><div class="memdoc">
    639. 

  639. 

  640. <p>VTOR present or not. </p>
    641. 

  641. <p>See <a class="el" href="structSCB__Type.html#a187a4578e920544ed967f98020fb8170">SCB_Type::VTOR</a> </p>
    642. 

  642. 

  643. </div>
    644. 

  644. </div>
    645. 

  645. </div><!-- contents -->
    646. 

  646. </div><!-- doc-content -->
    647. 

  647. <!-- start footer part -->
    648. 

  648. <div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
    649. 

  649.   <ul>
    650. 

  650.     <li class="footer">Generated on Thu Apr 9 2020 15:49:07 for CMSIS-Core (Cortex-M) Version 5.4.0 by Arm Ltd. All rights reserved.
    651. 

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    655. 

  655. 	</li>
    656. 

  656.   </ul>
    657. 

  657. </div>
    658. 

  658. </body>
    659. 

  659. </html>
    660.