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  1. <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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    35. 

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    49. 

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    52. 

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    53. 

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    56. 

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    66. 

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    68. 

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    69. 

  69.           <input type="text" id="MSearchField" value="Search" accesskey="S"
    70. 

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    71. 

  71.                onblur="searchBox.OnSearchFieldFocus(false)" 
    72. 

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    73. 

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    74. 

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    75. 

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    76. 

  76.         </div>
    77. 

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    78. 

  78.     </ul>
    79. 

  79.   </div>
    80. 

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    81. 

  81. <div id="side-nav" class="ui-resizable side-nav-resizable">
    82. 

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    83. 

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    85. 

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    86. 

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    87. 

  87.   <div id="splitbar" style="-moz-user-select:none;" 
    88. 

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    89. 

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    90. 

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    91. 

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    92. 

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    93. 

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    94. 

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    95. 

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    96. 

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    97. 

  97.      onmouseover="return searchBox.OnSearchSelectShow()"
    98. 

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    99. 

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    100. 

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    103. 

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    104. 

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    105. 

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    106. 

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    107. 

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    108. 

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    110. 

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    111. 

  111. <a href="#nested-classes">Data Structures</a> &#124;
    112. 

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    113. 

  113. <a href="#typedef-members">Typedefs</a>  </div>
    114. 

  114.   <div class="headertitle">
    115. 

  115. <div class="title">Driver_NAND.h File Reference</div>  </div>
    116. 

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    117. 

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    118. 

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    119. 

  119. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
    120. 

  120. Data Structures</h2></td></tr>
    121. 

  121. <tr class="memitem:structARM__NAND__ECC__INFO"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__ECC__INFO">ARM_NAND_ECC_INFO</a></td></tr>
    122. 

  122. <tr class="memdesc:structARM__NAND__ECC__INFO"><td class="mdescLeft">&#160;</td><td class="mdescRight">NAND ECC (Error Correction Code) Information.  <a href="group__nand__interface__gr.html#structARM__NAND__ECC__INFO">More...</a><br/></td></tr>
    123. 

  123. <tr class="separator:structARM__NAND__ECC__INFO"><td class="memSeparator" colspan="2">&#160;</td></tr>
    124. 

  124. <tr class="memitem:structARM__NAND__STATUS"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__STATUS">ARM_NAND_STATUS</a></td></tr>
    125. 

  125. <tr class="memdesc:structARM__NAND__STATUS"><td class="mdescLeft">&#160;</td><td class="mdescRight">NAND Status.  <a href="group__nand__interface__gr.html#structARM__NAND__STATUS">More...</a><br/></td></tr>
    126. 

  126. <tr class="separator:structARM__NAND__STATUS"><td class="memSeparator" colspan="2">&#160;</td></tr>
    127. 

  127. <tr class="memitem:structARM__NAND__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__NAND__CAPABILITIES">ARM_NAND_CAPABILITIES</a></td></tr>
    128. 

  128. <tr class="memdesc:structARM__NAND__CAPABILITIES"><td class="mdescLeft">&#160;</td><td class="mdescRight">NAND Driver Capabilities.  <a href="group__nand__interface__gr.html#structARM__NAND__CAPABILITIES">More...</a><br/></td></tr>
    129. 

  129. <tr class="separator:structARM__NAND__CAPABILITIES"><td class="memSeparator" colspan="2">&#160;</td></tr>
    130. 

  130. <tr class="memitem:structARM__DRIVER__NAND"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#structARM__DRIVER__NAND">ARM_DRIVER_NAND</a></td></tr>
    131. 

  131. <tr class="memdesc:structARM__DRIVER__NAND"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access structure of the NAND Driver.  <a href="group__nand__interface__gr.html#structARM__DRIVER__NAND">More...</a><br/></td></tr>
    132. 

  132. <tr class="separator:structARM__DRIVER__NAND"><td class="memSeparator" colspan="2">&#160;</td></tr>
    133. 

  133. </table><table class="memberdecls">
    134. 

  134. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
    135. 

  135. Macros</h2></td></tr>
    136. 

  136. <tr class="memitem:a121ff96c31275cef4bb7e86007665e1c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a121ff96c31275cef4bb7e86007665e1c">ARM_NAND_API_VERSION</a>&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4)  /* API version */</td></tr>
    137. 

  137. <tr class="separator:a121ff96c31275cef4bb7e86007665e1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    138. 

  138. <tr class="memitem:a72c7c93880689c3ce6d799afe6a8dd87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)&#160;&#160;&#160;Driver_NAND##n</td></tr>
    139. 

  139. <tr class="separator:a72c7c93880689c3ce6d799afe6a8dd87"><td class="memSeparator" colspan="2">&#160;</td></tr>
    140. 

  140. <tr class="memitem:aa0dd88065962a6e23fd82eb86fec27a7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa0dd88065962a6e23fd82eb86fec27a7">ARM_Driver_NAND_</a>(n)&#160;&#160;&#160;<a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)</td></tr>
    141. 

  141. <tr class="separator:aa0dd88065962a6e23fd82eb86fec27a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    142. 

  142. <tr class="memitem:a848a27ec9ebf0a13a82a1d9760f39d90"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a848a27ec9ebf0a13a82a1d9760f39d90">ARM_NAND_POWER_VCC_Pos</a>&#160;&#160;&#160;0</td></tr>
    143. 

  143. <tr class="separator:a848a27ec9ebf0a13a82a1d9760f39d90"><td class="memSeparator" colspan="2">&#160;</td></tr>
    144. 

  144. <tr class="memitem:ad898ef5cd4ffe3b6b09d69e224aa0912"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad898ef5cd4ffe3b6b09d69e224aa0912">ARM_NAND_POWER_VCC_Msk</a>&#160;&#160;&#160;(0x07UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td></tr>
    145. 

  145. <tr class="separator:ad898ef5cd4ffe3b6b09d69e224aa0912"><td class="memSeparator" colspan="2">&#160;</td></tr>
    146. 

  146. <tr class="memitem:a323c320a6195b78c2c79f5c6e85f02e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a323c320a6195b78c2c79f5c6e85f02e1">ARM_NAND_POWER_VCC_OFF</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td></tr>
    147. 

  147. <tr class="memdesc:a323c320a6195b78c2c79f5c6e85f02e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCC Power off.  <a href="#a323c320a6195b78c2c79f5c6e85f02e1">More...</a><br/></td></tr>
    148. 

  148. <tr class="separator:a323c320a6195b78c2c79f5c6e85f02e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    149. 

  149. <tr class="memitem:ad15355d67bc239ff49cceac69c2024b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad15355d67bc239ff49cceac69c2024b3">ARM_NAND_POWER_VCC_3V3</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td></tr>
    150. 

  150. <tr class="memdesc:ad15355d67bc239ff49cceac69c2024b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCC = 3.3V.  <a href="#ad15355d67bc239ff49cceac69c2024b3">More...</a><br/></td></tr>
    151. 

  151. <tr class="separator:ad15355d67bc239ff49cceac69c2024b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
    152. 

  152. <tr class="memitem:aa7b9d5a71125b745caba5c1d7aff6385"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa7b9d5a71125b745caba5c1d7aff6385">ARM_NAND_POWER_VCC_1V8</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td></tr>
    153. 

  153. <tr class="memdesc:aa7b9d5a71125b745caba5c1d7aff6385"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCC = 1.8V.  <a href="#aa7b9d5a71125b745caba5c1d7aff6385">More...</a><br/></td></tr>
    154. 

  154. <tr class="separator:aa7b9d5a71125b745caba5c1d7aff6385"><td class="memSeparator" colspan="2">&#160;</td></tr>
    155. 

  155. <tr class="memitem:ac38023b94cd8a68295d48a1019a386e0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac38023b94cd8a68295d48a1019a386e0">ARM_NAND_POWER_VCCQ_Pos</a>&#160;&#160;&#160;3</td></tr>
    156. 

  156. <tr class="separator:ac38023b94cd8a68295d48a1019a386e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    157. 

  157. <tr class="memitem:a7a453227301d7c08d09b22dc8afafbe7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a7a453227301d7c08d09b22dc8afafbe7">ARM_NAND_POWER_VCCQ_Msk</a>&#160;&#160;&#160;(0x07UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td></tr>
    158. 

  158. <tr class="separator:a7a453227301d7c08d09b22dc8afafbe7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    159. 

  159. <tr class="memitem:aca7679e8269ee986559f4218816937c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aca7679e8269ee986559f4218816937c3">ARM_NAND_POWER_VCCQ_OFF</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td></tr>
    160. 

  160. <tr class="memdesc:aca7679e8269ee986559f4218816937c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCCQ I/O Power off.  <a href="#aca7679e8269ee986559f4218816937c3">More...</a><br/></td></tr>
    161. 

  161. <tr class="separator:aca7679e8269ee986559f4218816937c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
    162. 

  162. <tr class="memitem:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6d5a8a33a0fdaaff2e57e1ac53c984c2">ARM_NAND_POWER_VCCQ_3V3</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td></tr>
    163. 

  163. <tr class="memdesc:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCCQ = 3.3V.  <a href="#a6d5a8a33a0fdaaff2e57e1ac53c984c2">More...</a><br/></td></tr>
    164. 

  164. <tr class="separator:a6d5a8a33a0fdaaff2e57e1ac53c984c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
    165. 

  165. <tr class="memitem:a653d9b4d7bee173beb49d8fec0469476"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a653d9b4d7bee173beb49d8fec0469476">ARM_NAND_POWER_VCCQ_1V8</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td></tr>
    166. 

  166. <tr class="memdesc:a653d9b4d7bee173beb49d8fec0469476"><td class="mdescLeft">&#160;</td><td class="mdescRight">VCCQ = 1.8V.  <a href="#a653d9b4d7bee173beb49d8fec0469476">More...</a><br/></td></tr>
    167. 

  167. <tr class="separator:a653d9b4d7bee173beb49d8fec0469476"><td class="memSeparator" colspan="2">&#160;</td></tr>
    168. 

  168. <tr class="memitem:ae2d278901881ffc73d3e0b48717b22f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae2d278901881ffc73d3e0b48717b22f0">ARM_NAND_POWER_VPP_OFF</a>&#160;&#160;&#160;(1UL &lt;&lt; 6)</td></tr>
    169. 

  169. <tr class="memdesc:ae2d278901881ffc73d3e0b48717b22f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">VPP off.  <a href="#ae2d278901881ffc73d3e0b48717b22f0">More...</a><br/></td></tr>
    170. 

  170. <tr class="separator:ae2d278901881ffc73d3e0b48717b22f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    171. 

  171. <tr class="memitem:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aeb0d50e30bbcd8ab59c3b78db634aad5">ARM_NAND_POWER_VPP_ON</a>&#160;&#160;&#160;(1UL &lt;&lt; 7)</td></tr>
    172. 

  172. <tr class="memdesc:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="mdescLeft">&#160;</td><td class="mdescRight">VPP on.  <a href="#aeb0d50e30bbcd8ab59c3b78db634aad5">More...</a><br/></td></tr>
    173. 

  173. <tr class="separator:aeb0d50e30bbcd8ab59c3b78db634aad5"><td class="memSeparator" colspan="2">&#160;</td></tr>
    174. 

  174. <tr class="memitem:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga9b063c3078e86b50d4aa892518b2e2d8">ARM_NAND_BUS_MODE</a>&#160;&#160;&#160;(0x01UL)</td></tr>
    175. 

  175. <tr class="memdesc:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Bus Mode as specified with arg.  <a href="group__nand__control__codes.html#ga9b063c3078e86b50d4aa892518b2e2d8">More...</a><br/></td></tr>
    176. 

  176. <tr class="separator:ga9b063c3078e86b50d4aa892518b2e2d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
    177. 

  177. <tr class="memitem:ga2d3356f5b47871c465ae7136a2c533f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga2d3356f5b47871c465ae7136a2c533f4">ARM_NAND_BUS_DATA_WIDTH</a>&#160;&#160;&#160;(0x02UL)</td></tr>
    178. 

  178. <tr class="memdesc:ga2d3356f5b47871c465ae7136a2c533f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Bus Data Width as specified with arg.  <a href="group__nand__control__codes.html#ga2d3356f5b47871c465ae7136a2c533f4">More...</a><br/></td></tr>
    179. 

  179. <tr class="separator:ga2d3356f5b47871c465ae7136a2c533f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    180. 

  180. <tr class="memitem:ga5d1d46198404fe115b013bdae7af2a2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga5d1d46198404fe115b013bdae7af2a2f">ARM_NAND_DRIVER_STRENGTH</a>&#160;&#160;&#160;(0x03UL)</td></tr>
    181. 

  181. <tr class="memdesc:ga5d1d46198404fe115b013bdae7af2a2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Driver Strength as specified with arg.  <a href="group__nand__control__codes.html#ga5d1d46198404fe115b013bdae7af2a2f">More...</a><br/></td></tr>
    182. 

  182. <tr class="separator:ga5d1d46198404fe115b013bdae7af2a2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    183. 

  183. <tr class="memitem:ga1bffc9f341e704ee0e845d86a2989921"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#ga1bffc9f341e704ee0e845d86a2989921">ARM_NAND_DEVICE_READY_EVENT</a>&#160;&#160;&#160;(0x04UL)</td></tr>
    184. 

  184. <tr class="memdesc:ga1bffc9f341e704ee0e845d86a2989921"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>; arg: 0=disabled (default), 1=enabled.  <a href="group__nand__control__codes.html#ga1bffc9f341e704ee0e845d86a2989921">More...</a><br/></td></tr>
    185. 

  185. <tr class="separator:ga1bffc9f341e704ee0e845d86a2989921"><td class="memSeparator" colspan="2">&#160;</td></tr>
    186. 

  186. <tr class="memitem:gaab6dea1b565aeb53e360876a4e50783c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__control__codes.html#gaab6dea1b565aeb53e360876a4e50783c">ARM_NAND_DRIVER_READY_EVENT</a>&#160;&#160;&#160;(0x05UL)</td></tr>
    187. 

  187. <tr class="memdesc:gaab6dea1b565aeb53e360876a4e50783c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>; arg: 0=disabled (default), 1=enabled.  <a href="group__nand__control__codes.html#gaab6dea1b565aeb53e360876a4e50783c">More...</a><br/></td></tr>
    188. 

  188. <tr class="separator:gaab6dea1b565aeb53e360876a4e50783c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    189. 

  189. <tr class="memitem:a372fc9b9cc1315046ceaffd6fd99e12c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a372fc9b9cc1315046ceaffd6fd99e12c">ARM_NAND_BUS_INTERFACE_Pos</a>&#160;&#160;&#160;4</td></tr>
    190. 

  190. <tr class="separator:a372fc9b9cc1315046ceaffd6fd99e12c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    191. 

  191. <tr class="memitem:aea213eb1ba9c67beb6216a630d81b91f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aea213eb1ba9c67beb6216a630d81b91f">ARM_NAND_BUS_INTERFACE_Msk</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_BUS_INTERFACE_Pos)</td></tr>
    192. 

  192. <tr class="separator:aea213eb1ba9c67beb6216a630d81b91f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    193. 

  193. <tr class="memitem:gac7743aeb6411b97f9fc6a24b556f4963"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gac7743aeb6411b97f9fc6a24b556f4963">ARM_NAND_BUS_SDR</a>&#160;&#160;&#160;(0x00UL &lt;&lt; ARM_NAND_BUS_INTERFACE_Pos)</td></tr>
    194. 

  194. <tr class="memdesc:gac7743aeb6411b97f9fc6a24b556f4963"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Interface: SDR (Single Data Rate) - Traditional interface (default)  <a href="group__nand__bus__mode__codes.html#gac7743aeb6411b97f9fc6a24b556f4963">More...</a><br/></td></tr>
    195. 

  195. <tr class="separator:gac7743aeb6411b97f9fc6a24b556f4963"><td class="memSeparator" colspan="2">&#160;</td></tr>
    196. 

  196. <tr class="memitem:ga82b8261b3d0d85881535adada318a7df"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga82b8261b3d0d85881535adada318a7df">ARM_NAND_BUS_DDR</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_BUS_INTERFACE_Pos)</td></tr>
    197. 

  197. <tr class="memdesc:ga82b8261b3d0d85881535adada318a7df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Interface: NV-DDR (Double Data Rate)  <a href="group__nand__bus__mode__codes.html#ga82b8261b3d0d85881535adada318a7df">More...</a><br/></td></tr>
    198. 

  198. <tr class="separator:ga82b8261b3d0d85881535adada318a7df"><td class="memSeparator" colspan="2">&#160;</td></tr>
    199. 

  199. <tr class="memitem:ga13c102201d6021db184a2f068656c518"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga13c102201d6021db184a2f068656c518">ARM_NAND_BUS_DDR2</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_BUS_INTERFACE_Pos)</td></tr>
    200. 

  200. <tr class="memdesc:ga13c102201d6021db184a2f068656c518"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Interface: NV-DDR2 (Double Data Rate)  <a href="group__nand__bus__mode__codes.html#ga13c102201d6021db184a2f068656c518">More...</a><br/></td></tr>
    201. 

  201. <tr class="separator:ga13c102201d6021db184a2f068656c518"><td class="memSeparator" colspan="2">&#160;</td></tr>
    202. 

  202. <tr class="memitem:acc98e42d23656734c7f9a8a5421842d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#acc98e42d23656734c7f9a8a5421842d6">ARM_NAND_BUS_TIMING_MODE_Pos</a>&#160;&#160;&#160;0</td></tr>
    203. 

  203. <tr class="separator:acc98e42d23656734c7f9a8a5421842d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    204. 

  204. <tr class="memitem:a57f6c319265b00878661656103abe660"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a57f6c319265b00878661656103abe660">ARM_NAND_BUS_TIMING_MODE_Msk</a>&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    205. 

  205. <tr class="separator:a57f6c319265b00878661656103abe660"><td class="memSeparator" colspan="2">&#160;</td></tr>
    206. 

  206. <tr class="memitem:ga971e574ac412bbba445055e9afc384ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga971e574ac412bbba445055e9afc384ba">ARM_NAND_BUS_TIMING_MODE_0</a>&#160;&#160;&#160;(0x00UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    207. 

  207. <tr class="memdesc:ga971e574ac412bbba445055e9afc384ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 0 (default)  <a href="group__nand__bus__mode__codes.html#ga971e574ac412bbba445055e9afc384ba">More...</a><br/></td></tr>
    208. 

  208. <tr class="separator:ga971e574ac412bbba445055e9afc384ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
    209. 

  209. <tr class="memitem:ga475a339e929eca46e11bc8a7b330aa45"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga475a339e929eca46e11bc8a7b330aa45">ARM_NAND_BUS_TIMING_MODE_1</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    210. 

  210. <tr class="memdesc:ga475a339e929eca46e11bc8a7b330aa45"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 1.  <a href="group__nand__bus__mode__codes.html#ga475a339e929eca46e11bc8a7b330aa45">More...</a><br/></td></tr>
    211. 

  211. <tr class="separator:ga475a339e929eca46e11bc8a7b330aa45"><td class="memSeparator" colspan="2">&#160;</td></tr>
    212. 

  212. <tr class="memitem:gaed6154fb03b5516faf0bfd11d7a46309"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaed6154fb03b5516faf0bfd11d7a46309">ARM_NAND_BUS_TIMING_MODE_2</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    213. 

  213. <tr class="memdesc:gaed6154fb03b5516faf0bfd11d7a46309"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 2.  <a href="group__nand__bus__mode__codes.html#gaed6154fb03b5516faf0bfd11d7a46309">More...</a><br/></td></tr>
    214. 

  214. <tr class="separator:gaed6154fb03b5516faf0bfd11d7a46309"><td class="memSeparator" colspan="2">&#160;</td></tr>
    215. 

  215. <tr class="memitem:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gacbc4e07e1af6ef0e4c656428e81464a9">ARM_NAND_BUS_TIMING_MODE_3</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    216. 

  216. <tr class="memdesc:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 3.  <a href="group__nand__bus__mode__codes.html#gacbc4e07e1af6ef0e4c656428e81464a9">More...</a><br/></td></tr>
    217. 

  217. <tr class="separator:gacbc4e07e1af6ef0e4c656428e81464a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
    218. 

  218. <tr class="memitem:ga709d51a5215cd23ce2d85aec57141456"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga709d51a5215cd23ce2d85aec57141456">ARM_NAND_BUS_TIMING_MODE_4</a>&#160;&#160;&#160;(0x04UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    219. 

  219. <tr class="memdesc:ga709d51a5215cd23ce2d85aec57141456"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 4 (SDR EDO capable)  <a href="group__nand__bus__mode__codes.html#ga709d51a5215cd23ce2d85aec57141456">More...</a><br/></td></tr>
    220. 

  220. <tr class="separator:ga709d51a5215cd23ce2d85aec57141456"><td class="memSeparator" colspan="2">&#160;</td></tr>
    221. 

  221. <tr class="memitem:gaee3cad14ce2b8b9af69149bf74597791"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaee3cad14ce2b8b9af69149bf74597791">ARM_NAND_BUS_TIMING_MODE_5</a>&#160;&#160;&#160;(0x05UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    222. 

  222. <tr class="memdesc:gaee3cad14ce2b8b9af69149bf74597791"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 5 (SDR EDO capable)  <a href="group__nand__bus__mode__codes.html#gaee3cad14ce2b8b9af69149bf74597791">More...</a><br/></td></tr>
    223. 

  223. <tr class="separator:gaee3cad14ce2b8b9af69149bf74597791"><td class="memSeparator" colspan="2">&#160;</td></tr>
    224. 

  224. <tr class="memitem:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga4a3524e0eba994b3a66e06cde877f0f6">ARM_NAND_BUS_TIMING_MODE_6</a>&#160;&#160;&#160;(0x06UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    225. 

  225. <tr class="memdesc:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 6 (NV-DDR2 only)  <a href="group__nand__bus__mode__codes.html#ga4a3524e0eba994b3a66e06cde877f0f6">More...</a><br/></td></tr>
    226. 

  226. <tr class="separator:ga4a3524e0eba994b3a66e06cde877f0f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    227. 

  227. <tr class="memitem:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaa63d75f5f2b48a7345a066d58de1bd23">ARM_NAND_BUS_TIMING_MODE_7</a>&#160;&#160;&#160;(0x07UL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td></tr>
    228. 

  228. <tr class="memdesc:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timing Mode 7 (NV-DDR2 only)  <a href="group__nand__bus__mode__codes.html#gaa63d75f5f2b48a7345a066d58de1bd23">More...</a><br/></td></tr>
    229. 

  229. <tr class="separator:gaa63d75f5f2b48a7345a066d58de1bd23"><td class="memSeparator" colspan="2">&#160;</td></tr>
    230. 

  230. <tr class="memitem:a57b282c0818c87b79ea4f11d03cc4f3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a57b282c0818c87b79ea4f11d03cc4f3c">ARM_NAND_BUS_DDR2_DO_WCYC_Pos</a>&#160;&#160;&#160;8</td></tr>
    231. 

  231. <tr class="separator:a57b282c0818c87b79ea4f11d03cc4f3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    232. 

  232. <tr class="memitem:ad30dfdbdc50a7ff72a5bb173c5f549dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad30dfdbdc50a7ff72a5bb173c5f549dc">ARM_NAND_BUS_DDR2_DO_WCYC_Msk</a>&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td></tr>
    233. 

  233. <tr class="separator:ad30dfdbdc50a7ff72a5bb173c5f549dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
    234. 

  234. <tr class="memitem:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga77348df5f5c2c96bcaeec60b6da02c1b">ARM_NAND_BUS_DDR2_DO_WCYC_0</a>&#160;&#160;&#160;(0x00UL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td></tr>
    235. 

  235. <tr class="memdesc:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 0 (default)  <a href="group__nand__bus__mode__codes.html#ga77348df5f5c2c96bcaeec60b6da02c1b">More...</a><br/></td></tr>
    236. 

  236. <tr class="separator:ga77348df5f5c2c96bcaeec60b6da02c1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
    237. 

  237. <tr class="memitem:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga5839be0b4b2eb930ec039a3403b5e89e">ARM_NAND_BUS_DDR2_DO_WCYC_1</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td></tr>
    238. 

  238. <tr class="memdesc:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 1.  <a href="group__nand__bus__mode__codes.html#ga5839be0b4b2eb930ec039a3403b5e89e">More...</a><br/></td></tr>
    239. 

  239. <tr class="separator:ga5839be0b4b2eb930ec039a3403b5e89e"><td class="memSeparator" colspan="2">&#160;</td></tr>
    240. 

  240. <tr class="memitem:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga10a1ef3be69bfa7e6cc657bee751a077">ARM_NAND_BUS_DDR2_DO_WCYC_2</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td></tr>
    241. 

  241. <tr class="memdesc:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 2.  <a href="group__nand__bus__mode__codes.html#ga10a1ef3be69bfa7e6cc657bee751a077">More...</a><br/></td></tr>
    242. 

  242. <tr class="separator:ga10a1ef3be69bfa7e6cc657bee751a077"><td class="memSeparator" colspan="2">&#160;</td></tr>
    243. 

  243. <tr class="memitem:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga7f9e8416c4a4e20c4a04323e39f2100d">ARM_NAND_BUS_DDR2_DO_WCYC_4</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td></tr>
    244. 

  244. <tr class="memdesc:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Output Warm-up cycles: 4.  <a href="group__nand__bus__mode__codes.html#ga7f9e8416c4a4e20c4a04323e39f2100d">More...</a><br/></td></tr>
    245. 

  245. <tr class="separator:ga7f9e8416c4a4e20c4a04323e39f2100d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    246. 

  246. <tr class="memitem:aa80b898cdf665aa14ff0e181e4ff31f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa80b898cdf665aa14ff0e181e4ff31f1">ARM_NAND_BUS_DDR2_DI_WCYC_Pos</a>&#160;&#160;&#160;12</td></tr>
    247. 

  247. <tr class="separator:aa80b898cdf665aa14ff0e181e4ff31f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    248. 

  248. <tr class="memitem:ad9ab38101de68a1bc186f5687f63f7c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ad9ab38101de68a1bc186f5687f63f7c3">ARM_NAND_BUS_DDR2_DI_WCYC_Msk</a>&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td></tr>
    249. 

  249. <tr class="separator:ad9ab38101de68a1bc186f5687f63f7c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
    250. 

  250. <tr class="memitem:gaeee1853dea5e96cb19d2596cc0e70169"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaeee1853dea5e96cb19d2596cc0e70169">ARM_NAND_BUS_DDR2_DI_WCYC_0</a>&#160;&#160;&#160;(0x00UL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td></tr>
    251. 

  251. <tr class="memdesc:gaeee1853dea5e96cb19d2596cc0e70169"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 0 (default)  <a href="group__nand__bus__mode__codes.html#gaeee1853dea5e96cb19d2596cc0e70169">More...</a><br/></td></tr>
    252. 

  252. <tr class="separator:gaeee1853dea5e96cb19d2596cc0e70169"><td class="memSeparator" colspan="2">&#160;</td></tr>
    253. 

  253. <tr class="memitem:ga42560a1f046e20cc4956276156c4ce25"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga42560a1f046e20cc4956276156c4ce25">ARM_NAND_BUS_DDR2_DI_WCYC_1</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td></tr>
    254. 

  254. <tr class="memdesc:ga42560a1f046e20cc4956276156c4ce25"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 1.  <a href="group__nand__bus__mode__codes.html#ga42560a1f046e20cc4956276156c4ce25">More...</a><br/></td></tr>
    255. 

  255. <tr class="separator:ga42560a1f046e20cc4956276156c4ce25"><td class="memSeparator" colspan="2">&#160;</td></tr>
    256. 

  256. <tr class="memitem:gaad2e7807292d84a5070143626f5c2756"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gaad2e7807292d84a5070143626f5c2756">ARM_NAND_BUS_DDR2_DI_WCYC_2</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td></tr>
    257. 

  257. <tr class="memdesc:gaad2e7807292d84a5070143626f5c2756"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 2.  <a href="group__nand__bus__mode__codes.html#gaad2e7807292d84a5070143626f5c2756">More...</a><br/></td></tr>
    258. 

  258. <tr class="separator:gaad2e7807292d84a5070143626f5c2756"><td class="memSeparator" colspan="2">&#160;</td></tr>
    259. 

  259. <tr class="memitem:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5">ARM_NAND_BUS_DDR2_DI_WCYC_4</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td></tr>
    260. 

  260. <tr class="memdesc:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Data Input Warm-up cycles: 4.  <a href="group__nand__bus__mode__codes.html#ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5">More...</a><br/></td></tr>
    261. 

  261. <tr class="separator:ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
    262. 

  262. <tr class="memitem:ga465ae06a6e097959620346304182e273"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga465ae06a6e097959620346304182e273">ARM_NAND_BUS_DDR2_VEN</a>&#160;&#160;&#160;(1UL &lt;&lt; 16)</td></tr>
    263. 

  263. <tr class="memdesc:ga465ae06a6e097959620346304182e273"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Enable external VREFQ as reference.  <a href="group__nand__bus__mode__codes.html#ga465ae06a6e097959620346304182e273">More...</a><br/></td></tr>
    264. 

  264. <tr class="separator:ga465ae06a6e097959620346304182e273"><td class="memSeparator" colspan="2">&#160;</td></tr>
    265. 

  265. <tr class="memitem:gad38354e4a34adbf881afc7f89ff06e89"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#gad38354e4a34adbf881afc7f89ff06e89">ARM_NAND_BUS_DDR2_CMPD</a>&#160;&#160;&#160;(1UL &lt;&lt; 17)</td></tr>
    266. 

  266. <tr class="memdesc:gad38354e4a34adbf881afc7f89ff06e89"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Enable complementary DQS (DQS_c) signal.  <a href="group__nand__bus__mode__codes.html#gad38354e4a34adbf881afc7f89ff06e89">More...</a><br/></td></tr>
    267. 

  267. <tr class="separator:gad38354e4a34adbf881afc7f89ff06e89"><td class="memSeparator" colspan="2">&#160;</td></tr>
    268. 

  268. <tr class="memitem:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__bus__mode__codes.html#ga8a2d599082b9fe56cee1c6454bb3c6a1">ARM_NAND_BUS_DDR2_CMPR</a>&#160;&#160;&#160;(1UL &lt;&lt; 18)</td></tr>
    269. 

  269. <tr class="memdesc:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">DDR2 Enable complementary RE_n (RE_c) signal.  <a href="group__nand__bus__mode__codes.html#ga8a2d599082b9fe56cee1c6454bb3c6a1">More...</a><br/></td></tr>
    270. 

  270. <tr class="separator:ga8a2d599082b9fe56cee1c6454bb3c6a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    271. 

  271. <tr class="memitem:ga578051cc193ae0b7125aec8007071d21"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__data__bus__width__codes.html#ga578051cc193ae0b7125aec8007071d21">ARM_NAND_BUS_DATA_WIDTH_8</a>&#160;&#160;&#160;(0x00UL)</td></tr>
    272. 

  272. <tr class="memdesc:ga578051cc193ae0b7125aec8007071d21"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Data Width: 8 bit (default)  <a href="group__nand__data__bus__width__codes.html#ga578051cc193ae0b7125aec8007071d21">More...</a><br/></td></tr>
    273. 

  273. <tr class="separator:ga578051cc193ae0b7125aec8007071d21"><td class="memSeparator" colspan="2">&#160;</td></tr>
    274. 

  274. <tr class="memitem:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__data__bus__width__codes.html#ga49e0e3a946a4d9f26dbd5b32ccc3b2f3">ARM_NAND_BUS_DATA_WIDTH_16</a>&#160;&#160;&#160;(0x01UL)</td></tr>
    275. 

  275. <tr class="memdesc:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus Data Width: 16 bit.  <a href="group__nand__data__bus__width__codes.html#ga49e0e3a946a4d9f26dbd5b32ccc3b2f3">More...</a><br/></td></tr>
    276. 

  276. <tr class="separator:ga49e0e3a946a4d9f26dbd5b32ccc3b2f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
    277. 

  277. <tr class="memitem:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga942e20df12022f3bbd0e9a558ec1c7a0">ARM_NAND_DRIVER_STRENGTH_18</a>&#160;&#160;&#160;(0x00UL)</td></tr>
    278. 

  278. <tr class="memdesc:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength 2.0x = 18 Ohms.  <a href="group__nand__driver__strength__codes.html#ga942e20df12022f3bbd0e9a558ec1c7a0">More...</a><br/></td></tr>
    279. 

  279. <tr class="separator:ga942e20df12022f3bbd0e9a558ec1c7a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    280. 

  280. <tr class="memitem:ga17188e039f5f87c581033327399a057d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga17188e039f5f87c581033327399a057d">ARM_NAND_DRIVER_STRENGTH_25</a>&#160;&#160;&#160;(0x01UL)</td></tr>
    281. 

  281. <tr class="memdesc:ga17188e039f5f87c581033327399a057d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength 1.4x = 25 Ohms.  <a href="group__nand__driver__strength__codes.html#ga17188e039f5f87c581033327399a057d">More...</a><br/></td></tr>
    282. 

  282. <tr class="separator:ga17188e039f5f87c581033327399a057d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    283. 

  283. <tr class="memitem:ga33562a66a5bf328eea82b2f1893a7874"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#ga33562a66a5bf328eea82b2f1893a7874">ARM_NAND_DRIVER_STRENGTH_35</a>&#160;&#160;&#160;(0x02UL)</td></tr>
    284. 

  284. <tr class="memdesc:ga33562a66a5bf328eea82b2f1893a7874"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength 1.0x = 35 Ohms (default)  <a href="group__nand__driver__strength__codes.html#ga33562a66a5bf328eea82b2f1893a7874">More...</a><br/></td></tr>
    285. 

  285. <tr class="separator:ga33562a66a5bf328eea82b2f1893a7874"><td class="memSeparator" colspan="2">&#160;</td></tr>
    286. 

  286. <tr class="memitem:gaa502e2c995447037d266f939faa43223"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__strength__codes.html#gaa502e2c995447037d266f939faa43223">ARM_NAND_DRIVER_STRENGTH_50</a>&#160;&#160;&#160;(0x03UL)</td></tr>
    287. 

  287. <tr class="memdesc:gaa502e2c995447037d266f939faa43223"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Strength 0.7x = 50 Ohms.  <a href="group__nand__driver__strength__codes.html#gaa502e2c995447037d266f939faa43223">More...</a><br/></td></tr>
    288. 

  288. <tr class="separator:gaa502e2c995447037d266f939faa43223"><td class="memSeparator" colspan="2">&#160;</td></tr>
    289. 

  289. <tr class="memitem:a7944be4f63c439d5d64053ad9476407b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a7944be4f63c439d5d64053ad9476407b">ARM_NAND_ECC_INDEX_Pos</a>&#160;&#160;&#160;0</td></tr>
    290. 

  290. <tr class="separator:a7944be4f63c439d5d64053ad9476407b"><td class="memSeparator" colspan="2">&#160;</td></tr>
    291. 

  291. <tr class="memitem:a656537439264ab495c86e4c36051a3c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a656537439264ab495c86e4c36051a3c1">ARM_NAND_ECC_INDEX_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_ECC_INDEX_Pos)</td></tr>
    292. 

  292. <tr class="separator:a656537439264ab495c86e4c36051a3c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    293. 

  293. <tr class="memitem:gac2eb4475f12a443209165d29fe200030"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#gac2eb4475f12a443209165d29fe200030">ARM_NAND_ECC</a>(n)&#160;&#160;&#160;((n) &amp; <a class="el" href="Driver__NAND_8h.html#a656537439264ab495c86e4c36051a3c1">ARM_NAND_ECC_INDEX_Msk</a>)</td></tr>
    294. 

  294. <tr class="memdesc:gac2eb4475f12a443209165d29fe200030"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select ECC.  <a href="group__nand__driver__ecc__codes.html#gac2eb4475f12a443209165d29fe200030">More...</a><br/></td></tr>
    295. 

  295. <tr class="separator:gac2eb4475f12a443209165d29fe200030"><td class="memSeparator" colspan="2">&#160;</td></tr>
    296. 

  296. <tr class="memitem:ga15c79a12200c16f953936635f930df1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#ga15c79a12200c16f953936635f930df1d">ARM_NAND_ECC0</a>&#160;&#160;&#160;(1UL &lt;&lt; 8)</td></tr>
    297. 

  297. <tr class="memdesc:ga15c79a12200c16f953936635f930df1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use ECC0 of selected ECC.  <a href="group__nand__driver__ecc__codes.html#ga15c79a12200c16f953936635f930df1d">More...</a><br/></td></tr>
    298. 

  298. <tr class="separator:ga15c79a12200c16f953936635f930df1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    299. 

  299. <tr class="memitem:gaee653288a88318ee33d1db81baa69bbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__ecc__codes.html#gaee653288a88318ee33d1db81baa69bbc">ARM_NAND_ECC1</a>&#160;&#160;&#160;(1UL &lt;&lt; 9)</td></tr>
    300. 

  300. <tr class="memdesc:gaee653288a88318ee33d1db81baa69bbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use ECC1 of selected ECC.  <a href="group__nand__driver__ecc__codes.html#gaee653288a88318ee33d1db81baa69bbc">More...</a><br/></td></tr>
    301. 

  301. <tr class="separator:gaee653288a88318ee33d1db81baa69bbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
    302. 

  302. <tr class="memitem:gaf40631ba62411e0ac06c3a945d608581"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__flag__codes.html#gaf40631ba62411e0ac06c3a945d608581">ARM_NAND_DRIVER_DONE_EVENT</a>&#160;&#160;&#160;(1UL &lt;&lt; 16)</td></tr>
    303. 

  303. <tr class="memdesc:gaf40631ba62411e0ac06c3a945d608581"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate <a class="el" href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">ARM_NAND_EVENT_DRIVER_DONE</a>.  <a href="group__nand__driver__flag__codes.html#gaf40631ba62411e0ac06c3a945d608581">More...</a><br/></td></tr>
    304. 

  304. <tr class="separator:gaf40631ba62411e0ac06c3a945d608581"><td class="memSeparator" colspan="2">&#160;</td></tr>
    305. 

  305. <tr class="memitem:gaef90c96cd4f2309044d7d438c6b0930a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gaef90c96cd4f2309044d7d438c6b0930a">ARM_NAND_CODE_SEND_CMD1</a>&#160;&#160;&#160;(1UL &lt;&lt; 17)</td></tr>
    306. 

  306. <tr class="memdesc:gaef90c96cd4f2309044d7d438c6b0930a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Command 1.  <a href="group__nand__driver__seq__exec__codes.html#gaef90c96cd4f2309044d7d438c6b0930a">More...</a><br/></td></tr>
    307. 

  307. <tr class="separator:gaef90c96cd4f2309044d7d438c6b0930a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    308. 

  308. <tr class="memitem:ga891bcba60ebb1195ec80c00c9bec748a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga891bcba60ebb1195ec80c00c9bec748a">ARM_NAND_CODE_SEND_ADDR_COL1</a>&#160;&#160;&#160;(1UL &lt;&lt; 18)</td></tr>
    309. 

  309. <tr class="memdesc:ga891bcba60ebb1195ec80c00c9bec748a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Column Address 1.  <a href="group__nand__driver__seq__exec__codes.html#ga891bcba60ebb1195ec80c00c9bec748a">More...</a><br/></td></tr>
    310. 

  310. <tr class="separator:ga891bcba60ebb1195ec80c00c9bec748a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    311. 

  311. <tr class="memitem:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga62a3f6ddcfb9ee317655bbec9e09bc10">ARM_NAND_CODE_SEND_ADDR_COL2</a>&#160;&#160;&#160;(1UL &lt;&lt; 19)</td></tr>
    312. 

  312. <tr class="memdesc:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Column Address 2.  <a href="group__nand__driver__seq__exec__codes.html#ga62a3f6ddcfb9ee317655bbec9e09bc10">More...</a><br/></td></tr>
    313. 

  313. <tr class="separator:ga62a3f6ddcfb9ee317655bbec9e09bc10"><td class="memSeparator" colspan="2">&#160;</td></tr>
    314. 

  314. <tr class="memitem:gadc001e69d1e81dc28a542237c6fe11ff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gadc001e69d1e81dc28a542237c6fe11ff">ARM_NAND_CODE_SEND_ADDR_ROW1</a>&#160;&#160;&#160;(1UL &lt;&lt; 20)</td></tr>
    315. 

  315. <tr class="memdesc:gadc001e69d1e81dc28a542237c6fe11ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Row Address 1.  <a href="group__nand__driver__seq__exec__codes.html#gadc001e69d1e81dc28a542237c6fe11ff">More...</a><br/></td></tr>
    316. 

  316. <tr class="separator:gadc001e69d1e81dc28a542237c6fe11ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
    317. 

  317. <tr class="memitem:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga5e55628cb59f5d7d35c529f04ebfcd10">ARM_NAND_CODE_SEND_ADDR_ROW2</a>&#160;&#160;&#160;(1UL &lt;&lt; 21)</td></tr>
    318. 

  318. <tr class="memdesc:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Row Address 2.  <a href="group__nand__driver__seq__exec__codes.html#ga5e55628cb59f5d7d35c529f04ebfcd10">More...</a><br/></td></tr>
    319. 

  319. <tr class="separator:ga5e55628cb59f5d7d35c529f04ebfcd10"><td class="memSeparator" colspan="2">&#160;</td></tr>
    320. 

  320. <tr class="memitem:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gaeb5d1be9c13b7ad2ad246d5db10cd419">ARM_NAND_CODE_SEND_ADDR_ROW3</a>&#160;&#160;&#160;(1UL &lt;&lt; 22)</td></tr>
    321. 

  321. <tr class="memdesc:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Row Address 3.  <a href="group__nand__driver__seq__exec__codes.html#gaeb5d1be9c13b7ad2ad246d5db10cd419">More...</a><br/></td></tr>
    322. 

  322. <tr class="separator:gaeb5d1be9c13b7ad2ad246d5db10cd419"><td class="memSeparator" colspan="2">&#160;</td></tr>
    323. 

  323. <tr class="memitem:ga959522c98183036da32984dd5e07979b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga959522c98183036da32984dd5e07979b">ARM_NAND_CODE_INC_ADDR_ROW</a>&#160;&#160;&#160;(1UL &lt;&lt; 23)</td></tr>
    324. 

  324. <tr class="memdesc:ga959522c98183036da32984dd5e07979b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Auto-increment Row Address.  <a href="group__nand__driver__seq__exec__codes.html#ga959522c98183036da32984dd5e07979b">More...</a><br/></td></tr>
    325. 

  325. <tr class="separator:ga959522c98183036da32984dd5e07979b"><td class="memSeparator" colspan="2">&#160;</td></tr>
    326. 

  326. <tr class="memitem:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga1b40fc5fbf22dc4fa8130f5836e30d12">ARM_NAND_CODE_WRITE_DATA</a>&#160;&#160;&#160;(1UL &lt;&lt; 24)</td></tr>
    327. 

  327. <tr class="memdesc:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write Data.  <a href="group__nand__driver__seq__exec__codes.html#ga1b40fc5fbf22dc4fa8130f5836e30d12">More...</a><br/></td></tr>
    328. 

  328. <tr class="separator:ga1b40fc5fbf22dc4fa8130f5836e30d12"><td class="memSeparator" colspan="2">&#160;</td></tr>
    329. 

  329. <tr class="memitem:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gacffafbbbca74f7ffa4cd3bb6b067c4ef">ARM_NAND_CODE_SEND_CMD2</a>&#160;&#160;&#160;(1UL &lt;&lt; 25)</td></tr>
    330. 

  330. <tr class="memdesc:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Command 2.  <a href="group__nand__driver__seq__exec__codes.html#gacffafbbbca74f7ffa4cd3bb6b067c4ef">More...</a><br/></td></tr>
    331. 

  331. <tr class="separator:gacffafbbbca74f7ffa4cd3bb6b067c4ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
    332. 

  332. <tr class="memitem:ga0f4a8b1e97656e09f1c383852f290a37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga0f4a8b1e97656e09f1c383852f290a37">ARM_NAND_CODE_WAIT_BUSY</a>&#160;&#160;&#160;(1UL &lt;&lt; 26)</td></tr>
    333. 

  333. <tr class="memdesc:ga0f4a8b1e97656e09f1c383852f290a37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Wait while R/Bn busy.  <a href="group__nand__driver__seq__exec__codes.html#ga0f4a8b1e97656e09f1c383852f290a37">More...</a><br/></td></tr>
    334. 

  334. <tr class="separator:ga0f4a8b1e97656e09f1c383852f290a37"><td class="memSeparator" colspan="2">&#160;</td></tr>
    335. 

  335. <tr class="memitem:gab524d840ab57c720ce8560144651dc9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#gab524d840ab57c720ce8560144651dc9d">ARM_NAND_CODE_READ_DATA</a>&#160;&#160;&#160;(1UL &lt;&lt; 27)</td></tr>
    336. 

  336. <tr class="memdesc:gab524d840ab57c720ce8560144651dc9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Data.  <a href="group__nand__driver__seq__exec__codes.html#gab524d840ab57c720ce8560144651dc9d">More...</a><br/></td></tr>
    337. 

  337. <tr class="separator:gab524d840ab57c720ce8560144651dc9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    338. 

  338. <tr class="memitem:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga20f96743ab77bda14ba391dc0c3cdba5">ARM_NAND_CODE_SEND_CMD3</a>&#160;&#160;&#160;(1UL &lt;&lt; 28)</td></tr>
    339. 

  339. <tr class="memdesc:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send Command 3.  <a href="group__nand__driver__seq__exec__codes.html#ga20f96743ab77bda14ba391dc0c3cdba5">More...</a><br/></td></tr>
    340. 

  340. <tr class="separator:ga20f96743ab77bda14ba391dc0c3cdba5"><td class="memSeparator" colspan="2">&#160;</td></tr>
    341. 

  341. <tr class="memitem:ga2250f6a532d2c0834bfdc618761ddc86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__driver__seq__exec__codes.html#ga2250f6a532d2c0834bfdc618761ddc86">ARM_NAND_CODE_READ_STATUS</a>&#160;&#160;&#160;(1UL &lt;&lt; 29)</td></tr>
    342. 

  342. <tr class="memdesc:ga2250f6a532d2c0834bfdc618761ddc86"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Status byte and check FAIL bit (bit 0)  <a href="group__nand__driver__seq__exec__codes.html#ga2250f6a532d2c0834bfdc618761ddc86">More...</a><br/></td></tr>
    343. 

  343. <tr class="separator:ga2250f6a532d2c0834bfdc618761ddc86"><td class="memSeparator" colspan="2">&#160;</td></tr>
    344. 

  344. <tr class="memitem:ae34722cf52938f50bf117780a742b6f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae34722cf52938f50bf117780a742b6f1">ARM_NAND_CODE_CMD1_Pos</a>&#160;&#160;&#160;0</td></tr>
    345. 

  345. <tr class="separator:ae34722cf52938f50bf117780a742b6f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    346. 

  346. <tr class="memitem:ac65db62329bb943592afdb523e4aadca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac65db62329bb943592afdb523e4aadca">ARM_NAND_CODE_CMD1_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD1_Pos)</td></tr>
    347. 

  347. <tr class="separator:ac65db62329bb943592afdb523e4aadca"><td class="memSeparator" colspan="2">&#160;</td></tr>
    348. 

  348. <tr class="memitem:aeebe274650e7d0c02b478318759972e5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aeebe274650e7d0c02b478318759972e5">ARM_NAND_CODE_CMD2_Pos</a>&#160;&#160;&#160;8</td></tr>
    349. 

  349. <tr class="separator:aeebe274650e7d0c02b478318759972e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
    350. 

  350. <tr class="memitem:a0f963016c81be2ddf7a09d983de226a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a0f963016c81be2ddf7a09d983de226a9">ARM_NAND_CODE_CMD2_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD2_Pos)</td></tr>
    351. 

  351. <tr class="separator:a0f963016c81be2ddf7a09d983de226a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
    352. 

  352. <tr class="memitem:aa0b87b819cf3c94f32e3ef18dcfd1c6c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#aa0b87b819cf3c94f32e3ef18dcfd1c6c">ARM_NAND_CODE_CMD3_Pos</a>&#160;&#160;&#160;16</td></tr>
    353. 

  353. <tr class="separator:aa0b87b819cf3c94f32e3ef18dcfd1c6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    354. 

  354. <tr class="memitem:a16d474e55d0f6ea6efc3cc5436493b22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a16d474e55d0f6ea6efc3cc5436493b22">ARM_NAND_CODE_CMD3_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD3_Pos)</td></tr>
    355. 

  355. <tr class="separator:a16d474e55d0f6ea6efc3cc5436493b22"><td class="memSeparator" colspan="2">&#160;</td></tr>
    356. 

  356. <tr class="memitem:ab8b06772e2b6c5930319b17bbb806133"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ab8b06772e2b6c5930319b17bbb806133">ARM_NAND_CODE_ADDR_COL1_Pos</a>&#160;&#160;&#160;0</td></tr>
    357. 

  357. <tr class="separator:ab8b06772e2b6c5930319b17bbb806133"><td class="memSeparator" colspan="2">&#160;</td></tr>
    358. 

  358. <tr class="memitem:a0951de69f3836c1ab229ec60b3996fcc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a0951de69f3836c1ab229ec60b3996fcc">ARM_NAND_CODE_ADDR_COL1_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_COL1_Pos)</td></tr>
    359. 

  359. <tr class="separator:a0951de69f3836c1ab229ec60b3996fcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
    360. 

  360. <tr class="memitem:a1c4b9e7f44f77ebf665af8860a3c7528"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a1c4b9e7f44f77ebf665af8860a3c7528">ARM_NAND_CODE_ADDR_COL2_Pos</a>&#160;&#160;&#160;8</td></tr>
    361. 

  361. <tr class="separator:a1c4b9e7f44f77ebf665af8860a3c7528"><td class="memSeparator" colspan="2">&#160;</td></tr>
    362. 

  362. <tr class="memitem:a6126261e7c53713cee04aeae839d330e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6126261e7c53713cee04aeae839d330e">ARM_NAND_CODE_ADDR_COL2_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_COL2_Pos)</td></tr>
    363. 

  363. <tr class="separator:a6126261e7c53713cee04aeae839d330e"><td class="memSeparator" colspan="2">&#160;</td></tr>
    364. 

  364. <tr class="memitem:a8b75efa00810fcf23fb0f12e7f62d338"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a8b75efa00810fcf23fb0f12e7f62d338">ARM_NAND_CODE_ADDR_ROW1_Pos</a>&#160;&#160;&#160;0</td></tr>
    365. 

  365. <tr class="separator:a8b75efa00810fcf23fb0f12e7f62d338"><td class="memSeparator" colspan="2">&#160;</td></tr>
    366. 

  366. <tr class="memitem:ac24600be47e725ab1ad4193fd84daf80"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ac24600be47e725ab1ad4193fd84daf80">ARM_NAND_CODE_ADDR_ROW1_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW1_Pos)</td></tr>
    367. 

  367. <tr class="separator:ac24600be47e725ab1ad4193fd84daf80"><td class="memSeparator" colspan="2">&#160;</td></tr>
    368. 

  368. <tr class="memitem:a326e135c57b38c78ae88cea121722a30"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a326e135c57b38c78ae88cea121722a30">ARM_NAND_CODE_ADDR_ROW2_Pos</a>&#160;&#160;&#160;8</td></tr>
    369. 

  369. <tr class="separator:a326e135c57b38c78ae88cea121722a30"><td class="memSeparator" colspan="2">&#160;</td></tr>
    370. 

  370. <tr class="memitem:ae17a3f9b9fd70a88f9f9f38dd2c17951"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#ae17a3f9b9fd70a88f9f9f38dd2c17951">ARM_NAND_CODE_ADDR_ROW2_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW2_Pos)</td></tr>
    371. 

  371. <tr class="separator:ae17a3f9b9fd70a88f9f9f38dd2c17951"><td class="memSeparator" colspan="2">&#160;</td></tr>
    372. 

  372. <tr class="memitem:a6873f7aedfe81efa8ca21dc85cbb384c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#a6873f7aedfe81efa8ca21dc85cbb384c">ARM_NAND_CODE_ADDR_ROW3_Pos</a>&#160;&#160;&#160;16</td></tr>
    373. 

  373. <tr class="separator:a6873f7aedfe81efa8ca21dc85cbb384c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    374. 

  374. <tr class="memitem:acf1ecacc2b225877c9cfe4f15dafc03c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__NAND_8h.html#acf1ecacc2b225877c9cfe4f15dafc03c">ARM_NAND_CODE_ADDR_ROW3_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW3_Pos)</td></tr>
    375. 

  375. <tr class="separator:acf1ecacc2b225877c9cfe4f15dafc03c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    376. 

  376. <tr class="memitem:gafebec6ac091750a47b1d59bc843c15b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__execution__status.html#gafebec6ac091750a47b1d59bc843c15b0">ARM_NAND_ERROR_ECC</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 1)</td></tr>
    377. 

  377. <tr class="memdesc:gafebec6ac091750a47b1d59bc843c15b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">ECC generation/correction failed.  <a href="group__nand__execution__status.html#gafebec6ac091750a47b1d59bc843c15b0">More...</a><br/></td></tr>
    378. 

  378. <tr class="separator:gafebec6ac091750a47b1d59bc843c15b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    379. 

  379. <tr class="memitem:gae0be7e1b41188def905de0a1568d442d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">ARM_NAND_EVENT_DEVICE_READY</a>&#160;&#160;&#160;(1UL &lt;&lt; 0)</td></tr>
    380. 

  380. <tr class="memdesc:gae0be7e1b41188def905de0a1568d442d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Ready: R/Bn rising edge.  <a href="group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d">More...</a><br/></td></tr>
    381. 

  381. <tr class="separator:gae0be7e1b41188def905de0a1568d442d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    382. 

  382. <tr class="memitem:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">ARM_NAND_EVENT_DRIVER_READY</a>&#160;&#160;&#160;(1UL &lt;&lt; 1)</td></tr>
    383. 

  383. <tr class="memdesc:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver Ready.  <a href="group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9">More...</a><br/></td></tr>
    384. 

  384. <tr class="separator:ga7b390a906db42c5ea4db38e0e85bb9e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
    385. 

  385. <tr class="memitem:gac774a334871789d24107b843d1ebd00c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">ARM_NAND_EVENT_DRIVER_DONE</a>&#160;&#160;&#160;(1UL &lt;&lt; 2)</td></tr>
    386. 

  386. <tr class="memdesc:gac774a334871789d24107b843d1ebd00c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver operation done.  <a href="group__NAND__events.html#gac774a334871789d24107b843d1ebd00c">More...</a><br/></td></tr>
    387. 

  387. <tr class="separator:gac774a334871789d24107b843d1ebd00c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    388. 

  388. <tr class="memitem:ga7bee0c32528ab991c0c064f895f80664"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NAND__events.html#ga7bee0c32528ab991c0c064f895f80664">ARM_NAND_EVENT_ECC_ERROR</a>&#160;&#160;&#160;(1UL &lt;&lt; 3)</td></tr>
    389. 

  389. <tr class="memdesc:ga7bee0c32528ab991c0c064f895f80664"><td class="mdescLeft">&#160;</td><td class="mdescRight">ECC could not correct data.  <a href="group__NAND__events.html#ga7bee0c32528ab991c0c064f895f80664">More...</a><br/></td></tr>
    390. 

  390. <tr class="separator:ga7bee0c32528ab991c0c064f895f80664"><td class="memSeparator" colspan="2">&#160;</td></tr>
    391. 

  391. </table><table class="memberdecls">
    392. 

  392. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
    393. 

  393. Typedefs</h2></td></tr>
    394. 

  394. <tr class="memitem:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nand__interface__gr.html#ga09f4cf2f2df0bb690bce38b13d77e50f">ARM_NAND_SignalEvent_t</a> )(uint32_t dev_num, uint32_t event)</td></tr>
    395. 

  395. <tr class="memdesc:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to <a class="el" href="group__nand__interface__gr.html#gaf4ce80b0fd6717de7ddfb1cfaf7dd754">ARM_NAND_SignalEvent</a> : Signal NAND Event.  <a href="group__nand__interface__gr.html#ga09f4cf2f2df0bb690bce38b13d77e50f">More...</a><br/></td></tr>
    396. 

  396. <tr class="separator:ga09f4cf2f2df0bb690bce38b13d77e50f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    397. 

  397. </table>
    398. 

  398. <h2 class="groupheader">Macro Definition Documentation</h2>
    399. 

  399. <a class="anchor" id="a121ff96c31275cef4bb7e86007665e1c"></a>
    400. 

  400. <div class="memitem">
    401. 

  401. <div class="memproto">
    402. 

  402.       <table class="memname">
    403. 

  403.         <tr>
    404. 

  404.           <td class="memname">#define ARM_NAND_API_VERSION&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4)  /* API version */</td>
    405. 

  405.         </tr>
    406. 

  406.       </table>
    407. 

  407. </div><div class="memdoc">
    408. 

  408. 

  409. </div>
    410. 

  410. </div>
    411. 

  411. <a class="anchor" id="a72c7c93880689c3ce6d799afe6a8dd87"></a>
    412. 

  412. <div class="memitem">
    413. 

  413. <div class="memproto">
    414. 

  414.       <table class="memname">
    415. 

  415.         <tr>
    416. 

  416.           <td class="memname">#define _ARM_Driver_NAND_</td>
    417. 

  417.           <td>(</td>
    418. 

  418.           <td class="paramtype">&#160;</td>
    419. 

  419.           <td class="paramname">n</td><td>)</td>
    420. 

  420.           <td>&#160;&#160;&#160;Driver_NAND##n</td>
    421. 

  421.         </tr>
    422. 

  422.       </table>
    423. 

  423. </div><div class="memdoc">
    424. 

  424. 

  425. </div>
    426. 

  426. </div>
    427. 

  427. <a class="anchor" id="aa0dd88065962a6e23fd82eb86fec27a7"></a>
    428. 

  428. <div class="memitem">
    429. 

  429. <div class="memproto">
    430. 

  430.       <table class="memname">
    431. 

  431.         <tr>
    432. 

  432.           <td class="memname">#define ARM_Driver_NAND_</td>
    433. 

  433.           <td>(</td>
    434. 

  434.           <td class="paramtype">&#160;</td>
    435. 

  435.           <td class="paramname">n</td><td>)</td>
    436. 

  436.           <td>&#160;&#160;&#160;<a class="el" href="Driver__NAND_8h.html#a72c7c93880689c3ce6d799afe6a8dd87">_ARM_Driver_NAND_</a>(n)</td>
    437. 

  437.         </tr>
    438. 

  438.       </table>
    439. 

  439. </div><div class="memdoc">
    440. 

  440. 

  441. </div>
    442. 

  442. </div>
    443. 

  443. <a class="anchor" id="a848a27ec9ebf0a13a82a1d9760f39d90"></a>
    444. 

  444. <div class="memitem">
    445. 

  445. <div class="memproto">
    446. 

  446.       <table class="memname">
    447. 

  447.         <tr>
    448. 

  448.           <td class="memname">#define ARM_NAND_POWER_VCC_Pos&#160;&#160;&#160;0</td>
    449. 

  449.         </tr>
    450. 

  450.       </table>
    451. 

  451. </div><div class="memdoc">
    452. 

  452. 

  453. </div>
    454. 

  454. </div>
    455. 

  455. <a class="anchor" id="ad898ef5cd4ffe3b6b09d69e224aa0912"></a>
    456. 

  456. <div class="memitem">
    457. 

  457. <div class="memproto">
    458. 

  458.       <table class="memname">
    459. 

  459.         <tr>
    460. 

  460.           <td class="memname">#define ARM_NAND_POWER_VCC_Msk&#160;&#160;&#160;(0x07UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td>
    461. 

  461.         </tr>
    462. 

  462.       </table>
    463. 

  463. </div><div class="memdoc">
    464. 

  464. 

  465. </div>
    466. 

  466. </div>
    467. 

  467. <a class="anchor" id="a323c320a6195b78c2c79f5c6e85f02e1"></a>
    468. 

  468. <div class="memitem">
    469. 

  469. <div class="memproto">
    470. 

  470.       <table class="memname">
    471. 

  471.         <tr>
    472. 

  472.           <td class="memname">#define ARM_NAND_POWER_VCC_OFF&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td>
    473. 

  473.         </tr>
    474. 

  474.       </table>
    475. 

  475. </div><div class="memdoc">
    476. 

  476. 

  477. <p>VCC Power off. </p>
    478. 

  478. 

  479. </div>
    480. 

  480. </div>
    481. 

  481. <a class="anchor" id="ad15355d67bc239ff49cceac69c2024b3"></a>
    482. 

  482. <div class="memitem">
    483. 

  483. <div class="memproto">
    484. 

  484.       <table class="memname">
    485. 

  485.         <tr>
    486. 

  486.           <td class="memname">#define ARM_NAND_POWER_VCC_3V3&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td>
    487. 

  487.         </tr>
    488. 

  488.       </table>
    489. 

  489. </div><div class="memdoc">
    490. 

  490. 

  491. <p>VCC = 3.3V. </p>
    492. 

  492. 

  493. </div>
    494. 

  494. </div>
    495. 

  495. <a class="anchor" id="aa7b9d5a71125b745caba5c1d7aff6385"></a>
    496. 

  496. <div class="memitem">
    497. 

  497. <div class="memproto">
    498. 

  498.       <table class="memname">
    499. 

  499.         <tr>
    500. 

  500.           <td class="memname">#define ARM_NAND_POWER_VCC_1V8&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_POWER_VCC_Pos)</td>
    501. 

  501.         </tr>
    502. 

  502.       </table>
    503. 

  503. </div><div class="memdoc">
    504. 

  504. 

  505. <p>VCC = 1.8V. </p>
    506. 

  506. 

  507. </div>
    508. 

  508. </div>
    509. 

  509. <a class="anchor" id="ac38023b94cd8a68295d48a1019a386e0"></a>
    510. 

  510. <div class="memitem">
    511. 

  511. <div class="memproto">
    512. 

  512.       <table class="memname">
    513. 

  513.         <tr>
    514. 

  514.           <td class="memname">#define ARM_NAND_POWER_VCCQ_Pos&#160;&#160;&#160;3</td>
    515. 

  515.         </tr>
    516. 

  516.       </table>
    517. 

  517. </div><div class="memdoc">
    518. 

  518. 

  519. </div>
    520. 

  520. </div>
    521. 

  521. <a class="anchor" id="a7a453227301d7c08d09b22dc8afafbe7"></a>
    522. 

  522. <div class="memitem">
    523. 

  523. <div class="memproto">
    524. 

  524.       <table class="memname">
    525. 

  525.         <tr>
    526. 

  526.           <td class="memname">#define ARM_NAND_POWER_VCCQ_Msk&#160;&#160;&#160;(0x07UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td>
    527. 

  527.         </tr>
    528. 

  528.       </table>
    529. 

  529. </div><div class="memdoc">
    530. 

  530. 

  531. </div>
    532. 

  532. </div>
    533. 

  533. <a class="anchor" id="aca7679e8269ee986559f4218816937c3"></a>
    534. 

  534. <div class="memitem">
    535. 

  535. <div class="memproto">
    536. 

  536.       <table class="memname">
    537. 

  537.         <tr>
    538. 

  538.           <td class="memname">#define ARM_NAND_POWER_VCCQ_OFF&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td>
    539. 

  539.         </tr>
    540. 

  540.       </table>
    541. 

  541. </div><div class="memdoc">
    542. 

  542. 

  543. <p>VCCQ I/O Power off. </p>
    544. 

  544. 

  545. </div>
    546. 

  546. </div>
    547. 

  547. <a class="anchor" id="a6d5a8a33a0fdaaff2e57e1ac53c984c2"></a>
    548. 

  548. <div class="memitem">
    549. 

  549. <div class="memproto">
    550. 

  550.       <table class="memname">
    551. 

  551.         <tr>
    552. 

  552.           <td class="memname">#define ARM_NAND_POWER_VCCQ_3V3&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td>
    553. 

  553.         </tr>
    554. 

  554.       </table>
    555. 

  555. </div><div class="memdoc">
    556. 

  556. 

  557. <p>VCCQ = 3.3V. </p>
    558. 

  558. 

  559. </div>
    560. 

  560. </div>
    561. 

  561. <a class="anchor" id="a653d9b4d7bee173beb49d8fec0469476"></a>
    562. 

  562. <div class="memitem">
    563. 

  563. <div class="memproto">
    564. 

  564.       <table class="memname">
    565. 

  565.         <tr>
    566. 

  566.           <td class="memname">#define ARM_NAND_POWER_VCCQ_1V8&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_POWER_VCCQ_Pos)</td>
    567. 

  567.         </tr>
    568. 

  568.       </table>
    569. 

  569. </div><div class="memdoc">
    570. 

  570. 

  571. <p>VCCQ = 1.8V. </p>
    572. 

  572. 

  573. </div>
    574. 

  574. </div>
    575. 

  575. <a class="anchor" id="ae2d278901881ffc73d3e0b48717b22f0"></a>
    576. 

  576. <div class="memitem">
    577. 

  577. <div class="memproto">
    578. 

  578.       <table class="memname">
    579. 

  579.         <tr>
    580. 

  580.           <td class="memname">#define ARM_NAND_POWER_VPP_OFF&#160;&#160;&#160;(1UL &lt;&lt; 6)</td>
    581. 

  581.         </tr>
    582. 

  582.       </table>
    583. 

  583. </div><div class="memdoc">
    584. 

  584. 

  585. <p>VPP off. </p>
    586. 

  586. 

  587. </div>
    588. 

  588. </div>
    589. 

  589. <a class="anchor" id="aeb0d50e30bbcd8ab59c3b78db634aad5"></a>
    590. 

  590. <div class="memitem">
    591. 

  591. <div class="memproto">
    592. 

  592.       <table class="memname">
    593. 

  593.         <tr>
    594. 

  594.           <td class="memname">#define ARM_NAND_POWER_VPP_ON&#160;&#160;&#160;(1UL &lt;&lt; 7)</td>
    595. 

  595.         </tr>
    596. 

  596.       </table>
    597. 

  597. </div><div class="memdoc">
    598. 

  598. 

  599. <p>VPP on. </p>
    600. 

  600. 

  601. </div>
    602. 

  602. </div>
    603. 

  603. <a class="anchor" id="a372fc9b9cc1315046ceaffd6fd99e12c"></a>
    604. 

  604. <div class="memitem">
    605. 

  605. <div class="memproto">
    606. 

  606.       <table class="memname">
    607. 

  607.         <tr>
    608. 

  608.           <td class="memname">#define ARM_NAND_BUS_INTERFACE_Pos&#160;&#160;&#160;4</td>
    609. 

  609.         </tr>
    610. 

  610.       </table>
    611. 

  611. </div><div class="memdoc">
    612. 

  612. 

  613. </div>
    614. 

  614. </div>
    615. 

  615. <a class="anchor" id="aea213eb1ba9c67beb6216a630d81b91f"></a>
    616. 

  616. <div class="memitem">
    617. 

  617. <div class="memproto">
    618. 

  618.       <table class="memname">
    619. 

  619.         <tr>
    620. 

  620.           <td class="memname">#define ARM_NAND_BUS_INTERFACE_Msk&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_NAND_BUS_INTERFACE_Pos)</td>
    621. 

  621.         </tr>
    622. 

  622.       </table>
    623. 

  623. </div><div class="memdoc">
    624. 

  624. 

  625. </div>
    626. 

  626. </div>
    627. 

  627. <a class="anchor" id="acc98e42d23656734c7f9a8a5421842d6"></a>
    628. 

  628. <div class="memitem">
    629. 

  629. <div class="memproto">
    630. 

  630.       <table class="memname">
    631. 

  631.         <tr>
    632. 

  632.           <td class="memname">#define ARM_NAND_BUS_TIMING_MODE_Pos&#160;&#160;&#160;0</td>
    633. 

  633.         </tr>
    634. 

  634.       </table>
    635. 

  635. </div><div class="memdoc">
    636. 

  636. 

  637. </div>
    638. 

  638. </div>
    639. 

  639. <a class="anchor" id="a57f6c319265b00878661656103abe660"></a>
    640. 

  640. <div class="memitem">
    641. 

  641. <div class="memproto">
    642. 

  642.       <table class="memname">
    643. 

  643.         <tr>
    644. 

  644.           <td class="memname">#define ARM_NAND_BUS_TIMING_MODE_Msk&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_TIMING_MODE_Pos)</td>
    645. 

  645.         </tr>
    646. 

  646.       </table>
    647. 

  647. </div><div class="memdoc">
    648. 

  648. 

  649. </div>
    650. 

  650. </div>
    651. 

  651. <a class="anchor" id="a57b282c0818c87b79ea4f11d03cc4f3c"></a>
    652. 

  652. <div class="memitem">
    653. 

  653. <div class="memproto">
    654. 

  654.       <table class="memname">
    655. 

  655.         <tr>
    656. 

  656.           <td class="memname">#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos&#160;&#160;&#160;8</td>
    657. 

  657.         </tr>
    658. 

  658.       </table>
    659. 

  659. </div><div class="memdoc">
    660. 

  660. 

  661. </div>
    662. 

  662. </div>
    663. 

  663. <a class="anchor" id="ad30dfdbdc50a7ff72a5bb173c5f549dc"></a>
    664. 

  664. <div class="memitem">
    665. 

  665. <div class="memproto">
    666. 

  666.       <table class="memname">
    667. 

  667.         <tr>
    668. 

  668.           <td class="memname">#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_DDR2_DO_WCYC_Pos)</td>
    669. 

  669.         </tr>
    670. 

  670.       </table>
    671. 

  671. </div><div class="memdoc">
    672. 

  672. 

  673. </div>
    674. 

  674. </div>
    675. 

  675. <a class="anchor" id="aa80b898cdf665aa14ff0e181e4ff31f1"></a>
    676. 

  676. <div class="memitem">
    677. 

  677. <div class="memproto">
    678. 

  678.       <table class="memname">
    679. 

  679.         <tr>
    680. 

  680.           <td class="memname">#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos&#160;&#160;&#160;12</td>
    681. 

  681.         </tr>
    682. 

  682.       </table>
    683. 

  683. </div><div class="memdoc">
    684. 

  684. 

  685. </div>
    686. 

  686. </div>
    687. 

  687. <a class="anchor" id="ad9ab38101de68a1bc186f5687f63f7c3"></a>
    688. 

  688. <div class="memitem">
    689. 

  689. <div class="memproto">
    690. 

  690.       <table class="memname">
    691. 

  691.         <tr>
    692. 

  692.           <td class="memname">#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk&#160;&#160;&#160;(0x0FUL &lt;&lt; ARM_NAND_BUS_DDR2_DI_WCYC_Pos)</td>
    693. 

  693.         </tr>
    694. 

  694.       </table>
    695. 

  695. </div><div class="memdoc">
    696. 

  696. 

  697. </div>
    698. 

  698. </div>
    699. 

  699. <a class="anchor" id="a7944be4f63c439d5d64053ad9476407b"></a>
    700. 

  700. <div class="memitem">
    701. 

  701. <div class="memproto">
    702. 

  702.       <table class="memname">
    703. 

  703.         <tr>
    704. 

  704.           <td class="memname">#define ARM_NAND_ECC_INDEX_Pos&#160;&#160;&#160;0</td>
    705. 

  705.         </tr>
    706. 

  706.       </table>
    707. 

  707. </div><div class="memdoc">
    708. 

  708. 

  709. </div>
    710. 

  710. </div>
    711. 

  711. <a class="anchor" id="a656537439264ab495c86e4c36051a3c1"></a>
    712. 

  712. <div class="memitem">
    713. 

  713. <div class="memproto">
    714. 

  714.       <table class="memname">
    715. 

  715.         <tr>
    716. 

  716.           <td class="memname">#define ARM_NAND_ECC_INDEX_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_ECC_INDEX_Pos)</td>
    717. 

  717.         </tr>
    718. 

  718.       </table>
    719. 

  719. </div><div class="memdoc">
    720. 

  720. 

  721. </div>
    722. 

  722. </div>
    723. 

  723. <a class="anchor" id="ae34722cf52938f50bf117780a742b6f1"></a>
    724. 

  724. <div class="memitem">
    725. 

  725. <div class="memproto">
    726. 

  726.       <table class="memname">
    727. 

  727.         <tr>
    728. 

  728.           <td class="memname">#define ARM_NAND_CODE_CMD1_Pos&#160;&#160;&#160;0</td>
    729. 

  729.         </tr>
    730. 

  730.       </table>
    731. 

  731. </div><div class="memdoc">
    732. 

  732. 

  733. </div>
    734. 

  734. </div>
    735. 

  735. <a class="anchor" id="ac65db62329bb943592afdb523e4aadca"></a>
    736. 

  736. <div class="memitem">
    737. 

  737. <div class="memproto">
    738. 

  738.       <table class="memname">
    739. 

  739.         <tr>
    740. 

  740.           <td class="memname">#define ARM_NAND_CODE_CMD1_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD1_Pos)</td>
    741. 

  741.         </tr>
    742. 

  742.       </table>
    743. 

  743. </div><div class="memdoc">
    744. 

  744. 

  745. </div>
    746. 

  746. </div>
    747. 

  747. <a class="anchor" id="aeebe274650e7d0c02b478318759972e5"></a>
    748. 

  748. <div class="memitem">
    749. 

  749. <div class="memproto">
    750. 

  750.       <table class="memname">
    751. 

  751.         <tr>
    752. 

  752.           <td class="memname">#define ARM_NAND_CODE_CMD2_Pos&#160;&#160;&#160;8</td>
    753. 

  753.         </tr>
    754. 

  754.       </table>
    755. 

  755. </div><div class="memdoc">
    756. 

  756. 

  757. </div>
    758. 

  758. </div>
    759. 

  759. <a class="anchor" id="a0f963016c81be2ddf7a09d983de226a9"></a>
    760. 

  760. <div class="memitem">
    761. 

  761. <div class="memproto">
    762. 

  762.       <table class="memname">
    763. 

  763.         <tr>
    764. 

  764.           <td class="memname">#define ARM_NAND_CODE_CMD2_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD2_Pos)</td>
    765. 

  765.         </tr>
    766. 

  766.       </table>
    767. 

  767. </div><div class="memdoc">
    768. 

  768. 

  769. </div>
    770. 

  770. </div>
    771. 

  771. <a class="anchor" id="aa0b87b819cf3c94f32e3ef18dcfd1c6c"></a>
    772. 

  772. <div class="memitem">
    773. 

  773. <div class="memproto">
    774. 

  774.       <table class="memname">
    775. 

  775.         <tr>
    776. 

  776.           <td class="memname">#define ARM_NAND_CODE_CMD3_Pos&#160;&#160;&#160;16</td>
    777. 

  777.         </tr>
    778. 

  778.       </table>
    779. 

  779. </div><div class="memdoc">
    780. 

  780. 

  781. </div>
    782. 

  782. </div>
    783. 

  783. <a class="anchor" id="a16d474e55d0f6ea6efc3cc5436493b22"></a>
    784. 

  784. <div class="memitem">
    785. 

  785. <div class="memproto">
    786. 

  786.       <table class="memname">
    787. 

  787.         <tr>
    788. 

  788.           <td class="memname">#define ARM_NAND_CODE_CMD3_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_CMD3_Pos)</td>
    789. 

  789.         </tr>
    790. 

  790.       </table>
    791. 

  791. </div><div class="memdoc">
    792. 

  792. 

  793. </div>
    794. 

  794. </div>
    795. 

  795. <a class="anchor" id="ab8b06772e2b6c5930319b17bbb806133"></a>
    796. 

  796. <div class="memitem">
    797. 

  797. <div class="memproto">
    798. 

  798.       <table class="memname">
    799. 

  799.         <tr>
    800. 

  800.           <td class="memname">#define ARM_NAND_CODE_ADDR_COL1_Pos&#160;&#160;&#160;0</td>
    801. 

  801.         </tr>
    802. 

  802.       </table>
    803. 

  803. </div><div class="memdoc">
    804. 

  804. 

  805. </div>
    806. 

  806. </div>
    807. 

  807. <a class="anchor" id="a0951de69f3836c1ab229ec60b3996fcc"></a>
    808. 

  808. <div class="memitem">
    809. 

  809. <div class="memproto">
    810. 

  810.       <table class="memname">
    811. 

  811.         <tr>
    812. 

  812.           <td class="memname">#define ARM_NAND_CODE_ADDR_COL1_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_COL1_Pos)</td>
    813. 

  813.         </tr>
    814. 

  814.       </table>
    815. 

  815. </div><div class="memdoc">
    816. 

  816. 

  817. </div>
    818. 

  818. </div>
    819. 

  819. <a class="anchor" id="a1c4b9e7f44f77ebf665af8860a3c7528"></a>
    820. 

  820. <div class="memitem">
    821. 

  821. <div class="memproto">
    822. 

  822.       <table class="memname">
    823. 

  823.         <tr>
    824. 

  824.           <td class="memname">#define ARM_NAND_CODE_ADDR_COL2_Pos&#160;&#160;&#160;8</td>
    825. 

  825.         </tr>
    826. 

  826.       </table>
    827. 

  827. </div><div class="memdoc">
    828. 

  828. 

  829. </div>
    830. 

  830. </div>
    831. 

  831. <a class="anchor" id="a6126261e7c53713cee04aeae839d330e"></a>
    832. 

  832. <div class="memitem">
    833. 

  833. <div class="memproto">
    834. 

  834.       <table class="memname">
    835. 

  835.         <tr>
    836. 

  836.           <td class="memname">#define ARM_NAND_CODE_ADDR_COL2_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_COL2_Pos)</td>
    837. 

  837.         </tr>
    838. 

  838.       </table>
    839. 

  839. </div><div class="memdoc">
    840. 

  840. 

  841. </div>
    842. 

  842. </div>
    843. 

  843. <a class="anchor" id="a8b75efa00810fcf23fb0f12e7f62d338"></a>
    844. 

  844. <div class="memitem">
    845. 

  845. <div class="memproto">
    846. 

  846.       <table class="memname">
    847. 

  847.         <tr>
    848. 

  848.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW1_Pos&#160;&#160;&#160;0</td>
    849. 

  849.         </tr>
    850. 

  850.       </table>
    851. 

  851. </div><div class="memdoc">
    852. 

  852. 

  853. </div>
    854. 

  854. </div>
    855. 

  855. <a class="anchor" id="ac24600be47e725ab1ad4193fd84daf80"></a>
    856. 

  856. <div class="memitem">
    857. 

  857. <div class="memproto">
    858. 

  858.       <table class="memname">
    859. 

  859.         <tr>
    860. 

  860.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW1_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW1_Pos)</td>
    861. 

  861.         </tr>
    862. 

  862.       </table>
    863. 

  863. </div><div class="memdoc">
    864. 

  864. 

  865. </div>
    866. 

  866. </div>
    867. 

  867. <a class="anchor" id="a326e135c57b38c78ae88cea121722a30"></a>
    868. 

  868. <div class="memitem">
    869. 

  869. <div class="memproto">
    870. 

  870.       <table class="memname">
    871. 

  871.         <tr>
    872. 

  872.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW2_Pos&#160;&#160;&#160;8</td>
    873. 

  873.         </tr>
    874. 

  874.       </table>
    875. 

  875. </div><div class="memdoc">
    876. 

  876. 

  877. </div>
    878. 

  878. </div>
    879. 

  879. <a class="anchor" id="ae17a3f9b9fd70a88f9f9f38dd2c17951"></a>
    880. 

  880. <div class="memitem">
    881. 

  881. <div class="memproto">
    882. 

  882.       <table class="memname">
    883. 

  883.         <tr>
    884. 

  884.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW2_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW2_Pos)</td>
    885. 

  885.         </tr>
    886. 

  886.       </table>
    887. 

  887. </div><div class="memdoc">
    888. 

  888. 

  889. </div>
    890. 

  890. </div>
    891. 

  891. <a class="anchor" id="a6873f7aedfe81efa8ca21dc85cbb384c"></a>
    892. 

  892. <div class="memitem">
    893. 

  893. <div class="memproto">
    894. 

  894.       <table class="memname">
    895. 

  895.         <tr>
    896. 

  896.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW3_Pos&#160;&#160;&#160;16</td>
    897. 

  897.         </tr>
    898. 

  898.       </table>
    899. 

  899. </div><div class="memdoc">
    900. 

  900. 

  901. </div>
    902. 

  902. </div>
    903. 

  903. <a class="anchor" id="acf1ecacc2b225877c9cfe4f15dafc03c"></a>
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  904. <div class="memitem">
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  905. <div class="memproto">
    906. 

  906.       <table class="memname">
    907. 

  907.         <tr>
    908. 

  908.           <td class="memname">#define ARM_NAND_CODE_ADDR_ROW3_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_NAND_CODE_ADDR_ROW3_Pos)</td>
    909. 

  909.         </tr>
    910. 

  910.       </table>
    911. 

  911. </div><div class="memdoc">
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