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Driver__USART_8h.html

Driver__USART_8h.html 66 KB
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  121. Data Structures</h2></td></tr>
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  122. <tr class="memitem:structARM__USART__STATUS"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__interface__gr.html#structARM__USART__STATUS">ARM_USART_STATUS</a></td></tr>
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  123. <tr class="memdesc:structARM__USART__STATUS"><td class="mdescLeft">&#160;</td><td class="mdescRight">USART Status.  <a href="group__usart__interface__gr.html#structARM__USART__STATUS">More...</a><br/></td></tr>
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  124. <tr class="separator:structARM__USART__STATUS"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  125. <tr class="memitem:structARM__USART__MODEM__STATUS"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__interface__gr.html#structARM__USART__MODEM__STATUS">ARM_USART_MODEM_STATUS</a></td></tr>
    126. 

  126. <tr class="memdesc:structARM__USART__MODEM__STATUS"><td class="mdescLeft">&#160;</td><td class="mdescRight">USART Modem Status.  <a href="group__usart__interface__gr.html#structARM__USART__MODEM__STATUS">More...</a><br/></td></tr>
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  127. <tr class="separator:structARM__USART__MODEM__STATUS"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  129. <tr class="memdesc:structARM__USART__CAPABILITIES"><td class="mdescLeft">&#160;</td><td class="mdescRight">USART Device Driver Capabilities.  <a href="group__usart__interface__gr.html#structARM__USART__CAPABILITIES">More...</a><br/></td></tr>
    130. 

  130. <tr class="separator:structARM__USART__CAPABILITIES"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  131. <tr class="memitem:structARM__DRIVER__USART"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__interface__gr.html#structARM__DRIVER__USART">ARM_DRIVER_USART</a></td></tr>
    132. 

  132. <tr class="memdesc:structARM__DRIVER__USART"><td class="mdescLeft">&#160;</td><td class="mdescRight">Access structure of the USART Driver.  <a href="group__usart__interface__gr.html#structARM__DRIVER__USART">More...</a><br/></td></tr>
    133. 

  133. <tr class="separator:structARM__DRIVER__USART"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  135. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
    136. 

  136. Macros</h2></td></tr>
    137. 

  137. <tr class="memitem:ab37a12fd0981e09c42ea42684a5dfbab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#ab37a12fd0981e09c42ea42684a5dfbab">ARM_USART_API_VERSION</a>&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4)  /* API version */</td></tr>
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  138. <tr class="separator:ab37a12fd0981e09c42ea42684a5dfbab"><td class="memSeparator" colspan="2">&#160;</td></tr>
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  139. <tr class="memitem:adf67ff652d2129cedaa488d2a600561e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#adf67ff652d2129cedaa488d2a600561e">_ARM_Driver_USART_</a>(n)&#160;&#160;&#160;Driver_USART##n</td></tr>
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  140. <tr class="separator:adf67ff652d2129cedaa488d2a600561e"><td class="memSeparator" colspan="2">&#160;</td></tr>
    141. 

  141. <tr class="memitem:aa083b8827ae5e70779e0b70d617da0e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#aa083b8827ae5e70779e0b70d617da0e1">ARM_Driver_USART_</a>(n)&#160;&#160;&#160;<a class="el" href="Driver__USART_8h.html#adf67ff652d2129cedaa488d2a600561e">_ARM_Driver_USART_</a>(n)</td></tr>
    142. 

  142. <tr class="separator:aa083b8827ae5e70779e0b70d617da0e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    143. 

  143. <tr class="memitem:ab654e36e71012c28b91273e96827e1b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#ab654e36e71012c28b91273e96827e1b8">ARM_USART_CONTROL_Pos</a>&#160;&#160;&#160;0</td></tr>
    144. 

  144. <tr class="separator:ab654e36e71012c28b91273e96827e1b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
    145. 

  145. <tr class="memitem:a253d29333d1a40d0401a02f9675a90fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a253d29333d1a40d0401a02f9675a90fd">ARM_USART_CONTROL_Msk</a>&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    146. 

  146. <tr class="separator:a253d29333d1a40d0401a02f9675a90fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
    147. 

  147. <tr class="memitem:gad85039731478c924d3b418ec00768388"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#gad85039731478c924d3b418ec00768388">ARM_USART_MODE_ASYNCHRONOUS</a>&#160;&#160;&#160;(0x01UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    148. 

  148. <tr class="memdesc:gad85039731478c924d3b418ec00768388"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART (Asynchronous); arg = Baudrate.  <a href="group__usart__mode__control.html#gad85039731478c924d3b418ec00768388">More...</a><br/></td></tr>
    149. 

  149. <tr class="separator:gad85039731478c924d3b418ec00768388"><td class="memSeparator" colspan="2">&#160;</td></tr>
    150. 

  150. <tr class="memitem:ga7d3e9e0e838a3f15f8661983b9ac4573"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#ga7d3e9e0e838a3f15f8661983b9ac4573">ARM_USART_MODE_SYNCHRONOUS_MASTER</a>&#160;&#160;&#160;(0x02UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    151. 

  151. <tr class="memdesc:ga7d3e9e0e838a3f15f8661983b9ac4573"><td class="mdescLeft">&#160;</td><td class="mdescRight">Synchronous Master (generates clock signal); arg = Baudrate.  <a href="group__usart__mode__control.html#ga7d3e9e0e838a3f15f8661983b9ac4573">More...</a><br/></td></tr>
    152. 

  152. <tr class="separator:ga7d3e9e0e838a3f15f8661983b9ac4573"><td class="memSeparator" colspan="2">&#160;</td></tr>
    153. 

  153. <tr class="memitem:gae78778475f3fab09a080c2279afc69fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#gae78778475f3fab09a080c2279afc69fa">ARM_USART_MODE_SYNCHRONOUS_SLAVE</a>&#160;&#160;&#160;(0x03UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    154. 

  154. <tr class="memdesc:gae78778475f3fab09a080c2279afc69fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Synchronous Slave (external clock signal)  <a href="group__usart__mode__control.html#gae78778475f3fab09a080c2279afc69fa">More...</a><br/></td></tr>
    155. 

  155. <tr class="separator:gae78778475f3fab09a080c2279afc69fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
    156. 

  156. <tr class="memitem:ga4132136971d4f93f2e6a87c6775a9bb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#ga4132136971d4f93f2e6a87c6775a9bb0">ARM_USART_MODE_SINGLE_WIRE</a>&#160;&#160;&#160;(0x04UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    157. 

  157. <tr class="memdesc:ga4132136971d4f93f2e6a87c6775a9bb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART Single-wire (half-duplex); arg = Baudrate.  <a href="group__usart__mode__control.html#ga4132136971d4f93f2e6a87c6775a9bb0">More...</a><br/></td></tr>
    158. 

  158. <tr class="separator:ga4132136971d4f93f2e6a87c6775a9bb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    159. 

  159. <tr class="memitem:ga458f4f60d1d772cfd7567ae424d9aad9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#ga458f4f60d1d772cfd7567ae424d9aad9">ARM_USART_MODE_IRDA</a>&#160;&#160;&#160;(0x05UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    160. 

  160. <tr class="memdesc:ga458f4f60d1d772cfd7567ae424d9aad9"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART IrDA; arg = Baudrate.  <a href="group__usart__mode__control.html#ga458f4f60d1d772cfd7567ae424d9aad9">More...</a><br/></td></tr>
    161. 

  161. <tr class="separator:ga458f4f60d1d772cfd7567ae424d9aad9"><td class="memSeparator" colspan="2">&#160;</td></tr>
    162. 

  162. <tr class="memitem:gade65a1c27d9097d9ef0e86c02b55cecd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__mode__control.html#gade65a1c27d9097d9ef0e86c02b55cecd">ARM_USART_MODE_SMART_CARD</a>&#160;&#160;&#160;(0x06UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    163. 

  163. <tr class="memdesc:gade65a1c27d9097d9ef0e86c02b55cecd"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART Smart Card; arg = Baudrate.  <a href="group__usart__mode__control.html#gade65a1c27d9097d9ef0e86c02b55cecd">More...</a><br/></td></tr>
    164. 

  164. <tr class="separator:gade65a1c27d9097d9ef0e86c02b55cecd"><td class="memSeparator" colspan="2">&#160;</td></tr>
    165. 

  165. <tr class="memitem:a08696262ebd491edf1e7865ebe93a81f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a08696262ebd491edf1e7865ebe93a81f">ARM_USART_DATA_BITS_Pos</a>&#160;&#160;&#160;8</td></tr>
    166. 

  166. <tr class="separator:a08696262ebd491edf1e7865ebe93a81f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    167. 

  167. <tr class="memitem:a84581b0925c149db3ca28d2656107656"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a84581b0925c149db3ca28d2656107656">ARM_USART_DATA_BITS_Msk</a>&#160;&#160;&#160;(7UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    168. 

  168. <tr class="separator:a84581b0925c149db3ca28d2656107656"><td class="memSeparator" colspan="2">&#160;</td></tr>
    169. 

  169. <tr class="memitem:ga981ff25b4ff806f743d1af4575b87339"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__data__bits.html#ga981ff25b4ff806f743d1af4575b87339">ARM_USART_DATA_BITS_5</a>&#160;&#160;&#160;(5UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    170. 

  170. <tr class="memdesc:ga981ff25b4ff806f743d1af4575b87339"><td class="mdescLeft">&#160;</td><td class="mdescRight">5 Data bits  <a href="group__usart__data__bits.html#ga981ff25b4ff806f743d1af4575b87339">More...</a><br/></td></tr>
    171. 

  171. <tr class="separator:ga981ff25b4ff806f743d1af4575b87339"><td class="memSeparator" colspan="2">&#160;</td></tr>
    172. 

  172. <tr class="memitem:ga92ba3d6cea5cd5c0b661667539a9e43c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__data__bits.html#ga92ba3d6cea5cd5c0b661667539a9e43c">ARM_USART_DATA_BITS_6</a>&#160;&#160;&#160;(6UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    173. 

  173. <tr class="memdesc:ga92ba3d6cea5cd5c0b661667539a9e43c"><td class="mdescLeft">&#160;</td><td class="mdescRight">6 Data bit  <a href="group__usart__data__bits.html#ga92ba3d6cea5cd5c0b661667539a9e43c">More...</a><br/></td></tr>
    174. 

  174. <tr class="separator:ga92ba3d6cea5cd5c0b661667539a9e43c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    175. 

  175. <tr class="memitem:gad86a2d971ce521c6f6eda28d4f8786a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__data__bits.html#gad86a2d971ce521c6f6eda28d4f8786a4">ARM_USART_DATA_BITS_7</a>&#160;&#160;&#160;(7UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    176. 

  176. <tr class="memdesc:gad86a2d971ce521c6f6eda28d4f8786a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">7 Data bits  <a href="group__usart__data__bits.html#gad86a2d971ce521c6f6eda28d4f8786a4">More...</a><br/></td></tr>
    177. 

  177. <tr class="separator:gad86a2d971ce521c6f6eda28d4f8786a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    178. 

  178. <tr class="memitem:gadc5e8d17b5c69cd7f9135b849c2a4586"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__data__bits.html#gadc5e8d17b5c69cd7f9135b849c2a4586">ARM_USART_DATA_BITS_8</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    179. 

  179. <tr class="memdesc:gadc5e8d17b5c69cd7f9135b849c2a4586"><td class="mdescLeft">&#160;</td><td class="mdescRight">8 Data bits (default)  <a href="group__usart__data__bits.html#gadc5e8d17b5c69cd7f9135b849c2a4586">More...</a><br/></td></tr>
    180. 

  180. <tr class="separator:gadc5e8d17b5c69cd7f9135b849c2a4586"><td class="memSeparator" colspan="2">&#160;</td></tr>
    181. 

  181. <tr class="memitem:gae238a08198dc7ac6178ae0a2a95a2764"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__data__bits.html#gae238a08198dc7ac6178ae0a2a95a2764">ARM_USART_DATA_BITS_9</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td></tr>
    182. 

  182. <tr class="memdesc:gae238a08198dc7ac6178ae0a2a95a2764"><td class="mdescLeft">&#160;</td><td class="mdescRight">9 Data bits  <a href="group__usart__data__bits.html#gae238a08198dc7ac6178ae0a2a95a2764">More...</a><br/></td></tr>
    183. 

  183. <tr class="separator:gae238a08198dc7ac6178ae0a2a95a2764"><td class="memSeparator" colspan="2">&#160;</td></tr>
    184. 

  184. <tr class="memitem:a2ce50af2e58db12c25a5791080aca258"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a2ce50af2e58db12c25a5791080aca258">ARM_USART_PARITY_Pos</a>&#160;&#160;&#160;12</td></tr>
    185. 

  185. <tr class="separator:a2ce50af2e58db12c25a5791080aca258"><td class="memSeparator" colspan="2">&#160;</td></tr>
    186. 

  186. <tr class="memitem:a434c48980c65129c01aa5bc1c8e22898"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a434c48980c65129c01aa5bc1c8e22898">ARM_USART_PARITY_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_PARITY_Pos)</td></tr>
    187. 

  187. <tr class="separator:a434c48980c65129c01aa5bc1c8e22898"><td class="memSeparator" colspan="2">&#160;</td></tr>
    188. 

  188. <tr class="memitem:ga141a64650f99a1f642c3b3b6ced0eb8d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__parity__bit.html#ga141a64650f99a1f642c3b3b6ced0eb8d">ARM_USART_PARITY_NONE</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_PARITY_Pos)</td></tr>
    189. 

  189. <tr class="memdesc:ga141a64650f99a1f642c3b3b6ced0eb8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">No Parity (default)  <a href="group__usart__parity__bit.html#ga141a64650f99a1f642c3b3b6ced0eb8d">More...</a><br/></td></tr>
    190. 

  190. <tr class="separator:ga141a64650f99a1f642c3b3b6ced0eb8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    191. 

  191. <tr class="memitem:gabc35e8dd2cbebb730abf36959e87a207"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__parity__bit.html#gabc35e8dd2cbebb730abf36959e87a207">ARM_USART_PARITY_EVEN</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_PARITY_Pos)</td></tr>
    192. 

  192. <tr class="memdesc:gabc35e8dd2cbebb730abf36959e87a207"><td class="mdescLeft">&#160;</td><td class="mdescRight">Even Parity.  <a href="group__usart__parity__bit.html#gabc35e8dd2cbebb730abf36959e87a207">More...</a><br/></td></tr>
    193. 

  193. <tr class="separator:gabc35e8dd2cbebb730abf36959e87a207"><td class="memSeparator" colspan="2">&#160;</td></tr>
    194. 

  194. <tr class="memitem:ga02f30181eedd3b04d650dd507bf40d6d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__parity__bit.html#ga02f30181eedd3b04d650dd507bf40d6d">ARM_USART_PARITY_ODD</a>&#160;&#160;&#160;(2UL &lt;&lt; ARM_USART_PARITY_Pos)</td></tr>
    195. 

  195. <tr class="memdesc:ga02f30181eedd3b04d650dd507bf40d6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Odd Parity.  <a href="group__usart__parity__bit.html#ga02f30181eedd3b04d650dd507bf40d6d">More...</a><br/></td></tr>
    196. 

  196. <tr class="separator:ga02f30181eedd3b04d650dd507bf40d6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    197. 

  197. <tr class="memitem:ac73d045a0058006dbdc64a6d43772217"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#ac73d045a0058006dbdc64a6d43772217">ARM_USART_STOP_BITS_Pos</a>&#160;&#160;&#160;14</td></tr>
    198. 

  198. <tr class="separator:ac73d045a0058006dbdc64a6d43772217"><td class="memSeparator" colspan="2">&#160;</td></tr>
    199. 

  199. <tr class="memitem:aff72dd7b794cf2be5b5edca180be7a40"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#aff72dd7b794cf2be5b5edca180be7a40">ARM_USART_STOP_BITS_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td></tr>
    200. 

  200. <tr class="separator:aff72dd7b794cf2be5b5edca180be7a40"><td class="memSeparator" colspan="2">&#160;</td></tr>
    201. 

  201. <tr class="memitem:ga45f51a51e654b4753a538ed33f0d7d78"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__stop__bits.html#ga45f51a51e654b4753a538ed33f0d7d78">ARM_USART_STOP_BITS_1</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td></tr>
    202. 

  202. <tr class="memdesc:ga45f51a51e654b4753a538ed33f0d7d78"><td class="mdescLeft">&#160;</td><td class="mdescRight">1 Stop bit (default)  <a href="group__usart__stop__bits.html#ga45f51a51e654b4753a538ed33f0d7d78">More...</a><br/></td></tr>
    203. 

  203. <tr class="separator:ga45f51a51e654b4753a538ed33f0d7d78"><td class="memSeparator" colspan="2">&#160;</td></tr>
    204. 

  204. <tr class="memitem:ga17f034b5f0d0328dc636b403d1954795"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__stop__bits.html#ga17f034b5f0d0328dc636b403d1954795">ARM_USART_STOP_BITS_2</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td></tr>
    205. 

  205. <tr class="memdesc:ga17f034b5f0d0328dc636b403d1954795"><td class="mdescLeft">&#160;</td><td class="mdescRight">2 Stop bits  <a href="group__usart__stop__bits.html#ga17f034b5f0d0328dc636b403d1954795">More...</a><br/></td></tr>
    206. 

  206. <tr class="separator:ga17f034b5f0d0328dc636b403d1954795"><td class="memSeparator" colspan="2">&#160;</td></tr>
    207. 

  207. <tr class="memitem:gafc1d0f2c95a76ef4c5152792a619f136"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__stop__bits.html#gafc1d0f2c95a76ef4c5152792a619f136">ARM_USART_STOP_BITS_1_5</a>&#160;&#160;&#160;(2UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td></tr>
    208. 

  208. <tr class="memdesc:gafc1d0f2c95a76ef4c5152792a619f136"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.5 Stop bits  <a href="group__usart__stop__bits.html#gafc1d0f2c95a76ef4c5152792a619f136">More...</a><br/></td></tr>
    209. 

  209. <tr class="separator:gafc1d0f2c95a76ef4c5152792a619f136"><td class="memSeparator" colspan="2">&#160;</td></tr>
    210. 

  210. <tr class="memitem:ga47f43cb83d9955a4c90d918acaaa44ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__stop__bits.html#ga47f43cb83d9955a4c90d918acaaa44ba">ARM_USART_STOP_BITS_0_5</a>&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td></tr>
    211. 

  211. <tr class="memdesc:ga47f43cb83d9955a4c90d918acaaa44ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">0.5 Stop bits  <a href="group__usart__stop__bits.html#ga47f43cb83d9955a4c90d918acaaa44ba">More...</a><br/></td></tr>
    212. 

  212. <tr class="separator:ga47f43cb83d9955a4c90d918acaaa44ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
    213. 

  213. <tr class="memitem:a2e09a6b54db30327511241fdf422c4c9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a2e09a6b54db30327511241fdf422c4c9">ARM_USART_FLOW_CONTROL_Pos</a>&#160;&#160;&#160;16</td></tr>
    214. 

  214. <tr class="separator:a2e09a6b54db30327511241fdf422c4c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
    215. 

  215. <tr class="memitem:a0e80cb6a6f47c164fb1fe5fe8eab43f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a0e80cb6a6f47c164fb1fe5fe8eab43f4">ARM_USART_FLOW_CONTROL_Msk</a>&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td></tr>
    216. 

  216. <tr class="separator:a0e80cb6a6f47c164fb1fe5fe8eab43f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    217. 

  217. <tr class="memitem:gad04aa3fe4ea4b7363aee4bdca2ed3764"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__flow__control.html#gad04aa3fe4ea4b7363aee4bdca2ed3764">ARM_USART_FLOW_CONTROL_NONE</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td></tr>
    218. 

  218. <tr class="memdesc:gad04aa3fe4ea4b7363aee4bdca2ed3764"><td class="mdescLeft">&#160;</td><td class="mdescRight">No Flow Control (default)  <a href="group__usart__flow__control.html#gad04aa3fe4ea4b7363aee4bdca2ed3764">More...</a><br/></td></tr>
    219. 

  219. <tr class="separator:gad04aa3fe4ea4b7363aee4bdca2ed3764"><td class="memSeparator" colspan="2">&#160;</td></tr>
    220. 

  220. <tr class="memitem:ga80c8a78e8868165cfcc543105bfd9621"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__flow__control.html#ga80c8a78e8868165cfcc543105bfd9621">ARM_USART_FLOW_CONTROL_RTS</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td></tr>
    221. 

  221. <tr class="memdesc:ga80c8a78e8868165cfcc543105bfd9621"><td class="mdescLeft">&#160;</td><td class="mdescRight">RTS Flow Control.  <a href="group__usart__flow__control.html#ga80c8a78e8868165cfcc543105bfd9621">More...</a><br/></td></tr>
    222. 

  222. <tr class="separator:ga80c8a78e8868165cfcc543105bfd9621"><td class="memSeparator" colspan="2">&#160;</td></tr>
    223. 

  223. <tr class="memitem:gaa7b38ebff1ce0f5c3e4479d22e66715f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__flow__control.html#gaa7b38ebff1ce0f5c3e4479d22e66715f">ARM_USART_FLOW_CONTROL_CTS</a>&#160;&#160;&#160;(2UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td></tr>
    224. 

  224. <tr class="memdesc:gaa7b38ebff1ce0f5c3e4479d22e66715f"><td class="mdescLeft">&#160;</td><td class="mdescRight">CTS Flow Control.  <a href="group__usart__flow__control.html#gaa7b38ebff1ce0f5c3e4479d22e66715f">More...</a><br/></td></tr>
    225. 

  225. <tr class="separator:gaa7b38ebff1ce0f5c3e4479d22e66715f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    226. 

  226. <tr class="memitem:gab16151b5c376b41586faf033f4a42d02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__flow__control.html#gab16151b5c376b41586faf033f4a42d02">ARM_USART_FLOW_CONTROL_RTS_CTS</a>&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td></tr>
    227. 

  227. <tr class="memdesc:gab16151b5c376b41586faf033f4a42d02"><td class="mdescLeft">&#160;</td><td class="mdescRight">RTS/CTS Flow Control.  <a href="group__usart__flow__control.html#gab16151b5c376b41586faf033f4a42d02">More...</a><br/></td></tr>
    228. 

  228. <tr class="separator:gab16151b5c376b41586faf033f4a42d02"><td class="memSeparator" colspan="2">&#160;</td></tr>
    229. 

  229. <tr class="memitem:a76148e4ea9d9e8a798e904e1d65d5dfc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a76148e4ea9d9e8a798e904e1d65d5dfc">ARM_USART_CPOL_Pos</a>&#160;&#160;&#160;18</td></tr>
    230. 

  230. <tr class="separator:a76148e4ea9d9e8a798e904e1d65d5dfc"><td class="memSeparator" colspan="2">&#160;</td></tr>
    231. 

  231. <tr class="memitem:a2424397076d0479ab6b83e557be35db2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a2424397076d0479ab6b83e557be35db2">ARM_USART_CPOL_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPOL_Pos)</td></tr>
    232. 

  232. <tr class="separator:a2424397076d0479ab6b83e557be35db2"><td class="memSeparator" colspan="2">&#160;</td></tr>
    233. 

  233. <tr class="memitem:ga472d459abb99f1caaff94fa0cdd2ad27"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__clock__polarity.html#ga472d459abb99f1caaff94fa0cdd2ad27">ARM_USART_CPOL0</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_CPOL_Pos)</td></tr>
    234. 

  234. <tr class="memdesc:ga472d459abb99f1caaff94fa0cdd2ad27"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPOL = 0 (default)  <a href="group__usart__clock__polarity.html#ga472d459abb99f1caaff94fa0cdd2ad27">More...</a><br/></td></tr>
    235. 

  235. <tr class="separator:ga472d459abb99f1caaff94fa0cdd2ad27"><td class="memSeparator" colspan="2">&#160;</td></tr>
    236. 

  236. <tr class="memitem:ga9e5541d8937a9d92e42aeb273138592a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__clock__polarity.html#ga9e5541d8937a9d92e42aeb273138592a">ARM_USART_CPOL1</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPOL_Pos)</td></tr>
    237. 

  237. <tr class="memdesc:ga9e5541d8937a9d92e42aeb273138592a"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPOL = 1.  <a href="group__usart__clock__polarity.html#ga9e5541d8937a9d92e42aeb273138592a">More...</a><br/></td></tr>
    238. 

  238. <tr class="separator:ga9e5541d8937a9d92e42aeb273138592a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    239. 

  239. <tr class="memitem:a01ec7322a6a62197e82e948b1a8a41fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#a01ec7322a6a62197e82e948b1a8a41fa">ARM_USART_CPHA_Pos</a>&#160;&#160;&#160;19</td></tr>
    240. 

  240. <tr class="separator:a01ec7322a6a62197e82e948b1a8a41fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
    241. 

  241. <tr class="memitem:afba3e5931503b5a820472c4610252d72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__USART_8h.html#afba3e5931503b5a820472c4610252d72">ARM_USART_CPHA_Msk</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPHA_Pos)</td></tr>
    242. 

  242. <tr class="separator:afba3e5931503b5a820472c4610252d72"><td class="memSeparator" colspan="2">&#160;</td></tr>
    243. 

  243. <tr class="memitem:ga5eb27c2294b7d14a20d0c7e2ef0a47b4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__clock__phase.html#ga5eb27c2294b7d14a20d0c7e2ef0a47b4">ARM_USART_CPHA0</a>&#160;&#160;&#160;(0UL &lt;&lt; ARM_USART_CPHA_Pos)</td></tr>
    244. 

  244. <tr class="memdesc:ga5eb27c2294b7d14a20d0c7e2ef0a47b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPHA = 0 (default)  <a href="group__usart__clock__phase.html#ga5eb27c2294b7d14a20d0c7e2ef0a47b4">More...</a><br/></td></tr>
    245. 

  245. <tr class="separator:ga5eb27c2294b7d14a20d0c7e2ef0a47b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    246. 

  246. <tr class="memitem:ga4b9f16371870476739a198c52dba6862"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__clock__phase.html#ga4b9f16371870476739a198c52dba6862">ARM_USART_CPHA1</a>&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPHA_Pos)</td></tr>
    247. 

  247. <tr class="memdesc:ga4b9f16371870476739a198c52dba6862"><td class="mdescLeft">&#160;</td><td class="mdescRight">CPHA = 1.  <a href="group__usart__clock__phase.html#ga4b9f16371870476739a198c52dba6862">More...</a><br/></td></tr>
    248. 

  248. <tr class="separator:ga4b9f16371870476739a198c52dba6862"><td class="memSeparator" colspan="2">&#160;</td></tr>
    249. 

  249. <tr class="memitem:gacd6f060afd55ffa1422567c31ebad950"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#gacd6f060afd55ffa1422567c31ebad950">ARM_USART_SET_DEFAULT_TX_VALUE</a>&#160;&#160;&#160;(0x10UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    250. 

  250. <tr class="memdesc:gacd6f060afd55ffa1422567c31ebad950"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set default Transmit value (Synchronous Receive only); arg = value.  <a href="group__usart__misc__control.html#gacd6f060afd55ffa1422567c31ebad950">More...</a><br/></td></tr>
    251. 

  251. <tr class="separator:gacd6f060afd55ffa1422567c31ebad950"><td class="memSeparator" colspan="2">&#160;</td></tr>
    252. 

  252. <tr class="memitem:gab8565d1f26382e832327e4553d18eb02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#gab8565d1f26382e832327e4553d18eb02">ARM_USART_SET_IRDA_PULSE</a>&#160;&#160;&#160;(0x11UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    253. 

  253. <tr class="memdesc:gab8565d1f26382e832327e4553d18eb02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set IrDA Pulse in ns; arg: 0=3/16 of bit period.  <a href="group__usart__misc__control.html#gab8565d1f26382e832327e4553d18eb02">More...</a><br/></td></tr>
    254. 

  254. <tr class="separator:gab8565d1f26382e832327e4553d18eb02"><td class="memSeparator" colspan="2">&#160;</td></tr>
    255. 

  255. <tr class="memitem:ga169be809adc186c131bb8b1618005b28"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga169be809adc186c131bb8b1618005b28">ARM_USART_SET_SMART_CARD_GUARD_TIME</a>&#160;&#160;&#160;(0x12UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    256. 

  256. <tr class="memdesc:ga169be809adc186c131bb8b1618005b28"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Smart Card Guard Time; arg = number of bit periods.  <a href="group__usart__misc__control.html#ga169be809adc186c131bb8b1618005b28">More...</a><br/></td></tr>
    257. 

  257. <tr class="separator:ga169be809adc186c131bb8b1618005b28"><td class="memSeparator" colspan="2">&#160;</td></tr>
    258. 

  258. <tr class="memitem:ga79698a2bd564c1f5bb1829ea422e9d3d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga79698a2bd564c1f5bb1829ea422e9d3d">ARM_USART_SET_SMART_CARD_CLOCK</a>&#160;&#160;&#160;(0x13UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    259. 

  259. <tr class="memdesc:ga79698a2bd564c1f5bb1829ea422e9d3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Smart Card Clock in Hz; arg: 0=Clock not generated.  <a href="group__usart__misc__control.html#ga79698a2bd564c1f5bb1829ea422e9d3d">More...</a><br/></td></tr>
    260. 

  260. <tr class="separator:ga79698a2bd564c1f5bb1829ea422e9d3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    261. 

  261. <tr class="memitem:ga4bb5374e7db308b6ff48aa13aa9c4b8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga4bb5374e7db308b6ff48aa13aa9c4b8a">ARM_USART_CONTROL_SMART_CARD_NACK</a>&#160;&#160;&#160;(0x14UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    262. 

  262. <tr class="memdesc:ga4bb5374e7db308b6ff48aa13aa9c4b8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Smart Card NACK generation; arg: 0=disabled, 1=enabled.  <a href="group__usart__misc__control.html#ga4bb5374e7db308b6ff48aa13aa9c4b8a">More...</a><br/></td></tr>
    263. 

  263. <tr class="separator:ga4bb5374e7db308b6ff48aa13aa9c4b8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    264. 

  264. <tr class="memitem:gad96ea1a80c97f968fbc0ae4c20e7fa6a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#gad96ea1a80c97f968fbc0ae4c20e7fa6a">ARM_USART_CONTROL_TX</a>&#160;&#160;&#160;(0x15UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    265. 

  265. <tr class="memdesc:gad96ea1a80c97f968fbc0ae4c20e7fa6a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmitter; arg: 0=disabled, 1=enabled.  <a href="group__usart__misc__control.html#gad96ea1a80c97f968fbc0ae4c20e7fa6a">More...</a><br/></td></tr>
    266. 

  266. <tr class="separator:gad96ea1a80c97f968fbc0ae4c20e7fa6a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    267. 

  267. <tr class="memitem:gad52c08553ae203d4f7741404589b8169"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#gad52c08553ae203d4f7741404589b8169">ARM_USART_CONTROL_RX</a>&#160;&#160;&#160;(0x16UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    268. 

  268. <tr class="memdesc:gad52c08553ae203d4f7741404589b8169"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receiver; arg: 0=disabled, 1=enabled.  <a href="group__usart__misc__control.html#gad52c08553ae203d4f7741404589b8169">More...</a><br/></td></tr>
    269. 

  269. <tr class="separator:gad52c08553ae203d4f7741404589b8169"><td class="memSeparator" colspan="2">&#160;</td></tr>
    270. 

  270. <tr class="memitem:gab194a6f916e5b25e0262534c0cce54dc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#gab194a6f916e5b25e0262534c0cce54dc">ARM_USART_CONTROL_BREAK</a>&#160;&#160;&#160;(0x17UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    271. 

  271. <tr class="memdesc:gab194a6f916e5b25e0262534c0cce54dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Continuous Break transmission; arg: 0=disabled, 1=enabled.  <a href="group__usart__misc__control.html#gab194a6f916e5b25e0262534c0cce54dc">More...</a><br/></td></tr>
    272. 

  272. <tr class="separator:gab194a6f916e5b25e0262534c0cce54dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
    273. 

  273. <tr class="memitem:ga54e88b32bc7368ff9c44613eae735c44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga54e88b32bc7368ff9c44613eae735c44">ARM_USART_ABORT_SEND</a>&#160;&#160;&#160;(0x18UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    274. 

  274. <tr class="memdesc:ga54e88b32bc7368ff9c44613eae735c44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Abort <a class="el" href="group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08">ARM_USART_Send</a>.  <a href="group__usart__misc__control.html#ga54e88b32bc7368ff9c44613eae735c44">More...</a><br/></td></tr>
    275. 

  275. <tr class="separator:ga54e88b32bc7368ff9c44613eae735c44"><td class="memSeparator" colspan="2">&#160;</td></tr>
    276. 

  276. <tr class="memitem:ga3f57bcedf610dc844e6cc3a230dba5f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga3f57bcedf610dc844e6cc3a230dba5f7">ARM_USART_ABORT_RECEIVE</a>&#160;&#160;&#160;(0x19UL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    277. 

  277. <tr class="memdesc:ga3f57bcedf610dc844e6cc3a230dba5f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Abort <a class="el" href="group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803">ARM_USART_Receive</a>.  <a href="group__usart__misc__control.html#ga3f57bcedf610dc844e6cc3a230dba5f7">More...</a><br/></td></tr>
    278. 

  278. <tr class="separator:ga3f57bcedf610dc844e6cc3a230dba5f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    279. 

  279. <tr class="memitem:ga83d0ef402feb342f9939f0e4ffe26182"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__misc__control.html#ga83d0ef402feb342f9939f0e4ffe26182">ARM_USART_ABORT_TRANSFER</a>&#160;&#160;&#160;(0x1AUL &lt;&lt; ARM_USART_CONTROL_Pos)</td></tr>
    280. 

  280. <tr class="memdesc:ga83d0ef402feb342f9939f0e4ffe26182"><td class="mdescLeft">&#160;</td><td class="mdescRight">Abort <a class="el" href="group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a">ARM_USART_Transfer</a>.  <a href="group__usart__misc__control.html#ga83d0ef402feb342f9939f0e4ffe26182">More...</a><br/></td></tr>
    281. 

  281. <tr class="separator:ga83d0ef402feb342f9939f0e4ffe26182"><td class="memSeparator" colspan="2">&#160;</td></tr>
    282. 

  282. <tr class="memitem:gaa98f35611ec5bd7034f21cb47199322b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gaa98f35611ec5bd7034f21cb47199322b">ARM_USART_ERROR_MODE</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 1)</td></tr>
    283. 

  283. <tr class="memdesc:gaa98f35611ec5bd7034f21cb47199322b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified Mode not supported.  <a href="group__usart__execution__status.html#gaa98f35611ec5bd7034f21cb47199322b">More...</a><br/></td></tr>
    284. 

  284. <tr class="separator:gaa98f35611ec5bd7034f21cb47199322b"><td class="memSeparator" colspan="2">&#160;</td></tr>
    285. 

  285. <tr class="memitem:gab57c4e8d4cb3a4b73751a002f5ec4586"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gab57c4e8d4cb3a4b73751a002f5ec4586">ARM_USART_ERROR_BAUDRATE</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 2)</td></tr>
    286. 

  286. <tr class="memdesc:gab57c4e8d4cb3a4b73751a002f5ec4586"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified baudrate not supported.  <a href="group__usart__execution__status.html#gab57c4e8d4cb3a4b73751a002f5ec4586">More...</a><br/></td></tr>
    287. 

  287. <tr class="separator:gab57c4e8d4cb3a4b73751a002f5ec4586"><td class="memSeparator" colspan="2">&#160;</td></tr>
    288. 

  288. <tr class="memitem:gaade95ddec6882e96c086dfe8e0ba9a4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gaade95ddec6882e96c086dfe8e0ba9a4c">ARM_USART_ERROR_DATA_BITS</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 3)</td></tr>
    289. 

  289. <tr class="memdesc:gaade95ddec6882e96c086dfe8e0ba9a4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified number of Data bits not supported.  <a href="group__usart__execution__status.html#gaade95ddec6882e96c086dfe8e0ba9a4c">More...</a><br/></td></tr>
    290. 

  290. <tr class="separator:gaade95ddec6882e96c086dfe8e0ba9a4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
    291. 

  291. <tr class="memitem:gaefabd886c586a45f4f7346c1f04392d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gaefabd886c586a45f4f7346c1f04392d0">ARM_USART_ERROR_PARITY</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 4)</td></tr>
    292. 

  292. <tr class="memdesc:gaefabd886c586a45f4f7346c1f04392d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified Parity not supported.  <a href="group__usart__execution__status.html#gaefabd886c586a45f4f7346c1f04392d0">More...</a><br/></td></tr>
    293. 

  293. <tr class="separator:gaefabd886c586a45f4f7346c1f04392d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    294. 

  294. <tr class="memitem:ga1d699654fbbed3ca41c5ea10aac8f859"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#ga1d699654fbbed3ca41c5ea10aac8f859">ARM_USART_ERROR_STOP_BITS</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 5)</td></tr>
    295. 

  295. <tr class="memdesc:ga1d699654fbbed3ca41c5ea10aac8f859"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified number of Stop bits not supported.  <a href="group__usart__execution__status.html#ga1d699654fbbed3ca41c5ea10aac8f859">More...</a><br/></td></tr>
    296. 

  296. <tr class="separator:ga1d699654fbbed3ca41c5ea10aac8f859"><td class="memSeparator" colspan="2">&#160;</td></tr>
    297. 

  297. <tr class="memitem:gaf8fea8d43ff72c76434d8b5e9eebd890"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gaf8fea8d43ff72c76434d8b5e9eebd890">ARM_USART_ERROR_FLOW_CONTROL</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 6)</td></tr>
    298. 

  298. <tr class="memdesc:gaf8fea8d43ff72c76434d8b5e9eebd890"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified Flow Control not supported.  <a href="group__usart__execution__status.html#gaf8fea8d43ff72c76434d8b5e9eebd890">More...</a><br/></td></tr>
    299. 

  299. <tr class="separator:gaf8fea8d43ff72c76434d8b5e9eebd890"><td class="memSeparator" colspan="2">&#160;</td></tr>
    300. 

  300. <tr class="memitem:ga2a1cd0a1e1bce9b545b0d7854a6fd6d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#ga2a1cd0a1e1bce9b545b0d7854a6fd6d6">ARM_USART_ERROR_CPOL</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 7)</td></tr>
    301. 

  301. <tr class="memdesc:ga2a1cd0a1e1bce9b545b0d7854a6fd6d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified Clock Polarity not supported.  <a href="group__usart__execution__status.html#ga2a1cd0a1e1bce9b545b0d7854a6fd6d6">More...</a><br/></td></tr>
    302. 

  302. <tr class="separator:ga2a1cd0a1e1bce9b545b0d7854a6fd6d6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    303. 

  303. <tr class="memitem:gade1af23c4ed5409dacd99ab76dc2ff8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__execution__status.html#gade1af23c4ed5409dacd99ab76dc2ff8b">ARM_USART_ERROR_CPHA</a>&#160;&#160;&#160;(<a class="el" href="group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5">ARM_DRIVER_ERROR_SPECIFIC</a> - 8)</td></tr>
    304. 

  304. <tr class="memdesc:gade1af23c4ed5409dacd99ab76dc2ff8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specified Clock Phase not supported.  <a href="group__usart__execution__status.html#gade1af23c4ed5409dacd99ab76dc2ff8b">More...</a><br/></td></tr>
    305. 

  305. <tr class="separator:gade1af23c4ed5409dacd99ab76dc2ff8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
    306. 

  306. <tr class="memitem:gaae1c626192b16ccace93f3546e7884bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#gaae1c626192b16ccace93f3546e7884bf">ARM_USART_EVENT_SEND_COMPLETE</a>&#160;&#160;&#160;(1UL &lt;&lt; 0)</td></tr>
    307. 

  307. <tr class="memdesc:gaae1c626192b16ccace93f3546e7884bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Send completed; however USART may still transmit data.  <a href="group__USART__events.html#gaae1c626192b16ccace93f3546e7884bf">More...</a><br/></td></tr>
    308. 

  308. <tr class="separator:gaae1c626192b16ccace93f3546e7884bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
    309. 

  309. <tr class="memitem:ga08b165fd8525e44e3ce42ed6183cd30a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga08b165fd8525e44e3ce42ed6183cd30a">ARM_USART_EVENT_RECEIVE_COMPLETE</a>&#160;&#160;&#160;(1UL &lt;&lt; 1)</td></tr>
    310. 

  310. <tr class="memdesc:ga08b165fd8525e44e3ce42ed6183cd30a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive completed.  <a href="group__USART__events.html#ga08b165fd8525e44e3ce42ed6183cd30a">More...</a><br/></td></tr>
    311. 

  311. <tr class="separator:ga08b165fd8525e44e3ce42ed6183cd30a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    312. 

  312. <tr class="memitem:ga0599793e6aa531d56ff9f81ff12605d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga0599793e6aa531d56ff9f81ff12605d7">ARM_USART_EVENT_TRANSFER_COMPLETE</a>&#160;&#160;&#160;(1UL &lt;&lt; 2)</td></tr>
    313. 

  313. <tr class="memdesc:ga0599793e6aa531d56ff9f81ff12605d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transfer completed.  <a href="group__USART__events.html#ga0599793e6aa531d56ff9f81ff12605d7">More...</a><br/></td></tr>
    314. 

  314. <tr class="separator:ga0599793e6aa531d56ff9f81ff12605d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    315. 

  315. <tr class="memitem:ga12872a3b04343f97d9535b5b0d37286d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga12872a3b04343f97d9535b5b0d37286d">ARM_USART_EVENT_TX_COMPLETE</a>&#160;&#160;&#160;(1UL &lt;&lt; 3)</td></tr>
    316. 

  316. <tr class="memdesc:ga12872a3b04343f97d9535b5b0d37286d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmit completed (optional)  <a href="group__USART__events.html#ga12872a3b04343f97d9535b5b0d37286d">More...</a><br/></td></tr>
    317. 

  317. <tr class="separator:ga12872a3b04343f97d9535b5b0d37286d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    318. 

  318. <tr class="memitem:gae57b9977bd338bf8bef86978843fa443"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#gae57b9977bd338bf8bef86978843fa443">ARM_USART_EVENT_TX_UNDERFLOW</a>&#160;&#160;&#160;(1UL &lt;&lt; 4)</td></tr>
    319. 

  319. <tr class="memdesc:gae57b9977bd338bf8bef86978843fa443"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmit data not available (Synchronous Slave)  <a href="group__USART__events.html#gae57b9977bd338bf8bef86978843fa443">More...</a><br/></td></tr>
    320. 

  320. <tr class="separator:gae57b9977bd338bf8bef86978843fa443"><td class="memSeparator" colspan="2">&#160;</td></tr>
    321. 

  321. <tr class="memitem:ga43a0869daf83abb3fea96926a97047ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga43a0869daf83abb3fea96926a97047ad">ARM_USART_EVENT_RX_OVERFLOW</a>&#160;&#160;&#160;(1UL &lt;&lt; 5)</td></tr>
    322. 

  322. <tr class="memdesc:ga43a0869daf83abb3fea96926a97047ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive data overflow.  <a href="group__USART__events.html#ga43a0869daf83abb3fea96926a97047ad">More...</a><br/></td></tr>
    323. 

  323. <tr class="separator:ga43a0869daf83abb3fea96926a97047ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
    324. 

  324. <tr class="memitem:ga66ee2256571450a3fc3c530344ea9bd7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga66ee2256571450a3fc3c530344ea9bd7">ARM_USART_EVENT_RX_TIMEOUT</a>&#160;&#160;&#160;(1UL &lt;&lt; 6)</td></tr>
    325. 

  325. <tr class="memdesc:ga66ee2256571450a3fc3c530344ea9bd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Receive character timeout (optional)  <a href="group__USART__events.html#ga66ee2256571450a3fc3c530344ea9bd7">More...</a><br/></td></tr>
    326. 

  326. <tr class="separator:ga66ee2256571450a3fc3c530344ea9bd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    327. 

  327. <tr class="memitem:gaa1d19e48faf2bdc2a976de448928288e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#gaa1d19e48faf2bdc2a976de448928288e">ARM_USART_EVENT_RX_BREAK</a>&#160;&#160;&#160;(1UL &lt;&lt; 7)</td></tr>
    328. 

  328. <tr class="memdesc:gaa1d19e48faf2bdc2a976de448928288e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Break detected on receive.  <a href="group__USART__events.html#gaa1d19e48faf2bdc2a976de448928288e">More...</a><br/></td></tr>
    329. 

  329. <tr class="separator:gaa1d19e48faf2bdc2a976de448928288e"><td class="memSeparator" colspan="2">&#160;</td></tr>
    330. 

  330. <tr class="memitem:ga2d97495c650220fbfe9d6977d0953127"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga2d97495c650220fbfe9d6977d0953127">ARM_USART_EVENT_RX_FRAMING_ERROR</a>&#160;&#160;&#160;(1UL &lt;&lt; 8)</td></tr>
    331. 

  331. <tr class="memdesc:ga2d97495c650220fbfe9d6977d0953127"><td class="mdescLeft">&#160;</td><td class="mdescRight">Framing error detected on receive.  <a href="group__USART__events.html#ga2d97495c650220fbfe9d6977d0953127">More...</a><br/></td></tr>
    332. 

  332. <tr class="separator:ga2d97495c650220fbfe9d6977d0953127"><td class="memSeparator" colspan="2">&#160;</td></tr>
    333. 

  333. <tr class="memitem:gadb4fec2530fc5ae3ad2b056741883451"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#gadb4fec2530fc5ae3ad2b056741883451">ARM_USART_EVENT_RX_PARITY_ERROR</a>&#160;&#160;&#160;(1UL &lt;&lt; 9)</td></tr>
    334. 

  334. <tr class="memdesc:gadb4fec2530fc5ae3ad2b056741883451"><td class="mdescLeft">&#160;</td><td class="mdescRight">Parity error detected on receive.  <a href="group__USART__events.html#gadb4fec2530fc5ae3ad2b056741883451">More...</a><br/></td></tr>
    335. 

  335. <tr class="separator:gadb4fec2530fc5ae3ad2b056741883451"><td class="memSeparator" colspan="2">&#160;</td></tr>
    336. 

  336. <tr class="memitem:ga4cd807ca131bdcb1a7eb4f223fa70476"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga4cd807ca131bdcb1a7eb4f223fa70476">ARM_USART_EVENT_CTS</a>&#160;&#160;&#160;(1UL &lt;&lt; 10)</td></tr>
    337. 

  337. <tr class="memdesc:ga4cd807ca131bdcb1a7eb4f223fa70476"><td class="mdescLeft">&#160;</td><td class="mdescRight">CTS state changed (optional)  <a href="group__USART__events.html#ga4cd807ca131bdcb1a7eb4f223fa70476">More...</a><br/></td></tr>
    338. 

  338. <tr class="separator:ga4cd807ca131bdcb1a7eb4f223fa70476"><td class="memSeparator" colspan="2">&#160;</td></tr>
    339. 

  339. <tr class="memitem:ga5afef591c2e8dd9bc4332b7bc8d96309"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga5afef591c2e8dd9bc4332b7bc8d96309">ARM_USART_EVENT_DSR</a>&#160;&#160;&#160;(1UL &lt;&lt; 11)</td></tr>
    340. 

  340. <tr class="memdesc:ga5afef591c2e8dd9bc4332b7bc8d96309"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSR state changed (optional)  <a href="group__USART__events.html#ga5afef591c2e8dd9bc4332b7bc8d96309">More...</a><br/></td></tr>
    341. 

  341. <tr class="separator:ga5afef591c2e8dd9bc4332b7bc8d96309"><td class="memSeparator" colspan="2">&#160;</td></tr>
    342. 

  342. <tr class="memitem:ga1628b951feba1c851f424ce89da409a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#ga1628b951feba1c851f424ce89da409a4">ARM_USART_EVENT_DCD</a>&#160;&#160;&#160;(1UL &lt;&lt; 12)</td></tr>
    343. 

  343. <tr class="memdesc:ga1628b951feba1c851f424ce89da409a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">DCD state changed (optional)  <a href="group__USART__events.html#ga1628b951feba1c851f424ce89da409a4">More...</a><br/></td></tr>
    344. 

  344. <tr class="separator:ga1628b951feba1c851f424ce89da409a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
    345. 

  345. <tr class="memitem:gac17fe5723d4c5923656dadd9d1302154"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__USART__events.html#gac17fe5723d4c5923656dadd9d1302154">ARM_USART_EVENT_RI</a>&#160;&#160;&#160;(1UL &lt;&lt; 13)</td></tr>
    346. 

  346. <tr class="memdesc:gac17fe5723d4c5923656dadd9d1302154"><td class="mdescLeft">&#160;</td><td class="mdescRight">RI state changed (optional)  <a href="group__USART__events.html#gac17fe5723d4c5923656dadd9d1302154">More...</a><br/></td></tr>
    347. 

  347. <tr class="separator:gac17fe5723d4c5923656dadd9d1302154"><td class="memSeparator" colspan="2">&#160;</td></tr>
    348. 

  348. </table><table class="memberdecls">
    349. 

  349. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a>
    350. 

  350. Typedefs</h2></td></tr>
    351. 

  351. <tr class="memitem:gaa578c3829eea207e9e48df6cb6f038a1"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__interface__gr.html#gaa578c3829eea207e9e48df6cb6f038a1">ARM_USART_SignalEvent_t</a> )(uint32_t event)</td></tr>
    352. 

  352. <tr class="memdesc:gaa578c3829eea207e9e48df6cb6f038a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer to <a class="el" href="group__usart__interface__gr.html#gad796cd023f8f6300a6caadcc39d43cbf">ARM_USART_SignalEvent</a> : Signal USART Event.  <a href="group__usart__interface__gr.html#gaa578c3829eea207e9e48df6cb6f038a1">More...</a><br/></td></tr>
    353. 

  353. <tr class="separator:gaa578c3829eea207e9e48df6cb6f038a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
    354. 

  354. </table><table class="memberdecls">
    355. 

  355. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
    356. 

  356. Enumerations</h2></td></tr>
    357. 

  357. <tr class="memitem:ga7b89d709f048b6a956aa211f63e75f6f"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6f">ARM_USART_MODEM_CONTROL</a> { <br/>
    358. 

  358. &#160;&#160;<a class="el" href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6fab4d04e682d04f70c6aeba130656d3ec6">ARM_USART_RTS_CLEAR</a>, 
    359. 

  359. <br/>
    360. 

  360. &#160;&#160;<a class="el" href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6fa7f9d445e6e56642c4c4251a00bfa7434">ARM_USART_RTS_SET</a>, 
    361. 

  361. <br/>
    362. 

  362. &#160;&#160;<a class="el" href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6fa3ad44ce9f16c136ccad45c09ec65cb4c">ARM_USART_DTR_CLEAR</a>, 
    363. 

  363. <br/>
    364. 

  364. &#160;&#160;<a class="el" href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6fab938a21e1b59a2b92424e2521b9469d4">ARM_USART_DTR_SET</a>
    365. 

  365. <br/>
    366. 

  366.  }</td></tr>
    367. 

  367. <tr class="memdesc:ga7b89d709f048b6a956aa211f63e75f6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">USART Modem Control.  <a href="group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6f">More...</a><br/></td></tr>
    368. 

  368. <tr class="separator:ga7b89d709f048b6a956aa211f63e75f6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
    369. 

  369. </table>
    370. 

  370. <h2 class="groupheader">Macro Definition Documentation</h2>
    371. 

  371. <a class="anchor" id="ab37a12fd0981e09c42ea42684a5dfbab"></a>
    372. 

  372. <div class="memitem">
    373. 

  373. <div class="memproto">
    374. 

  374.       <table class="memname">
    375. 

  375.         <tr>
    376. 

  376.           <td class="memname">#define ARM_USART_API_VERSION&#160;&#160;&#160;<a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,4)  /* API version */</td>
    377. 

  377.         </tr>
    378. 

  378.       </table>
    379. 

  379. </div><div class="memdoc">
    380. 

  380. 

  381. </div>
    382. 

  382. </div>
    383. 

  383. <a class="anchor" id="adf67ff652d2129cedaa488d2a600561e"></a>
    384. 

  384. <div class="memitem">
    385. 

  385. <div class="memproto">
    386. 

  386.       <table class="memname">
    387. 

  387.         <tr>
    388. 

  388.           <td class="memname">#define _ARM_Driver_USART_</td>
    389. 

  389.           <td>(</td>
    390. 

  390.           <td class="paramtype">&#160;</td>
    391. 

  391.           <td class="paramname">n</td><td>)</td>
    392. 

  392.           <td>&#160;&#160;&#160;Driver_USART##n</td>
    393. 

  393.         </tr>
    394. 

  394.       </table>
    395. 

  395. </div><div class="memdoc">
    396. 

  396. 

  397. </div>
    398. 

  398. </div>
    399. 

  399. <a class="anchor" id="aa083b8827ae5e70779e0b70d617da0e1"></a>
    400. 

  400. <div class="memitem">
    401. 

  401. <div class="memproto">
    402. 

  402.       <table class="memname">
    403. 

  403.         <tr>
    404. 

  404.           <td class="memname">#define ARM_Driver_USART_</td>
    405. 

  405.           <td>(</td>
    406. 

  406.           <td class="paramtype">&#160;</td>
    407. 

  407.           <td class="paramname">n</td><td>)</td>
    408. 

  408.           <td>&#160;&#160;&#160;<a class="el" href="Driver__USART_8h.html#adf67ff652d2129cedaa488d2a600561e">_ARM_Driver_USART_</a>(n)</td>
    409. 

  409.         </tr>
    410. 

  410.       </table>
    411. 

  411. </div><div class="memdoc">
    412. 

  412. 

  413. </div>
    414. 

  414. </div>
    415. 

  415. <a class="anchor" id="ab654e36e71012c28b91273e96827e1b8"></a>
    416. 

  416. <div class="memitem">
    417. 

  417. <div class="memproto">
    418. 

  418.       <table class="memname">
    419. 

  419.         <tr>
    420. 

  420.           <td class="memname">#define ARM_USART_CONTROL_Pos&#160;&#160;&#160;0</td>
    421. 

  421.         </tr>
    422. 

  422.       </table>
    423. 

  423. </div><div class="memdoc">
    424. 

  424. 

  425. </div>
    426. 

  426. </div>
    427. 

  427. <a class="anchor" id="a253d29333d1a40d0401a02f9675a90fd"></a>
    428. 

  428. <div class="memitem">
    429. 

  429. <div class="memproto">
    430. 

  430.       <table class="memname">
    431. 

  431.         <tr>
    432. 

  432.           <td class="memname">#define ARM_USART_CONTROL_Msk&#160;&#160;&#160;(0xFFUL &lt;&lt; ARM_USART_CONTROL_Pos)</td>
    433. 

  433.         </tr>
    434. 

  434.       </table>
    435. 

  435. </div><div class="memdoc">
    436. 

  436. 

  437. </div>
    438. 

  438. </div>
    439. 

  439. <a class="anchor" id="a08696262ebd491edf1e7865ebe93a81f"></a>
    440. 

  440. <div class="memitem">
    441. 

  441. <div class="memproto">
    442. 

  442.       <table class="memname">
    443. 

  443.         <tr>
    444. 

  444.           <td class="memname">#define ARM_USART_DATA_BITS_Pos&#160;&#160;&#160;8</td>
    445. 

  445.         </tr>
    446. 

  446.       </table>
    447. 

  447. </div><div class="memdoc">
    448. 

  448. 

  449. </div>
    450. 

  450. </div>
    451. 

  451. <a class="anchor" id="a84581b0925c149db3ca28d2656107656"></a>
    452. 

  452. <div class="memitem">
    453. 

  453. <div class="memproto">
    454. 

  454.       <table class="memname">
    455. 

  455.         <tr>
    456. 

  456.           <td class="memname">#define ARM_USART_DATA_BITS_Msk&#160;&#160;&#160;(7UL &lt;&lt; ARM_USART_DATA_BITS_Pos)</td>
    457. 

  457.         </tr>
    458. 

  458.       </table>
    459. 

  459. </div><div class="memdoc">
    460. 

  460. 

  461. </div>
    462. 

  462. </div>
    463. 

  463. <a class="anchor" id="a2ce50af2e58db12c25a5791080aca258"></a>
    464. 

  464. <div class="memitem">
    465. 

  465. <div class="memproto">
    466. 

  466.       <table class="memname">
    467. 

  467.         <tr>
    468. 

  468.           <td class="memname">#define ARM_USART_PARITY_Pos&#160;&#160;&#160;12</td>
    469. 

  469.         </tr>
    470. 

  470.       </table>
    471. 

  471. </div><div class="memdoc">
    472. 

  472. 

  473. </div>
    474. 

  474. </div>
    475. 

  475. <a class="anchor" id="a434c48980c65129c01aa5bc1c8e22898"></a>
    476. 

  476. <div class="memitem">
    477. 

  477. <div class="memproto">
    478. 

  478.       <table class="memname">
    479. 

  479.         <tr>
    480. 

  480.           <td class="memname">#define ARM_USART_PARITY_Msk&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_PARITY_Pos)</td>
    481. 

  481.         </tr>
    482. 

  482.       </table>
    483. 

  483. </div><div class="memdoc">
    484. 

  484. 

  485. </div>
    486. 

  486. </div>
    487. 

  487. <a class="anchor" id="ac73d045a0058006dbdc64a6d43772217"></a>
    488. 

  488. <div class="memitem">
    489. 

  489. <div class="memproto">
    490. 

  490.       <table class="memname">
    491. 

  491.         <tr>
    492. 

  492.           <td class="memname">#define ARM_USART_STOP_BITS_Pos&#160;&#160;&#160;14</td>
    493. 

  493.         </tr>
    494. 

  494.       </table>
    495. 

  495. </div><div class="memdoc">
    496. 

  496. 

  497. </div>
    498. 

  498. </div>
    499. 

  499. <a class="anchor" id="aff72dd7b794cf2be5b5edca180be7a40"></a>
    500. 

  500. <div class="memitem">
    501. 

  501. <div class="memproto">
    502. 

  502.       <table class="memname">
    503. 

  503.         <tr>
    504. 

  504.           <td class="memname">#define ARM_USART_STOP_BITS_Msk&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_STOP_BITS_Pos)</td>
    505. 

  505.         </tr>
    506. 

  506.       </table>
    507. 

  507. </div><div class="memdoc">
    508. 

  508. 

  509. </div>
    510. 

  510. </div>
    511. 

  511. <a class="anchor" id="a2e09a6b54db30327511241fdf422c4c9"></a>
    512. 

  512. <div class="memitem">
    513. 

  513. <div class="memproto">
    514. 

  514.       <table class="memname">
    515. 

  515.         <tr>
    516. 

  516.           <td class="memname">#define ARM_USART_FLOW_CONTROL_Pos&#160;&#160;&#160;16</td>
    517. 

  517.         </tr>
    518. 

  518.       </table>
    519. 

  519. </div><div class="memdoc">
    520. 

  520. 

  521. </div>
    522. 

  522. </div>
    523. 

  523. <a class="anchor" id="a0e80cb6a6f47c164fb1fe5fe8eab43f4"></a>
    524. 

  524. <div class="memitem">
    525. 

  525. <div class="memproto">
    526. 

  526.       <table class="memname">
    527. 

  527.         <tr>
    528. 

  528.           <td class="memname">#define ARM_USART_FLOW_CONTROL_Msk&#160;&#160;&#160;(3UL &lt;&lt; ARM_USART_FLOW_CONTROL_Pos)</td>
    529. 

  529.         </tr>
    530. 

  530.       </table>
    531. 

  531. </div><div class="memdoc">
    532. 

  532. 

  533. </div>
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  538.       <table class="memname">
    539. 

  539.         <tr>
    540. 

  540.           <td class="memname">#define ARM_USART_CPOL_Pos&#160;&#160;&#160;18</td>
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  541.         </tr>
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  542.       </table>
    543. 

  543. </div><div class="memdoc">
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  544. 

  545. </div>
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  550.       <table class="memname">
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  551.         <tr>
    552. 

  552.           <td class="memname">#define ARM_USART_CPOL_Msk&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPOL_Pos)</td>
    553. 

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  555. </div><div class="memdoc">
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  556. 

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    562. 

  562.       <table class="memname">
    563. 

  563.         <tr>
    564. 

  564.           <td class="memname">#define ARM_USART_CPHA_Pos&#160;&#160;&#160;19</td>
    565. 

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  566.       </table>
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  567. </div><div class="memdoc">
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  568. 

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  573. <div class="memproto">
    574. 

  574.       <table class="memname">
    575. 

  575.         <tr>
    576. 

  576.           <td class="memname">#define ARM_USART_CPHA_Msk&#160;&#160;&#160;(1UL &lt;&lt; ARM_USART_CPHA_Pos)</td>
    577. 

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