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    35. 

  35.    &#160;<span id="projectnumber">Version 2.8.0</span>
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  37.    <div id="projectbrief">Peripheral Interface for Middleware and Application Code</div>
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  111. <a href="#define-members">Macros</a>  </div>
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  113. <div class="title">MCI Controls<div class="ingroups"><a class="el" href="group__mci__control__gr.html">MCI Control Codes</a></div></div>  </div>
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    115. 

  115. <div class="contents">
    116. 

  116. 

  117. <p>Configure and control the MCI interface.  
    118. 

  118. <a href="#details">More...</a></p>
    119. 

  119. <table class="memberdecls">
    120. 

  120. <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
    121. 

  121. Macros</h2></td></tr>
    122. 

  122. <tr class="memitem:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga7f982d2e5aec768307d35a83c65fb3ef">ARM_MCI_BUS_SPEED</a>&#160;&#160;&#160;(0x01UL)</td></tr>
    123. 

  123. <tr class="memdesc:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s.  <a href="#ga7f982d2e5aec768307d35a83c65fb3ef">More...</a><br/></td></tr>
    124. 

  124. <tr class="separator:ga7f982d2e5aec768307d35a83c65fb3ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
    125. 

  125. <tr class="memitem:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gaf7ede525eabc618fbbb9f7a294c8ed96">ARM_MCI_BUS_SPEED_MODE</a>&#160;&#160;&#160;(0x02UL)</td></tr>
    126. 

  126. <tr class="memdesc:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Bus Speed Mode as specified with arg.  <a href="#gaf7ede525eabc618fbbb9f7a294c8ed96">More...</a><br/></td></tr>
    127. 

  127. <tr class="separator:gaf7ede525eabc618fbbb9f7a294c8ed96"><td class="memSeparator" colspan="2">&#160;</td></tr>
    128. 

  128. <tr class="memitem:ga8b7571e37520c07d8ef4f697f3886715"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga8b7571e37520c07d8ef4f697f3886715">ARM_MCI_BUS_CMD_MODE</a>&#160;&#160;&#160;(0x03UL)</td></tr>
    129. 

  129. <tr class="memdesc:ga8b7571e37520c07d8ef4f697f3886715"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set CMD Line Mode as specified with arg.  <a href="#ga8b7571e37520c07d8ef4f697f3886715">More...</a><br/></td></tr>
    130. 

  130. <tr class="separator:ga8b7571e37520c07d8ef4f697f3886715"><td class="memSeparator" colspan="2">&#160;</td></tr>
    131. 

  131. <tr class="memitem:ga876d964d0eeacdb16e93f7558a544587"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga876d964d0eeacdb16e93f7558a544587">ARM_MCI_BUS_DATA_WIDTH</a>&#160;&#160;&#160;(0x04UL)</td></tr>
    132. 

  132. <tr class="memdesc:ga876d964d0eeacdb16e93f7558a544587"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Bus Data Width as specified with arg.  <a href="#ga876d964d0eeacdb16e93f7558a544587">More...</a><br/></td></tr>
    133. 

  133. <tr class="separator:ga876d964d0eeacdb16e93f7558a544587"><td class="memSeparator" colspan="2">&#160;</td></tr>
    134. 

  134. <tr class="memitem:ga78068f519139f2ae7b09e0608070aaf6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga78068f519139f2ae7b09e0608070aaf6">ARM_MCI_DRIVER_STRENGTH</a>&#160;&#160;&#160;(0x05UL)</td></tr>
    135. 

  135. <tr class="memdesc:ga78068f519139f2ae7b09e0608070aaf6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set SD UHS-I Driver Strength as specified with arg.  <a href="#ga78068f519139f2ae7b09e0608070aaf6">More...</a><br/></td></tr>
    136. 

  136. <tr class="separator:ga78068f519139f2ae7b09e0608070aaf6"><td class="memSeparator" colspan="2">&#160;</td></tr>
    137. 

  137. <tr class="memitem:ga21e403e8c3fa8cc75431a513813f0a16"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga21e403e8c3fa8cc75431a513813f0a16">ARM_MCI_CONTROL_RESET</a>&#160;&#160;&#160;(0x06UL)</td></tr>
    138. 

  138. <tr class="memdesc:ga21e403e8c3fa8cc75431a513813f0a16"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active.  <a href="#ga21e403e8c3fa8cc75431a513813f0a16">More...</a><br/></td></tr>
    139. 

  139. <tr class="separator:ga21e403e8c3fa8cc75431a513813f0a16"><td class="memSeparator" colspan="2">&#160;</td></tr>
    140. 

  140. <tr class="memitem:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga889473fbfbdcb89aab4d53cc8a13f615">ARM_MCI_CONTROL_CLOCK_IDLE</a>&#160;&#160;&#160;(0x07UL)</td></tr>
    141. 

  141. <tr class="memdesc:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled.  <a href="#ga889473fbfbdcb89aab4d53cc8a13f615">More...</a><br/></td></tr>
    142. 

  142. <tr class="separator:ga889473fbfbdcb89aab4d53cc8a13f615"><td class="memSeparator" colspan="2">&#160;</td></tr>
    143. 

  143. <tr class="memitem:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga98853f60bdc085aeeccd66f7bdf22d3d">ARM_MCI_UHS_TUNING_OPERATION</a>&#160;&#160;&#160;(0x08UL)</td></tr>
    144. 

  144. <tr class="memdesc:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute.  <a href="#ga98853f60bdc085aeeccd66f7bdf22d3d">More...</a><br/></td></tr>
    145. 

  145. <tr class="separator:ga98853f60bdc085aeeccd66f7bdf22d3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
    146. 

  146. <tr class="memitem:gabd3af448e26da5657c1c5a03330476b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gabd3af448e26da5657c1c5a03330476b7">ARM_MCI_UHS_TUNING_RESULT</a>&#160;&#160;&#160;(0x09UL)</td></tr>
    147. 

  147. <tr class="memdesc:gabd3af448e26da5657c1c5a03330476b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error.  <a href="#gabd3af448e26da5657c1c5a03330476b7">More...</a><br/></td></tr>
    148. 

  148. <tr class="separator:gabd3af448e26da5657c1c5a03330476b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
    149. 

  149. <tr class="memitem:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga09a58821e42595f0c2e55f8cc2d32ceb">ARM_MCI_DATA_TIMEOUT</a>&#160;&#160;&#160;(0x0AUL)</td></tr>
    150. 

  150. <tr class="memdesc:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Data timeout; arg = timeout in bus cycles.  <a href="#ga09a58821e42595f0c2e55f8cc2d32ceb">More...</a><br/></td></tr>
    151. 

  151. <tr class="separator:ga09a58821e42595f0c2e55f8cc2d32ceb"><td class="memSeparator" colspan="2">&#160;</td></tr>
    152. 

  152. <tr class="memitem:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gae97b1a819a5d326b1f1009b0d6d48b5a">ARM_MCI_CSS_TIMEOUT</a>&#160;&#160;&#160;(0x0BUL)</td></tr>
    153. 

  153. <tr class="memdesc:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles.  <a href="#gae97b1a819a5d326b1f1009b0d6d48b5a">More...</a><br/></td></tr>
    154. 

  154. <tr class="separator:gae97b1a819a5d326b1f1009b0d6d48b5a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    155. 

  155. <tr class="memitem:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga19fd7d3b74ac48ca74a2e138b3ee9963">ARM_MCI_MONITOR_SDIO_INTERRUPT</a>&#160;&#160;&#160;(0x0CUL)</td></tr>
    156. 

  156. <tr class="memdesc:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="mdescLeft">&#160;</td><td class="mdescRight">Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled.  <a href="#ga19fd7d3b74ac48ca74a2e138b3ee9963">More...</a><br/></td></tr>
    157. 

  157. <tr class="separator:ga19fd7d3b74ac48ca74a2e138b3ee9963"><td class="memSeparator" colspan="2">&#160;</td></tr>
    158. 

  158. <tr class="memitem:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gaaa10c5aa7a8108aa59c3734b3eec2e3a">ARM_MCI_CONTROL_READ_WAIT</a>&#160;&#160;&#160;(0x0DUL)</td></tr>
    159. 

  159. <tr class="memdesc:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled.  <a href="#gaaa10c5aa7a8108aa59c3734b3eec2e3a">More...</a><br/></td></tr>
    160. 

  160. <tr class="separator:gaaa10c5aa7a8108aa59c3734b3eec2e3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
    161. 

  161. <tr class="memitem:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#ga04cf174b0ef13240f26225bf8e45a4a0">ARM_MCI_SUSPEND_TRANSFER</a>&#160;&#160;&#160;(0x0EUL)</td></tr>
    162. 

  162. <tr class="memdesc:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer.  <a href="#ga04cf174b0ef13240f26225bf8e45a4a0">More...</a><br/></td></tr>
    163. 

  163. <tr class="separator:ga04cf174b0ef13240f26225bf8e45a4a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
    164. 

  164. <tr class="memitem:gac4907319499072fddf61f2f83b0dd966"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mci__mode__ctrls.html#gac4907319499072fddf61f2f83b0dd966">ARM_MCI_RESUME_TRANSFER</a>&#160;&#160;&#160;(0x0FUL)</td></tr>
    165. 

  165. <tr class="memdesc:gac4907319499072fddf61f2f83b0dd966"><td class="mdescLeft">&#160;</td><td class="mdescRight">Resume Data transfer (SD I/O)  <a href="#gac4907319499072fddf61f2f83b0dd966">More...</a><br/></td></tr>
    166. 

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    167. 

  167. </table>
    168. 

  168. <a name="details" id="details"></a><h2 class="groupheader">Description</h2>
    169. 

  169. <p>Configure and control the MCI interface. </p>
    170. 

  170. <p>The following codes are used as values for the parameter <em>control</em> of the function <a class="el" href="group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30">ARM_MCI_Control</a> to setup the MCI interface. </p>
    171. 

  171. <h2 class="groupheader">Macro Definition Documentation</h2>
    172. 

  172. <a class="anchor" id="ga7f982d2e5aec768307d35a83c65fb3ef"></a>
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  173. <div class="memitem">
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  175.       <table class="memname">
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  177.           <td class="memname">#define ARM_MCI_BUS_SPEED&#160;&#160;&#160;(0x01UL)</td>
    178. 

  178.         </tr>
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  179.       </table>
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  180. </div><div class="memdoc">
    181. 

  181. 

  182. <p>Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. </p>
    183. 

  183. 

  184. </div>
    185. 

  185. </div>
    186. 

  186. <a class="anchor" id="gaf7ede525eabc618fbbb9f7a294c8ed96"></a>
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  189.       <table class="memname">
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  190.         <tr>
    191. 

  191.           <td class="memname">#define ARM_MCI_BUS_SPEED_MODE&#160;&#160;&#160;(0x02UL)</td>
    192. 

  192.         </tr>
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  193.       </table>
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  194. </div><div class="memdoc">
    195. 

  195. 

  196. <p>Set Bus Speed Mode as specified with arg. </p>
    197. 

  197. 

  198. </div>
    199. 

  199. </div>
    200. 

  200. <a class="anchor" id="ga8b7571e37520c07d8ef4f697f3886715"></a>
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  205.           <td class="memname">#define ARM_MCI_BUS_CMD_MODE&#160;&#160;&#160;(0x03UL)</td>
    206. 

  206.         </tr>
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  207.       </table>
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  208. </div><div class="memdoc">
    209. 

  209. 

  210. <p>Set CMD Line Mode as specified with arg. </p>
    211. 

  211. 

  212. </div>
    213. 

  213. </div>
    214. 

  214. <a class="anchor" id="ga876d964d0eeacdb16e93f7558a544587"></a>
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  217.       <table class="memname">
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  218.         <tr>
    219. 

  219.           <td class="memname">#define ARM_MCI_BUS_DATA_WIDTH&#160;&#160;&#160;(0x04UL)</td>
    220. 

  220.         </tr>
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  221.       </table>
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  222. </div><div class="memdoc">
    223. 

  223. 

  224. <p>Set Bus Data Width as specified with arg. </p>
    225. 

  225. 

  226. </div>
    227. 

  227. </div>
    228. 

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  230. <div class="memproto">
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  231.       <table class="memname">
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  232.         <tr>
    233. 

  233.           <td class="memname">#define ARM_MCI_DRIVER_STRENGTH&#160;&#160;&#160;(0x05UL)</td>
    234. 

  234.         </tr>
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  235.       </table>
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  236. </div><div class="memdoc">
    237. 

  237. 

  238. <p>Set SD UHS-I Driver Strength as specified with arg. </p>
    239. 

  239. 

  240. </div>
    241. 

  241. </div>
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  242. <a class="anchor" id="ga21e403e8c3fa8cc75431a513813f0a16"></a>
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  246.         <tr>
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  247.           <td class="memname">#define ARM_MCI_CONTROL_RESET&#160;&#160;&#160;(0x06UL)</td>
    248. 

  248.         </tr>
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  249.       </table>
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  250. </div><div class="memdoc">
    251. 

  251. 

  252. <p>Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. </p>
    253. 

  253. 

  254. </div>
    255. 

  255. </div>
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  256. <a class="anchor" id="ga889473fbfbdcb89aab4d53cc8a13f615"></a>
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  261.           <td class="memname">#define ARM_MCI_CONTROL_CLOCK_IDLE&#160;&#160;&#160;(0x07UL)</td>
    262. 

  262.         </tr>
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  263.       </table>
    264. 

  264. </div><div class="memdoc">
    265. 

  265. 

  266. <p>Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. </p>
    267. 

  267. 

  268. </div>
    269. 

  269. </div>
    270. 

  270. <a class="anchor" id="ga98853f60bdc085aeeccd66f7bdf22d3d"></a>
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  275.           <td class="memname">#define ARM_MCI_UHS_TUNING_OPERATION&#160;&#160;&#160;(0x08UL)</td>
    276. 

  276.         </tr>
    277. 

  277.       </table>
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  278. </div><div class="memdoc">
    279. 

  279. 

  280. <p>Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. </p>
    281. 

  281. 

  282. </div>
    283. 

  283. </div>
    284. 

  284. <a class="anchor" id="gabd3af448e26da5657c1c5a03330476b7"></a>
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    288. 

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  289.           <td class="memname">#define ARM_MCI_UHS_TUNING_RESULT&#160;&#160;&#160;(0x09UL)</td>
    290. 

  290.         </tr>
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  291.       </table>
    292. 

  292. </div><div class="memdoc">
    293. 

  293. 

  294. <p>Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. </p>
    295. 

  295. 

  296. </div>
    297. 

  297. </div>
    298. 

  298. <a class="anchor" id="ga09a58821e42595f0c2e55f8cc2d32ceb"></a>
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    303. 

  303.           <td class="memname">#define ARM_MCI_DATA_TIMEOUT&#160;&#160;&#160;(0x0AUL)</td>
    304. 

  304.         </tr>
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  305.       </table>
    306. 

  306. </div><div class="memdoc">
    307. 

  307. 

  308. <p>Set Data timeout; arg = timeout in bus cycles. </p>
    309. 

  309. 

  310. </div>
    311. 

  311. </div>
    312. 

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  317.           <td class="memname">#define ARM_MCI_CSS_TIMEOUT&#160;&#160;&#160;(0x0BUL)</td>
    318. 

  318.         </tr>
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  319.       </table>
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  320. </div><div class="memdoc">
    321. 

  321. 

  322. <p>Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. </p>
    323. 

  323. 

  324. </div>
    325. 

  325. </div>
    326. 

  326. <a class="anchor" id="ga19fd7d3b74ac48ca74a2e138b3ee9963"></a>
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  330.         <tr>
    331. 

  331.           <td class="memname">#define ARM_MCI_MONITOR_SDIO_INTERRUPT&#160;&#160;&#160;(0x0CUL)</td>
    332. 

  332.         </tr>
    333. 

  333.       </table>
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  334. </div><div class="memdoc">
    335. 

  335. 

  336. <p>Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. </p>
    337. 

  337. 

  338. </div>
    339. 

  339. </div>
    340. 

  340. <a class="anchor" id="gaaa10c5aa7a8108aa59c3734b3eec2e3a"></a>
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    345. 

  345.           <td class="memname">#define ARM_MCI_CONTROL_READ_WAIT&#160;&#160;&#160;(0x0DUL)</td>
    346. 

  346.         </tr>
    347. 

  347.       </table>
    348. 

  348. </div><div class="memdoc">
    349. 

  349. 

  350. <p>Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. </p>
    351. 

  351. 

  352. </div>
    353. 

  353. </div>
    354. 

  354. <a class="anchor" id="ga04cf174b0ef13240f26225bf8e45a4a0"></a>
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    359. 

  359.           <td class="memname">#define ARM_MCI_SUSPEND_TRANSFER&#160;&#160;&#160;(0x0EUL)</td>
    360. 

  360.         </tr>
    361. 

  361.       </table>
    362. 

  362. </div><div class="memdoc">
    363. 

  363. 

  364. <p>Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. </p>
    365. 

  365. 

  366. </div>
    367. 

  367. </div>
    368. 

  368. <a class="anchor" id="gac4907319499072fddf61f2f83b0dd966"></a>
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  371.       <table class="memname">
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    373. 

  373.           <td class="memname">#define ARM_MCI_RESUME_TRANSFER&#160;&#160;&#160;(0x0FUL)</td>
    374. 

  374.         </tr>
    375. 

  375.       </table>
    376. 

  376. </div><div class="memdoc">
    377. 

  377. 

  378. <p>Resume Data transfer (SD I/O) </p>
    379. 

  379. 

  380. </div>
    381. 

  381. </div>
    382. 

  382. </div><!-- contents -->
    383. 

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  386.   <ul>
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  387.     <li class="footer">Generated on Thu Apr 9 2020 15:49:15 for CMSIS-Driver Version 2.8.0 by Arm Ltd. All rights reserved.
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