arm_convolve_HWC_q15_fast.c 9.5 KB

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  1. /*
  2. * Copyright (C) 2010-2021 Arm Limited or its affiliates. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_convolve_HWC_q15_fast.c
  21. * Description: Fast Q15 version of convolution
  22. *
  23. * $Date: July 20, 2021
  24. * $Revision: V.1.1.2
  25. *
  26. * Target Processor: Cortex-M cores
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup groupNN
  33. */
  34. /**
  35. * @addtogroup NNConv
  36. * @{
  37. */
  38. /**
  39. * @brief Fast Q15 convolution function
  40. * @param[in] Im_in pointer to input tensor
  41. * @param[in] dim_im_in input tensor dimention
  42. * @param[in] ch_im_in number of input tensor channels
  43. * @param[in] wt pointer to kernel weights
  44. * @param[in] ch_im_out number of filters, i.e., output tensor channels
  45. * @param[in] dim_kernel filter kernel size
  46. * @param[in] padding padding sizes
  47. * @param[in] stride convolution stride
  48. * @param[in] bias pointer to bias
  49. * @param[in] bias_shift amount of left-shift for bias
  50. * @param[in] out_shift amount of right-shift for output
  51. * @param[in,out] Im_out pointer to output tensor
  52. * @param[in] dim_im_out output tensor dimension
  53. * @param[in,out] bufferA pointer to buffer space for input
  54. * @param[in,out] bufferB pointer to buffer space for output
  55. * @return The function returns either
  56. * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
  57. *
  58. * @details
  59. *
  60. * <b>Buffer size:</b>
  61. *
  62. * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
  63. *
  64. * bufferB size: 0
  65. *
  66. * <b>Input dimension constraints:</b>
  67. *
  68. * ch_im_in is multiple of 2
  69. *
  70. * ch_im_out is multiple of 2
  71. *
  72. * dim_im_out is a multiple of 2
  73. *
  74. */
  75. arm_status arm_convolve_HWC_q15_fast(const q15_t *Im_in,
  76. const uint16_t dim_im_in,
  77. const uint16_t ch_im_in,
  78. const q15_t *wt,
  79. const uint16_t ch_im_out,
  80. const uint16_t dim_kernel,
  81. const uint16_t padding,
  82. const uint16_t stride,
  83. const q15_t *bias,
  84. const uint16_t bias_shift,
  85. const uint16_t out_shift,
  86. q15_t *Im_out,
  87. const uint16_t dim_im_out,
  88. q15_t *bufferA,
  89. q7_t *bufferB)
  90. {
  91. (void)bufferB;
  92. #if defined(ARM_MATH_DSP) && !defined(ARM_MATH_MVEI)
  93. int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
  94. q15_t *pBuffer = bufferA;
  95. q15_t *im_buffer = bufferA;
  96. q15_t *pOut = Im_out;
  97. if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0 || dim_im_out & 0x1)
  98. {
  99. /* check if the input dimension meets the constraints */
  100. return ARM_MATH_SIZE_MISMATCH;
  101. }
  102. /* Run the following code for Cortex-M4 and Cortex-M7 */
  103. /* This part implements the im2col function */
  104. for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
  105. {
  106. for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
  107. {
  108. for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
  109. {
  110. for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
  111. {
  112. if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
  113. {
  114. /* arm_fill_q15(0, pBuffer, ch_im_in); */
  115. memset(pBuffer, 0, sizeof(q15_t) * ch_im_in);
  116. }
  117. else
  118. {
  119. /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer,
  120. * ch_im_in); */
  121. memcpy(pBuffer,
  122. (q15_t *)Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in,
  123. sizeof(q15_t) * ch_im_in);
  124. }
  125. pBuffer += ch_im_in;
  126. }
  127. }
  128. if (i_out_x & 0x1)
  129. {
  130. int i;
  131. /* initialize the matrix pointers for A */
  132. const q15_t *pA = wt;
  133. /* set up the second output pointers */
  134. q15_t *pOut2 = pOut + ch_im_out;
  135. /* this loop over rows in A */
  136. for (i = 0; i < ch_im_out; i += 2)
  137. {
  138. /* setup pointers for B */
  139. const q15_t *pB = im_buffer;
  140. const q15_t *pB2 = pB + ch_im_in * dim_kernel * dim_kernel;
  141. /* aling the second pointer for A */
  142. const q15_t *pA2 = pA + ch_im_in * dim_kernel * dim_kernel;
  143. /* init the sum with bias */
  144. q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
  145. q31_t sum2 = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
  146. q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
  147. q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
  148. uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 1;
  149. /* accumulate over the vector */
  150. while (colCnt)
  151. {
  152. q31_t inA1 = arm_nn_read_q15x2_ia(&pA);
  153. q31_t inB1 = arm_nn_read_q15x2_ia(&pB);
  154. q31_t inA2 = arm_nn_read_q15x2_ia(&pA2);
  155. q31_t inB2 = arm_nn_read_q15x2_ia(&pB2);
  156. sum = __SMLAD(inA1, inB1, sum);
  157. sum2 = __SMLAD(inA1, inB2, sum2);
  158. sum3 = __SMLAD(inA2, inB1, sum3);
  159. sum4 = __SMLAD(inA2, inB2, sum4);
  160. colCnt--;
  161. } /* while over colCnt */
  162. colCnt = ch_im_in * dim_kernel * dim_kernel & 0x1;
  163. while (colCnt)
  164. {
  165. q15_t inA1 = *pA++;
  166. q15_t inB1 = *pB++;
  167. q15_t inA2 = *pA2++;
  168. q15_t inB2 = *pB2++;
  169. sum += inA1 * inB1;
  170. sum2 += inA1 * inB2;
  171. sum3 += inA2 * inB1;
  172. sum4 += inA2 * inB2;
  173. colCnt--;
  174. } /* while over colCnt */
  175. *pOut++ = (q15_t)__SSAT(sum >> out_shift, 16);
  176. *pOut++ = (q15_t)__SSAT(sum3 >> out_shift, 16);
  177. *pOut2++ = (q15_t)__SSAT(sum2 >> out_shift, 16);
  178. *pOut2++ = (q15_t)__SSAT(sum4 >> out_shift, 16);
  179. /* skip the row computed with A2 */
  180. pA += ch_im_in * dim_kernel * dim_kernel;
  181. } /* for over ch_im_out */
  182. pOut += ch_im_out;
  183. /* counter reset */
  184. pBuffer = im_buffer;
  185. }
  186. }
  187. }
  188. #else
  189. (void)bufferA;
  190. /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
  191. int i, j, k, l, m, n;
  192. int conv_out;
  193. int in_row, in_col;
  194. if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
  195. {
  196. /* check if the input dimension meets the constraints */
  197. return ARM_MATH_SIZE_MISMATCH;
  198. }
  199. for (i = 0; i < ch_im_out; i++)
  200. {
  201. for (j = 0; j < dim_im_out; j++)
  202. {
  203. for (k = 0; k < dim_im_out; k++)
  204. {
  205. conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
  206. for (m = 0; m < dim_kernel; m++)
  207. {
  208. for (n = 0; n < dim_kernel; n++)
  209. {
  210. in_row = stride * j + m - padding;
  211. in_col = stride * k + n - padding;
  212. if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
  213. {
  214. for (l = 0; l < ch_im_in; l++)
  215. {
  216. conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
  217. wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
  218. }
  219. }
  220. }
  221. }
  222. Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t)__SSAT((conv_out >> out_shift), 16);
  223. }
  224. }
  225. }
  226. #endif /* ARM_MATH_DSP */
  227. /* Return to application */
  228. return ARM_MATH_SUCCESS;
  229. }
  230. /**
  231. * @} end of NNConv group
  232. */