arm_nn_mult_q7.c 3.6 KB

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  1. /*
  2. * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_nn_mult_q7.c
  21. * Description: Q7 vector multiplication with variable output shifts
  22. *
  23. * $Date: 13. July 2018
  24. * $Revision: V.1.0.0
  25. *
  26. * Target Processor: Cortex-M cores
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. /**
  31. * @ingroup groupSupport
  32. */
  33. /**
  34. * @addtogroup NNBasicMath
  35. * @{
  36. */
  37. /**
  38. * @brief Q7 vector multiplication with variable output shifts
  39. * @param[in] *pSrcA pointer to the first input vector
  40. * @param[in] *pSrcB pointer to the second input vector
  41. * @param[out] *pDst pointer to the output vector
  42. * @param[in] out_shift amount of right-shift for output
  43. * @param[in] blockSize number of samples in each vector
  44. *
  45. * <b>Scaling and Overflow Behavior:</b>
  46. * \par
  47. * The function uses saturating arithmetic.
  48. * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
  49. */
  50. void arm_nn_mult_q7(
  51. q7_t * pSrcA,
  52. q7_t * pSrcB,
  53. q7_t * pDst,
  54. const uint16_t out_shift,
  55. uint32_t blockSize)
  56. {
  57. uint32_t blkCnt; /* loop counters */
  58. #if defined (ARM_MATH_DSP)
  59. /* Run the below code for Cortex-M4 and Cortex-M3 */
  60. q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
  61. /* loop Unrolling */
  62. blkCnt = blockSize >> 2U;
  63. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  64. ** a second loop below computes the remaining 1 to 3 samples. */
  65. while (blkCnt > 0U)
  66. {
  67. /* C = A * B */
  68. /* Multiply the inputs and store the results in temporary variables */
  69. out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
  70. out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
  71. out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
  72. out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
  73. /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
  74. *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
  75. /* Decrement the blockSize loop counter */
  76. blkCnt--;
  77. }
  78. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  79. ** No loop unrolling is used. */
  80. blkCnt = blockSize % 0x4U;
  81. #else
  82. /* Run the below code for Cortex-M0 */
  83. /* Initialize blkCnt with number of samples */
  84. blkCnt = blockSize;
  85. #endif /* #if defined (ARM_MATH_DSP) */
  86. while (blkCnt > 0U)
  87. {
  88. /* C = A * B */
  89. /* Multiply the inputs and store the result in the destination buffer */
  90. *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
  91. /* Decrement the blockSize loop counter */
  92. blkCnt--;
  93. }
  94. }
  95. /**
  96. * @} end of NNBasicMath group
  97. */