Driver_USART.h 19 KB

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  1. /*
  2. * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * http://www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * $Date: 24. Nov 2014
  19. * $Revision: V2.02
  20. *
  21. * Project: USART (Universal Synchronous Asynchronous Receiver Transmitter)
  22. * Driver definitions
  23. */
  24. /* History:
  25. * Version 2.02
  26. * Corrected ARM_USART_CPOL_Pos and ARM_USART_CPHA_Pos definitions
  27. * Version 2.01
  28. * Removed optional argument parameter from Signal Event
  29. * Version 2.00
  30. * New simplified driver:
  31. * complexity moved to upper layer (especially data handling)
  32. * more unified API for different communication interfaces
  33. * renamed driver UART -> USART (Asynchronous & Synchronous)
  34. * Added modes:
  35. * Synchronous
  36. * Single-wire
  37. * IrDA
  38. * Smart Card
  39. * Changed prefix ARM_DRV -> ARM_DRIVER
  40. * Version 1.10
  41. * Namespace prefix ARM_ added
  42. * Version 1.01
  43. * Added events:
  44. * ARM_UART_EVENT_TX_EMPTY, ARM_UART_EVENT_RX_TIMEOUT
  45. * ARM_UART_EVENT_TX_THRESHOLD, ARM_UART_EVENT_RX_THRESHOLD
  46. * Added functions: SetTxThreshold, SetRxThreshold
  47. * Added "rx_timeout_event" to capabilities
  48. * Version 1.00
  49. * Initial release
  50. */
  51. #ifndef __DRIVER_USART_H
  52. #define __DRIVER_USART_H
  53. #include "Driver_Common.h"
  54. #define ARM_USART_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,02) /* API version */
  55. /****** USART Control Codes *****/
  56. #define ARM_USART_CONTROL_Pos 0
  57. #define ARM_USART_CONTROL_Msk (0xFFUL << ARM_USART_CONTROL_Pos)
  58. /*----- USART Control Codes: Mode -----*/
  59. #define ARM_USART_MODE_ASYNCHRONOUS (0x01UL << ARM_USART_CONTROL_Pos) ///< UART (Asynchronous); arg = Baudrate
  60. #define ARM_USART_MODE_SYNCHRONOUS_MASTER (0x02UL << ARM_USART_CONTROL_Pos) ///< Synchronous Master (generates clock signal); arg = Baudrate
  61. #define ARM_USART_MODE_SYNCHRONOUS_SLAVE (0x03UL << ARM_USART_CONTROL_Pos) ///< Synchronous Slave (external clock signal)
  62. #define ARM_USART_MODE_SINGLE_WIRE (0x04UL << ARM_USART_CONTROL_Pos) ///< UART Single-wire (half-duplex); arg = Baudrate
  63. #define ARM_USART_MODE_IRDA (0x05UL << ARM_USART_CONTROL_Pos) ///< UART IrDA; arg = Baudrate
  64. #define ARM_USART_MODE_SMART_CARD (0x06UL << ARM_USART_CONTROL_Pos) ///< UART Smart Card; arg = Baudrate
  65. /*----- USART Control Codes: Mode Parameters: Data Bits -----*/
  66. #define ARM_USART_DATA_BITS_Pos 8
  67. #define ARM_USART_DATA_BITS_Msk (7UL << ARM_USART_DATA_BITS_Pos)
  68. #define ARM_USART_DATA_BITS_5 (5UL << ARM_USART_DATA_BITS_Pos) ///< 5 Data bits
  69. #define ARM_USART_DATA_BITS_6 (6UL << ARM_USART_DATA_BITS_Pos) ///< 6 Data bit
  70. #define ARM_USART_DATA_BITS_7 (7UL << ARM_USART_DATA_BITS_Pos) ///< 7 Data bits
  71. #define ARM_USART_DATA_BITS_8 (0UL << ARM_USART_DATA_BITS_Pos) ///< 8 Data bits (default)
  72. #define ARM_USART_DATA_BITS_9 (1UL << ARM_USART_DATA_BITS_Pos) ///< 9 Data bits
  73. /*----- USART Control Codes: Mode Parameters: Parity -----*/
  74. #define ARM_USART_PARITY_Pos 12
  75. #define ARM_USART_PARITY_Msk (3UL << ARM_USART_PARITY_Pos)
  76. #define ARM_USART_PARITY_NONE (0UL << ARM_USART_PARITY_Pos) ///< No Parity (default)
  77. #define ARM_USART_PARITY_EVEN (1UL << ARM_USART_PARITY_Pos) ///< Even Parity
  78. #define ARM_USART_PARITY_ODD (2UL << ARM_USART_PARITY_Pos) ///< Odd Parity
  79. /*----- USART Control Codes: Mode Parameters: Stop Bits -----*/
  80. #define ARM_USART_STOP_BITS_Pos 14
  81. #define ARM_USART_STOP_BITS_Msk (3UL << ARM_USART_STOP_BITS_Pos)
  82. #define ARM_USART_STOP_BITS_1 (0UL << ARM_USART_STOP_BITS_Pos) ///< 1 Stop bit (default)
  83. #define ARM_USART_STOP_BITS_2 (1UL << ARM_USART_STOP_BITS_Pos) ///< 2 Stop bits
  84. #define ARM_USART_STOP_BITS_1_5 (2UL << ARM_USART_STOP_BITS_Pos) ///< 1.5 Stop bits
  85. #define ARM_USART_STOP_BITS_0_5 (3UL << ARM_USART_STOP_BITS_Pos) ///< 0.5 Stop bits
  86. /*----- USART Control Codes: Mode Parameters: Flow Control -----*/
  87. #define ARM_USART_FLOW_CONTROL_Pos 16
  88. #define ARM_USART_FLOW_CONTROL_Msk (3UL << ARM_USART_FLOW_CONTROL_Pos)
  89. #define ARM_USART_FLOW_CONTROL_NONE (0UL << ARM_USART_FLOW_CONTROL_Pos) ///< No Flow Control (default)
  90. #define ARM_USART_FLOW_CONTROL_RTS (1UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS Flow Control
  91. #define ARM_USART_FLOW_CONTROL_CTS (2UL << ARM_USART_FLOW_CONTROL_Pos) ///< CTS Flow Control
  92. #define ARM_USART_FLOW_CONTROL_RTS_CTS (3UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS/CTS Flow Control
  93. /*----- USART Control Codes: Mode Parameters: Clock Polarity (Synchronous mode) -----*/
  94. #define ARM_USART_CPOL_Pos 18
  95. #define ARM_USART_CPOL_Msk (1UL << ARM_USART_CPOL_Pos)
  96. #define ARM_USART_CPOL0 (0UL << ARM_USART_CPOL_Pos) ///< CPOL = 0 (default)
  97. #define ARM_USART_CPOL1 (1UL << ARM_USART_CPOL_Pos) ///< CPOL = 1
  98. /*----- USART Control Codes: Mode Parameters: Clock Phase (Synchronous mode) -----*/
  99. #define ARM_USART_CPHA_Pos 19
  100. #define ARM_USART_CPHA_Msk (1UL << ARM_USART_CPHA_Pos)
  101. #define ARM_USART_CPHA0 (0UL << ARM_USART_CPHA_Pos) ///< CPHA = 0 (default)
  102. #define ARM_USART_CPHA1 (1UL << ARM_USART_CPHA_Pos) ///< CPHA = 1
  103. /*----- USART Control Codes: Miscellaneous Controls -----*/
  104. #define ARM_USART_SET_DEFAULT_TX_VALUE (0x10UL << ARM_USART_CONTROL_Pos) ///< Set default Transmit value (Synchronous Receive only); arg = value
  105. #define ARM_USART_SET_IRDA_PULSE (0x11UL << ARM_USART_CONTROL_Pos) ///< Set IrDA Pulse in ns; arg: 0=3/16 of bit period
  106. #define ARM_USART_SET_SMART_CARD_GUARD_TIME (0x12UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Guard Time; arg = number of bit periods
  107. #define ARM_USART_SET_SMART_CARD_CLOCK (0x13UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Clock in Hz; arg: 0=Clock not generated
  108. #define ARM_USART_CONTROL_SMART_CARD_NACK (0x14UL << ARM_USART_CONTROL_Pos) ///< Smart Card NACK generation; arg: 0=disabled, 1=enabled
  109. #define ARM_USART_CONTROL_TX (0x15UL << ARM_USART_CONTROL_Pos) ///< Transmitter; arg: 0=disabled, 1=enabled
  110. #define ARM_USART_CONTROL_RX (0x16UL << ARM_USART_CONTROL_Pos) ///< Receiver; arg: 0=disabled, 1=enabled
  111. #define ARM_USART_CONTROL_BREAK (0x17UL << ARM_USART_CONTROL_Pos) ///< Continuous Break transmission; arg: 0=disabled, 1=enabled
  112. #define ARM_USART_ABORT_SEND (0x18UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Send
  113. #define ARM_USART_ABORT_RECEIVE (0x19UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Receive
  114. #define ARM_USART_ABORT_TRANSFER (0x1AUL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Transfer
  115. /****** USART specific error codes *****/
  116. #define ARM_USART_ERROR_MODE (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Mode not supported
  117. #define ARM_USART_ERROR_BAUDRATE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified baudrate not supported
  118. #define ARM_USART_ERROR_DATA_BITS (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified number of Data bits not supported
  119. #define ARM_USART_ERROR_PARITY (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Parity not supported
  120. #define ARM_USART_ERROR_STOP_BITS (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified number of Stop bits not supported
  121. #define ARM_USART_ERROR_FLOW_CONTROL (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Flow Control not supported
  122. #define ARM_USART_ERROR_CPOL (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock Polarity not supported
  123. #define ARM_USART_ERROR_CPHA (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Clock Phase not supported
  124. /**
  125. \brief USART Status
  126. */
  127. typedef struct _ARM_USART_STATUS {
  128. uint32_t tx_busy : 1; ///< Transmitter busy flag
  129. uint32_t rx_busy : 1; ///< Receiver busy flag
  130. uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation)
  131. uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation)
  132. uint32_t rx_break : 1; ///< Break detected on receive (cleared on start of next receive operation)
  133. uint32_t rx_framing_error : 1; ///< Framing error detected on receive (cleared on start of next receive operation)
  134. uint32_t rx_parity_error : 1; ///< Parity error detected on receive (cleared on start of next receive operation)
  135. } ARM_USART_STATUS;
  136. /**
  137. \brief USART Modem Control
  138. */
  139. typedef enum _ARM_USART_MODEM_CONTROL {
  140. ARM_USART_RTS_CLEAR, ///< Deactivate RTS
  141. ARM_USART_RTS_SET, ///< Activate RTS
  142. ARM_USART_DTR_CLEAR, ///< Deactivate DTR
  143. ARM_USART_DTR_SET ///< Activate DTR
  144. } ARM_USART_MODEM_CONTROL;
  145. /**
  146. \brief USART Modem Status
  147. */
  148. typedef struct _ARM_USART_MODEM_STATUS {
  149. uint32_t cts : 1; ///< CTS state: 1=Active, 0=Inactive
  150. uint32_t dsr : 1; ///< DSR state: 1=Active, 0=Inactive
  151. uint32_t dcd : 1; ///< DCD state: 1=Active, 0=Inactive
  152. uint32_t ri : 1; ///< RI state: 1=Active, 0=Inactive
  153. } ARM_USART_MODEM_STATUS;
  154. /****** USART Event *****/
  155. #define ARM_USART_EVENT_SEND_COMPLETE (1UL << 0) ///< Send completed; however USART may still transmit data
  156. #define ARM_USART_EVENT_RECEIVE_COMPLETE (1UL << 1) ///< Receive completed
  157. #define ARM_USART_EVENT_TRANSFER_COMPLETE (1UL << 2) ///< Transfer completed
  158. #define ARM_USART_EVENT_TX_COMPLETE (1UL << 3) ///< Transmit completed (optional)
  159. #define ARM_USART_EVENT_TX_UNDERFLOW (1UL << 4) ///< Transmit data not available (Synchronous Slave)
  160. #define ARM_USART_EVENT_RX_OVERFLOW (1UL << 5) ///< Receive data overflow
  161. #define ARM_USART_EVENT_RX_TIMEOUT (1UL << 6) ///< Receive character timeout (optional)
  162. #define ARM_USART_EVENT_RX_BREAK (1UL << 7) ///< Break detected on receive
  163. #define ARM_USART_EVENT_RX_FRAMING_ERROR (1UL << 8) ///< Framing error detected on receive
  164. #define ARM_USART_EVENT_RX_PARITY_ERROR (1UL << 9) ///< Parity error detected on receive
  165. #define ARM_USART_EVENT_CTS (1UL << 10) ///< CTS state changed (optional)
  166. #define ARM_USART_EVENT_DSR (1UL << 11) ///< DSR state changed (optional)
  167. #define ARM_USART_EVENT_DCD (1UL << 12) ///< DCD state changed (optional)
  168. #define ARM_USART_EVENT_RI (1UL << 13) ///< RI state changed (optional)
  169. // Function documentation
  170. /**
  171. \fn ARM_DRIVER_VERSION ARM_USART_GetVersion (void)
  172. \brief Get driver version.
  173. \return \ref ARM_DRIVER_VERSION
  174. \fn ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void)
  175. \brief Get driver capabilities
  176. \return \ref ARM_USART_CAPABILITIES
  177. \fn int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event)
  178. \brief Initialize USART Interface.
  179. \param[in] cb_event Pointer to \ref ARM_USART_SignalEvent
  180. \return \ref execution_status
  181. \fn int32_t ARM_USART_Uninitialize (void)
  182. \brief De-initialize USART Interface.
  183. \return \ref execution_status
  184. \fn int32_t ARM_USART_PowerControl (ARM_POWER_STATE state)
  185. \brief Control USART Interface Power.
  186. \param[in] state Power state
  187. \return \ref execution_status
  188. \fn int32_t ARM_USART_Send (const void *data, uint32_t num)
  189. \brief Start sending data to USART transmitter.
  190. \param[in] data Pointer to buffer with data to send to USART transmitter
  191. \param[in] num Number of data items to send
  192. \return \ref execution_status
  193. \fn int32_t ARM_USART_Receive (void *data, uint32_t num)
  194. \brief Start receiving data from USART receiver.
  195. \param[out] data Pointer to buffer for data to receive from USART receiver
  196. \param[in] num Number of data items to receive
  197. \return \ref execution_status
  198. \fn int32_t ARM_USART_Transfer (const void *data_out,
  199. void *data_in,
  200. uint32_t num)
  201. \brief Start sending/receiving data to/from USART transmitter/receiver.
  202. \param[in] data_out Pointer to buffer with data to send to USART transmitter
  203. \param[out] data_in Pointer to buffer for data to receive from USART receiver
  204. \param[in] num Number of data items to transfer
  205. \return \ref execution_status
  206. \fn uint32_t ARM_USART_GetTxCount (void)
  207. \brief Get transmitted data count.
  208. \return number of data items transmitted
  209. \fn uint32_t ARM_USART_GetRxCount (void)
  210. \brief Get received data count.
  211. \return number of data items received
  212. \fn int32_t ARM_USART_Control (uint32_t control, uint32_t arg)
  213. \brief Control USART Interface.
  214. \param[in] control Operation
  215. \param[in] arg Argument of operation (optional)
  216. \return common \ref execution_status and driver specific \ref usart_execution_status
  217. \fn ARM_USART_STATUS ARM_USART_GetStatus (void)
  218. \brief Get USART status.
  219. \return USART status \ref ARM_USART_STATUS
  220. \fn int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control)
  221. \brief Set USART Modem Control line state.
  222. \param[in] control \ref ARM_USART_MODEM_CONTROL
  223. \return \ref execution_status
  224. \fn ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void)
  225. \brief Get USART Modem Status lines state.
  226. \return modem status \ref ARM_USART_MODEM_STATUS
  227. \fn void ARM_USART_SignalEvent (uint32_t event)
  228. \brief Signal USART Events.
  229. \param[in] event \ref USART_events notification mask
  230. \return none
  231. */
  232. typedef void (*ARM_USART_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_USART_SignalEvent : Signal USART Event.
  233. /**
  234. \brief USART Device Driver Capabilities.
  235. */
  236. typedef struct _ARM_USART_CAPABILITIES {
  237. uint32_t asynchronous : 1; ///< supports UART (Asynchronous) mode
  238. uint32_t synchronous_master : 1; ///< supports Synchronous Master mode
  239. uint32_t synchronous_slave : 1; ///< supports Synchronous Slave mode
  240. uint32_t single_wire : 1; ///< supports UART Single-wire mode
  241. uint32_t irda : 1; ///< supports UART IrDA mode
  242. uint32_t smart_card : 1; ///< supports UART Smart Card mode
  243. uint32_t smart_card_clock : 1; ///< Smart Card Clock generator available
  244. uint32_t flow_control_rts : 1; ///< RTS Flow Control available
  245. uint32_t flow_control_cts : 1; ///< CTS Flow Control available
  246. uint32_t event_tx_complete : 1; ///< Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE
  247. uint32_t event_rx_timeout : 1; ///< Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT
  248. uint32_t rts : 1; ///< RTS Line: 0=not available, 1=available
  249. uint32_t cts : 1; ///< CTS Line: 0=not available, 1=available
  250. uint32_t dtr : 1; ///< DTR Line: 0=not available, 1=available
  251. uint32_t dsr : 1; ///< DSR Line: 0=not available, 1=available
  252. uint32_t dcd : 1; ///< DCD Line: 0=not available, 1=available
  253. uint32_t ri : 1; ///< RI Line: 0=not available, 1=available
  254. uint32_t event_cts : 1; ///< Signal CTS change event: \ref ARM_USART_EVENT_CTS
  255. uint32_t event_dsr : 1; ///< Signal DSR change event: \ref ARM_USART_EVENT_DSR
  256. uint32_t event_dcd : 1; ///< Signal DCD change event: \ref ARM_USART_EVENT_DCD
  257. uint32_t event_ri : 1; ///< Signal RI change event: \ref ARM_USART_EVENT_RI
  258. } ARM_USART_CAPABILITIES;
  259. /**
  260. \brief Access structure of the USART Driver.
  261. */
  262. typedef struct _ARM_DRIVER_USART {
  263. ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USART_GetVersion : Get driver version.
  264. ARM_USART_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USART_GetCapabilities : Get driver capabilities.
  265. int32_t (*Initialize) (ARM_USART_SignalEvent_t cb_event); ///< Pointer to \ref ARM_USART_Initialize : Initialize USART Interface.
  266. int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USART_Uninitialize : De-initialize USART Interface.
  267. int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USART_PowerControl : Control USART Interface Power.
  268. int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Send : Start sending data to USART transmitter.
  269. int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Receive : Start receiving data from USART receiver.
  270. int32_t (*Transfer) (const void *data_out,
  271. void *data_in,
  272. uint32_t num); ///< Pointer to \ref ARM_USART_Transfer : Start sending/receiving data to/from USART.
  273. uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_USART_GetTxCount : Get transmitted data count.
  274. uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_USART_GetRxCount : Get received data count.
  275. int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_USART_Control : Control USART Interface.
  276. ARM_USART_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_USART_GetStatus : Get USART status.
  277. int32_t (*SetModemControl) (ARM_USART_MODEM_CONTROL control); ///< Pointer to \ref ARM_USART_SetModemControl : Set USART Modem Control line state.
  278. ARM_USART_MODEM_STATUS (*GetModemStatus) (void); ///< Pointer to \ref ARM_USART_GetModemStatus : Get USART Modem Status lines state.
  279. } const ARM_DRIVER_USART;
  280. #endif /* __DRIVER_USART_H */