ARM-software
/
CMSIS_5
kopia lustrzana https://github-proxy.rt-thread.io/ARM-software/CMSIS_5.git


			
				
					
						
						
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<title>CMSIS-Core (Cortex-A): Globals</title>
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   <div id="projectname">CMSIS-Core (Cortex-A)
   &#160;<span id="projectnumber">Version 1.1.3</span>
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   <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div>
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<div class="contents">
<div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>

<h3><a class="anchor" id="index_a"></a>- a -</h3><ul>
<li>AACI_IRQn
: <a class="el" href="ARMCA9_8h.html#a7e1129cd8a196f4284d41db3e82ad5c8a4c72e4cbe9ce6bae3d29332139dad44a">ARMCA9.h</a>
</li>
<li>ABT_MODE
: <a class="el" href="startup__ARMCA9_8c.html#a71f290cd91ad5ba6e3e183306fd9a0cb">startup_ARMCA9.c</a>
</li>
<li>ACTLR_AOW_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5ca6754c31f90c7e5d1822dddfb4135c">core_ca.h</a>
</li>
<li>ACTLR_AOW_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga633ee6b129f8668593687ab8537aeb7f">core_ca.h</a>
</li>
<li>ACTLR_BP_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga677211818d8a2c7b118115361fbef2e7">core_ca.h</a>
</li>
<li>ACTLR_BP_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga120f5d653af52bd711c27c2495ce78f6">core_ca.h</a>
</li>
<li>ACTLR_BTDIS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gad48e0a1c1e59e6721547b45f37baa48b">core_ca.h</a>
</li>
<li>ACTLR_BTDIS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8c81a1e1522400322f215c52ca80d47d">core_ca.h</a>
</li>
<li>ACTLR_DBDI_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0a3d58754927731758c53bd945ac35fe">core_ca.h</a>
</li>
<li>ACTLR_DBDI_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga0367a8413c0a37d6c1de7b90f3a56aee">core_ca.h</a>
</li>
<li>ACTLR_DDI_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaeee8e0fc7b28f2a405b234e7d2c7486e">core_ca.h</a>
</li>
<li>ACTLR_DDI_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga5468e93550ce28af7114cbc1e19474c0">core_ca.h</a>
</li>
<li>ACTLR_DDVM_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4565f2632e5c4be5e1d3eb90fa6f2ac6">core_ca.h</a>
</li>
<li>ACTLR_DDVM_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaa9fe7651aa9bb48eea4f5301c69ee54d">core_ca.h</a>
</li>
<li>ACTLR_DODMBS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga88a85e6310334edb190a6e9298ae98b7">core_ca.h</a>
</li>
<li>ACTLR_DODMBS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga96eb411770c8e2b87f5e62b95e50ee02">core_ca.h</a>
</li>
<li>ACTLR_DWBST_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gab948ab9af88a9357e2e383d948e9dc7e">core_ca.h</a>
</li>
<li>ACTLR_DWBST_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4ca2a9236b157d3f9405cf8c398897a2">core_ca.h</a>
</li>
<li>ACTLR_EXCL_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8b704419a7ed130ecbee00de9fd72d55">core_ca.h</a>
</li>
<li>ACTLR_EXCL_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga17dcfbcdf5db82900354db5440699701">core_ca.h</a>
</li>
<li>ACTLR_FW_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga53ea0cfa2dd5cb51d9f9de21e4d2dbf1">core_ca.h</a>
</li>
<li>ACTLR_FW_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga89b1a661668534177bc9679149a692ce">core_ca.h</a>
</li>
<li>ACTLR_L1PCTL_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gad701fa3ff69b89ba185b7482e81cb6fd">core_ca.h</a>
</li>
<li>ACTLR_L1PCTL_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga546f1f2bbf7344bad6522205257f17ae">core_ca.h</a>
</li>
<li>ACTLR_L1PE_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga969c20495fe3e50e8c2a73454688a674">core_ca.h</a>
</li>
<li>ACTLR_L1PE_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga65c3c81261a2aa26022f6bb967c4e56b">core_ca.h</a>
</li>
<li>ACTLR_L1RADIS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga6aafd83ca6c02f705def8edc8c064c04">core_ca.h</a>
</li>
<li>ACTLR_L1RADIS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf8b306b854ecd78110cf944d414644a1">core_ca.h</a>
</li>
<li>ACTLR_L2RADIS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gad84b20f4f5d1979bb000a14a582cad12">core_ca.h</a>
</li>
<li>ACTLR_L2RADIS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga505f33bbe45bbcaa9fcb738cb30daf4e">core_ca.h</a>
</li>
<li>ACTLR_PARITY_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gadec8e5d68791dc4749bf3f075a3559fb">core_ca.h</a>
</li>
<li>ACTLR_PARITY_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8300a65b41aa3f5c69c7cc713c847749">core_ca.h</a>
</li>
<li>ACTLR_RADIS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6aea849e5320c0e93321d5d8b0c117c">core_ca.h</a>
</li>
<li>ACTLR_RADIS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gaf7a424f7f8c4f46592ce8f47f4bced44">core_ca.h</a>
</li>
<li>ACTLR_RSDIS_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8487babc3514e2bb8f3d524e5f80d95f">core_ca.h</a>
</li>
<li>ACTLR_RSDIS_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga4412a55ce52db3c5a4f035fcd0e350c6">core_ca.h</a>
</li>
<li>ACTLR_SMP_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gac6dcc315f6c4527434b9b0e4106771d8">core_ca.h</a>
</li>
<li>ACTLR_SMP_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga8cb19db067cca1e064189b27b1f1bcbf">core_ca.h</a>
</li>
<li>ACTLR_WFLZM_Msk
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#gae5a89cb553773b10e86a9c826f11179f">core_ca.h</a>
</li>
<li>ACTLR_WFLZM_Pos
: <a class="el" href="group__CMSIS__ACTLR__BITS.html#ga104112fe1d88dde49635e9b0f9530306">core_ca.h</a>
</li>
</ul>
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    <li class="footer">Generated on Mon Mar 18 2019 16:05:30 for CMSIS-Core (Cortex-A) by Arm Ltd. All rights reserved.
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