FPGA.cpp 19 KB

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  1. /* ----------------------------------------------------------------------
  2. * Project: CMSIS DSP Library
  3. * Title: FPGA.cpp
  4. * Description: FPGA
  5. *
  6. * IO implementation for constrained platforms where
  7. * inputs are contained in a header files and output is
  8. * only stdout.
  9. *
  10. * $Date: 20. June 2019
  11. * $Revision: V1.0.0
  12. *
  13. * Target Processor: Cortex-M cores
  14. * -------------------------------------------------------------------- */
  15. /*
  16. * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  17. *
  18. * SPDX-License-Identifier: Apache-2.0
  19. *
  20. * Licensed under the Apache License, Version 2.0 (the License); you may
  21. * not use this file except in compliance with the License.
  22. * You may obtain a copy of the License at
  23. *
  24. * www.apache.org/licenses/LICENSE-2.0
  25. *
  26. * Unless required by applicable law or agreed to in writing, software
  27. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  28. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  29. * See the License for the specific language governing permissions and
  30. * limitations under the License.
  31. */
  32. #include "Test.h"
  33. #include <string>
  34. #include <cstddef>
  35. #include "FPGA.h"
  36. #include <stdio.h>
  37. #include <string.h>
  38. #include "Generators.h"
  39. namespace Client
  40. {
  41. struct offsetOrGen
  42. {
  43. int kind;
  44. unsigned long offset;
  45. Testing::param_t *data;
  46. Testing::nbSamples_t nbInputSamples;
  47. Testing::nbSamples_t nbOutputSamples;
  48. int dimensions;
  49. };
  50. FPGA::FPGA(const char *testDesc,const char *patterns)
  51. {
  52. this->m_testDesc=testDesc;
  53. this->m_patterns=patterns;
  54. this->currentDesc=testDesc;
  55. this->path=new std::vector<std::string>();
  56. this->patternOffsets=new std::vector<unsigned long>();
  57. this->patternSizes=new std::vector<unsigned long>();
  58. this->parameterOffsets=new std::vector<struct offsetOrGen>();
  59. this->parameterSizes=new std::vector<unsigned long>();
  60. this->outputNames=new std::vector<std::string>();
  61. }
  62. void FPGA::DeleteParams()
  63. {
  64. for (std::vector<struct offsetOrGen>::iterator it = this->parameterOffsets->begin() ; it != this->parameterOffsets->end(); ++it)
  65. {
  66. if (it->kind==1)
  67. {
  68. if (it->data)
  69. {
  70. free(it->data);
  71. it->data = NULL;
  72. }
  73. }
  74. }
  75. }
  76. FPGA::~FPGA()
  77. {
  78. delete(this->path);
  79. delete(this->patternOffsets);
  80. delete(this->patternSizes);
  81. this->DeleteParams();
  82. delete(this->parameterOffsets);
  83. delete(this->parameterSizes);
  84. delete(this->outputNames);
  85. }
  86. /** Read word 32 from C array
  87. */
  88. void FPGA::read32(unsigned long *r)
  89. {
  90. unsigned char a,b,c,d;
  91. unsigned long v;
  92. a = *this->currentDesc++;
  93. b = *this->currentDesc++;
  94. c = *this->currentDesc++;
  95. d = *this->currentDesc++;
  96. //printf("%d %d %d %d\n",a,b,c,d);
  97. v = a | (b << 8) | (c << 16) | (d << 24);
  98. *r = v;
  99. }
  100. /** Read null terminated C string C array
  101. */
  102. void FPGA::readStr(char *str)
  103. {
  104. char *p = str;
  105. while(*this->currentDesc != 0)
  106. {
  107. *p++ = *this->currentDesc++;
  108. }
  109. *p++ = 0;
  110. this->currentDesc++;
  111. }
  112. void FPGA::readChar(char *c)
  113. {
  114. *c = *this->currentDesc;
  115. this->currentDesc++;
  116. }
  117. /** Get output path from output ID
  118. */
  119. std::string FPGA::getOutputPath(Testing::outputID_t id)
  120. {
  121. char fmt[256];
  122. std::string tmp;
  123. tmp += this->testDir;
  124. sprintf(fmt,"/%s_%ld.txt",(*this->outputNames)[id].c_str(),this->currentId);
  125. tmp += std::string(fmt);
  126. //printf("%s\n",tmp.c_str());
  127. return(tmp);
  128. }
  129. /** Read the number of parameters for all the tests in a suite
  130. Used for benchmarking. Same functions executed with
  131. different initializations controlled by the parameters.
  132. */
  133. Testing::nbParameters_t FPGA::ReadNbParameters()
  134. {
  135. unsigned long nb;
  136. this->read32(&nb);
  137. return(nb);
  138. }
  139. void FPGA::ReadTestIdentification()
  140. {
  141. char tmp[255];
  142. unsigned long kind;
  143. unsigned long theId;
  144. char hasPath;
  145. char hasParamID;
  146. Testing::PatternID_t paramID;
  147. //printf("Read ident\n");
  148. this->read32(&kind);
  149. this->read32(&theId);
  150. this->readChar(&hasParamID);
  151. this->m_hasParam=false;
  152. if (hasParamID == 'y')
  153. {
  154. this->m_hasParam=true;
  155. this->read32(&paramID);
  156. this->currentParam=paramID;
  157. }
  158. this->readChar(&hasPath);
  159. if (hasPath == 'y')
  160. {
  161. this->readStr(tmp);
  162. //printf("-->%s\n",tmp);
  163. currentPath.assign(tmp);
  164. }
  165. this->currentKind=kind;
  166. this->currentId=theId;
  167. switch(kind)
  168. {
  169. case 1:
  170. printf("S: t \n");
  171. break;
  172. case 2:
  173. printf("S: s %ld\n",this->currentId);
  174. break;
  175. case 3:
  176. printf("S: g %ld\n",this->currentId);
  177. break;
  178. default:
  179. printf("S: u\n");
  180. }
  181. //printf("End read ident\n\n");
  182. }
  183. void FPGA::recomputeTestDir()
  184. {
  185. this->testDir = ".";
  186. int start = 1;
  187. std::vector<std::string>::const_iterator iter;
  188. for (iter = this->path->begin(); iter != this->path->end(); ++iter)
  189. {
  190. if (start)
  191. {
  192. this->testDir = *iter;
  193. start =0;
  194. }
  195. else
  196. {
  197. if (!(*iter).empty())
  198. {
  199. this->testDir += "/" + *iter;
  200. }
  201. }
  202. }
  203. }
  204. void FPGA::ReadIdentification()
  205. {
  206. this->ReadTestIdentification();
  207. this->path->push_back(currentPath);
  208. this->recomputeTestDir();
  209. }
  210. /** There is only stdout available for "FPGA".
  211. So status output and data output are interleaved.
  212. Status is starting with "S: "
  213. */
  214. void FPGA::DispStatus(Testing::TestStatus status
  215. ,Testing::errorID_t error
  216. ,unsigned long lineNb
  217. ,Testing::cycles_t cycles)
  218. {
  219. if (status == Testing::kTestFailed)
  220. {
  221. printf("S: %ld %ld %ld 0 N\n",this->currentId,error,lineNb);
  222. }
  223. else
  224. {
  225. printf("S: %ld 0 0 %u Y\n",this->currentId, cycles);
  226. }
  227. }
  228. void FPGA::EndGroup()
  229. {
  230. printf("S: p\n");
  231. this->path->pop_back();
  232. }
  233. /** Read pattern list
  234. Different from semihosting.
  235. We read offset and sizes for the patterns
  236. rather than file names.
  237. */
  238. void FPGA::ReadPatternList()
  239. {
  240. unsigned long offset,nb;
  241. unsigned long nbPatterns;
  242. this->read32(&nbPatterns);
  243. this->patternOffsets->clear();
  244. this->patternSizes->clear();
  245. std::string tmpstr;
  246. for(int i=0;i<nbPatterns;i++)
  247. {
  248. this->read32(&offset);
  249. this->read32(&nb);
  250. this->patternOffsets->push_back(offset);
  251. this->patternSizes->push_back(nb);
  252. }
  253. }
  254. /** Read parameters list
  255. Different from semihosting.
  256. We read offset and sizes for the parameters
  257. rather than file names.
  258. */
  259. void FPGA::ReadParameterList(Testing::nbParameters_t nbParams)
  260. {
  261. unsigned long offset,nb;
  262. unsigned long nbValues;
  263. char paramKind;
  264. this->read32(&nbValues);
  265. this->DeleteParams();
  266. this->parameterOffsets->clear();
  267. this->parameterSizes->clear();
  268. std::string tmpstr;
  269. for(int i=0;i<nbValues;i++)
  270. {
  271. this->readChar(&paramKind);
  272. struct offsetOrGen gen;
  273. if (paramKind == 'p')
  274. {
  275. gen.kind=0;
  276. this->read32(&offset);
  277. this->read32(&nb);
  278. gen.offset=offset;
  279. gen.kind=0;
  280. gen.nbInputSamples=nb;
  281. gen.dimensions = nbParams;
  282. }
  283. else
  284. {
  285. unsigned long kind,nbInputSamples,nbOutputSamples,dimensions,len,sample;
  286. Testing::param_t *p,*current;
  287. size_t length;
  288. // Generator kind
  289. this->read32(&kind);
  290. this->read32(&nbInputSamples);
  291. this->read32(&nbOutputSamples);
  292. this->read32(&dimensions);
  293. p=(Testing::param_t*)malloc(sizeof(Testing::param_t)*(nbInputSamples));
  294. current=p;
  295. for(int i=0;i < nbInputSamples; i ++)
  296. {
  297. this->read32(&sample);
  298. *current++ = (Testing::param_t)sample;
  299. }
  300. gen.kind=1;
  301. gen.data=p;
  302. gen.nbInputSamples = nbInputSamples;
  303. gen.nbOutputSamples = nbOutputSamples;
  304. gen.dimensions = dimensions;
  305. }
  306. this->parameterOffsets->push_back(gen);
  307. this->parameterSizes->push_back(nb);
  308. }
  309. }
  310. void FPGA::ReadOutputList()
  311. {
  312. char tmp[256];
  313. unsigned long nbOutputs;
  314. this->read32(&nbOutputs);
  315. this->outputNames->clear();
  316. std::string tmpstr;
  317. for(int i=0;i<nbOutputs;i++)
  318. {
  319. this->readStr(tmp);
  320. tmpstr.assign(tmp);
  321. this->outputNames->push_back(tmpstr);
  322. }
  323. }
  324. unsigned long FPGA::getPatternOffset(Testing::PatternID_t id)
  325. {
  326. return((*this->patternOffsets)[id]);
  327. }
  328. Testing::nbSamples_t FPGA::GetPatternSize(Testing::PatternID_t id)
  329. {
  330. return((Testing::nbSamples_t)((*this->patternSizes)[id]));
  331. }
  332. unsigned long FPGA::getParameterOffset(Testing::PatternID_t id)
  333. {
  334. return((*this->parameterOffsets)[id].offset);
  335. }
  336. struct offsetOrGen FPGA::getParameterDesc(Testing::PatternID_t id)
  337. {
  338. return((*this->parameterOffsets)[id]);
  339. }
  340. void FPGA::DumpParams(std::vector<Testing::param_t>& params)
  341. {
  342. bool begin=true;
  343. printf("b ");
  344. for(std::vector<Testing::param_t>::iterator it = params.begin(); it != params.end(); ++it)
  345. {
  346. if (!begin)
  347. {
  348. printf(",");
  349. }
  350. printf("%d",*it);
  351. begin=false;
  352. }
  353. printf("\n");
  354. }
  355. Testing::param_t* FPGA::ImportParams(Testing::PatternID_t id,Testing::nbParameterEntries_t &nbEntries)
  356. {
  357. nbEntries=0;
  358. unsigned long offset,i;
  359. Testing::param_t *p;
  360. uint32_t val;
  361. Testing::nbSamples_t len;
  362. struct offsetOrGen gen = this->getParameterDesc(id);
  363. if (gen.kind == 0)
  364. {
  365. offset=gen.offset;
  366. nbEntries = gen.nbInputSamples / gen.dimensions;
  367. const char *patternStart = this->m_patterns + offset;
  368. return((Testing::param_t*)patternStart);
  369. }
  370. else
  371. {
  372. Testing::param_t* result;
  373. // Output samples is number of parameter line
  374. len=gen.nbOutputSamples * gen.dimensions;
  375. result=(Testing::param_t*)malloc(len*sizeof(Testing::param_t));
  376. switch(gen.dimensions)
  377. {
  378. case 1:
  379. generate1(result,gen.data,nbEntries);
  380. break;
  381. case 2:
  382. generate2(result,gen.data,nbEntries);
  383. break;
  384. case 3:
  385. generate3(result,gen.data,nbEntries);
  386. break;
  387. case 4:
  388. generate4(result,gen.data,nbEntries);
  389. break;
  390. default:
  391. generate1(result,gen.data,nbEntries);
  392. break;
  393. }
  394. return(result);
  395. }
  396. }
  397. bool FPGA::hasParam()
  398. {
  399. return(this->m_hasParam);
  400. }
  401. Testing::PatternID_t FPGA::getParamID()
  402. {
  403. return(this->currentParam);
  404. }
  405. void FPGA::ImportPattern_f64(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  406. {
  407. unsigned long offset,i;
  408. offset=this->getPatternOffset(id);
  409. const char *patternStart = this->m_patterns + offset;
  410. const float64_t *src = (const float64_t*)patternStart;
  411. float64_t *dst = (float64_t*)p;
  412. for(i=0; i < nb; i++)
  413. {
  414. *dst++ = *src++;
  415. }
  416. }
  417. void FPGA::ImportPattern_f32(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  418. {
  419. unsigned long offset,i;
  420. offset=this->getPatternOffset(id);
  421. const char *patternStart = this->m_patterns + offset;
  422. const float32_t *src = (const float32_t*)patternStart;
  423. float32_t *dst = (float32_t*)p;
  424. for(i=0; i < nb; i++)
  425. {
  426. *dst++ = *src++;
  427. }
  428. }
  429. void FPGA::ImportPattern_q31(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  430. {
  431. unsigned long offset,i;
  432. offset=this->getPatternOffset(id);
  433. const char *patternStart = this->m_patterns + offset;
  434. const q31_t *src = (const q31_t*)patternStart;
  435. q31_t *dst = (q31_t*)p;
  436. for(i=0; i < nb; i++)
  437. {
  438. *dst++ = *src++;
  439. }
  440. }
  441. void FPGA::ImportPattern_q15(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  442. {
  443. unsigned long offset,i;
  444. offset=this->getPatternOffset(id);
  445. const char *patternStart = this->m_patterns + offset;
  446. const q15_t *src = (const q15_t*)patternStart;
  447. q15_t *dst = (q15_t*)p;
  448. for(i=0; i < nb; i++)
  449. {
  450. *dst++ = *src++;
  451. }
  452. }
  453. void FPGA::ImportPattern_q7(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  454. {
  455. unsigned long offset,i;
  456. offset=this->getPatternOffset(id);
  457. const char *patternStart = this->m_patterns + offset;
  458. const q7_t *src = (const q7_t*)patternStart;
  459. q7_t *dst = (q7_t*)p;
  460. for(i=0; i < nb; i++)
  461. {
  462. *dst++ = *src++;
  463. }
  464. }
  465. void FPGA::ImportPattern_u32(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  466. {
  467. unsigned long offset,i;
  468. offset=this->getPatternOffset(id);
  469. const char *patternStart = this->m_patterns + offset;
  470. const uint32_t *src = (const uint32_t*)patternStart;
  471. uint32_t *dst = (uint32_t*)p;
  472. for(i=0; i < nb; i++)
  473. {
  474. *dst++ = *src++;
  475. }
  476. }
  477. void FPGA::ImportPattern_u16(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  478. {
  479. unsigned long offset,i;
  480. offset=this->getPatternOffset(id);
  481. const char *patternStart = this->m_patterns + offset;
  482. const uint16_t *src = (const uint16_t*)patternStart;
  483. uint16_t *dst = (uint16_t*)p;
  484. for(i=0; i < nb; i++)
  485. {
  486. *dst++ = *src++;
  487. }
  488. }
  489. void FPGA::ImportPattern_u8(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb)
  490. {
  491. unsigned long offset,i;
  492. offset=this->getPatternOffset(id);
  493. const char *patternStart = this->m_patterns + offset;
  494. const uint8_t *src = (const uint8_t*)patternStart;
  495. uint8_t *dst = (uint8_t*)p;
  496. for(i=0; i < nb; i++)
  497. {
  498. *dst++ = *src++;
  499. }
  500. }
  501. /** Dump patterns.
  502. There is only stdout available for "FPGA".
  503. So status output and data output are interleaved.
  504. Data is starting with "D: "
  505. */
  506. void FPGA::DumpPattern_f64(Testing::outputID_t id,Testing::nbSamples_t nb, float64_t* data)
  507. {
  508. std::string fileName = this->getOutputPath(id);
  509. printf("D: %s\n",fileName.c_str());
  510. Testing::nbSamples_t i=0;
  511. uint64_t t;
  512. float64_t v;
  513. for(i=0; i < nb; i++)
  514. {
  515. v = data[i];
  516. t = TOINT64(v);
  517. printf("D: 0x%016llx\n",t);
  518. }
  519. printf("D: END\n");
  520. }
  521. void FPGA::DumpPattern_f32(Testing::outputID_t id,Testing::nbSamples_t nb, float32_t* data)
  522. {
  523. std::string fileName = this->getOutputPath(id);
  524. printf("D: %s\n",fileName.c_str());
  525. Testing::nbSamples_t i=0;
  526. uint32_t t;
  527. float32_t v;
  528. for(i=0; i < nb; i++)
  529. {
  530. v = data[i];
  531. t = TOINT32(v);
  532. printf("D: 0x%08x\n",t);
  533. }
  534. printf("D: END\n");
  535. }
  536. void FPGA::DumpPattern_q31(Testing::outputID_t id,Testing::nbSamples_t nb, q31_t* data)
  537. {
  538. std::string fileName = this->getOutputPath(id);
  539. printf("D: %s\n",fileName.c_str());
  540. Testing::nbSamples_t i=0;
  541. uint32_t t;
  542. q31_t v;
  543. for(i=0; i < nb; i++)
  544. {
  545. v = data[i];
  546. t = (uint32_t)v;
  547. printf("D: 0x%08x\n",t);
  548. }
  549. printf("D: END\n");
  550. }
  551. void FPGA::DumpPattern_q15(Testing::outputID_t id,Testing::nbSamples_t nb, q15_t* data)
  552. {
  553. std::string fileName = this->getOutputPath(id);
  554. printf("D: %s\n",fileName.c_str());
  555. Testing::nbSamples_t i=0;
  556. uint32_t t;
  557. q15_t v;
  558. for(i=0; i < nb; i++)
  559. {
  560. v = data[i];
  561. t = (uint32_t)v;
  562. printf("D: 0x%08x\n",t);
  563. }
  564. printf("D: END\n");
  565. }
  566. void FPGA::DumpPattern_q7(Testing::outputID_t id,Testing::nbSamples_t nb, q7_t* data)
  567. {
  568. std::string fileName = this->getOutputPath(id);
  569. printf("D: %s\n",fileName.c_str());
  570. Testing::nbSamples_t i=0;
  571. uint32_t t;
  572. q7_t v;
  573. for(i=0; i < nb; i++)
  574. {
  575. v = data[i];
  576. t = (uint32_t)v;
  577. printf("D: 0x%08x\n",t);
  578. }
  579. printf("D: END\n");
  580. }
  581. void FPGA::DumpPattern_u32(Testing::outputID_t id,Testing::nbSamples_t nb, uint32_t* data)
  582. {
  583. std::string fileName = this->getOutputPath(id);
  584. printf("D: %s\n",fileName.c_str());
  585. Testing::nbSamples_t i=0;
  586. uint32_t t;
  587. uint32_t v;
  588. for(i=0; i < nb; i++)
  589. {
  590. v = data[i];
  591. t = (uint32_t)v;
  592. printf("D: 0x%08x\n",t);
  593. }
  594. printf("D: END\n");
  595. }
  596. void FPGA::DumpPattern_u16(Testing::outputID_t id,Testing::nbSamples_t nb, uint16_t* data)
  597. {
  598. std::string fileName = this->getOutputPath(id);
  599. printf("D: %s\n",fileName.c_str());
  600. Testing::nbSamples_t i=0;
  601. uint32_t t;
  602. uint16_t v;
  603. for(i=0; i < nb; i++)
  604. {
  605. v = data[i];
  606. t = (uint32_t)v;
  607. printf("D: 0x%08x\n",t);
  608. }
  609. printf("D: END\n");
  610. }
  611. void FPGA::DumpPattern_u8(Testing::outputID_t id,Testing::nbSamples_t nb, uint8_t* data)
  612. {
  613. std::string fileName = this->getOutputPath(id);
  614. printf("D: %s\n",fileName.c_str());
  615. Testing::nbSamples_t i=0;
  616. uint32_t t;
  617. uint8_t v;
  618. for(i=0; i < nb; i++)
  619. {
  620. v = data[i];
  621. t = (uint32_t)v;
  622. printf("D: 0x%08x\n",t);
  623. }
  624. printf("D: END\n");
  625. }
  626. Testing::testID_t FPGA::CurrentTestID()
  627. {
  628. return(this->currentId);
  629. }
  630. }