arm_depthwise_conv_s8.c 12 KB

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  1. /*
  2. * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_depthwise_conv_s8.c
  21. * Description: s8 version of depthwise convolution.
  22. *
  23. * $Date: March 4, 2020
  24. * $Revision: V.1.0.1
  25. *
  26. * Target Processor: Cortex-M cores
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_math.h"
  30. #include "arm_nnfunctions.h"
  31. #include "arm_nnsupportfunctions.h"
  32. /**
  33. * @ingroup groupNN
  34. */
  35. /**
  36. * @addtogroup NNConv
  37. * @{
  38. */
  39. static void depthwise_conv_s8_mult_4(const int8_t *input,
  40. const int32_t input_x,
  41. const int32_t input_y,
  42. const int32_t input_ch,
  43. const int8_t *kernel,
  44. const int32_t output_ch,
  45. const int32_t ch_mult,
  46. const int32_t kernel_x,
  47. const int32_t kernel_y,
  48. const int32_t pad_x,
  49. const int32_t pad_y,
  50. const int32_t stride_x,
  51. const int32_t stride_y,
  52. const int32_t *bias,
  53. int8_t *output,
  54. const int32_t *output_shift,
  55. const int32_t *output_mult,
  56. const int32_t output_x,
  57. const int32_t output_y,
  58. const int32_t output_offset,
  59. const int32_t input_offset,
  60. const int32_t output_activation_min,
  61. const int32_t output_activation_max)
  62. {
  63. for(int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h)
  64. {
  65. for(int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w)
  66. {
  67. for(int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch; ++in_ch, out_ch += ch_mult)
  68. {
  69. for(int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4)
  70. {
  71. int32_t out_buff0 = bias[out_ch + 0 + mult_tile];
  72. int32_t out_buff1 = bias[out_ch + 1 + mult_tile];
  73. int32_t out_buff2 = bias[out_ch + 2 + mult_tile];
  74. int32_t out_buff3 = bias[out_ch + 3 + mult_tile];
  75. for(int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h)
  76. {
  77. int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch;
  78. int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch;
  79. for(int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w); ++ker_w, ker_idx += output_ch)
  80. {
  81. int32_t in_val = input[in_idx + ker_w * input_ch] + input_offset;
  82. out_buff0 += in_val * kernel[ker_idx + 0 + mult_tile];
  83. out_buff1 += in_val * kernel[ker_idx + 1 + mult_tile];
  84. out_buff2 += in_val * kernel[ker_idx + 2 + mult_tile];
  85. out_buff3 += in_val * kernel[ker_idx + 3 + mult_tile];
  86. }
  87. }
  88. out_buff0 = arm_nn_requantize(out_buff0, output_mult[out_ch + 0 + mult_tile], output_shift[out_ch + 0 + mult_tile]);
  89. out_buff1 = arm_nn_requantize(out_buff1, output_mult[out_ch + 1 + mult_tile], output_shift[out_ch + 1 + mult_tile]);
  90. out_buff2 = arm_nn_requantize(out_buff2, output_mult[out_ch + 2 + mult_tile], output_shift[out_ch + 2 + mult_tile]);
  91. out_buff3 = arm_nn_requantize(out_buff3, output_mult[out_ch + 3 + mult_tile], output_shift[out_ch + 3 + mult_tile]);
  92. out_buff0 += output_offset;
  93. out_buff1 += output_offset;
  94. out_buff2 += output_offset;
  95. out_buff3 += output_offset;
  96. out_buff0 = MIN(MAX(out_buff0, output_activation_min), output_activation_max);
  97. out_buff1 = MIN(MAX(out_buff1, output_activation_min), output_activation_max);
  98. out_buff2 = MIN(MAX(out_buff2, output_activation_min), output_activation_max);
  99. out_buff3 = MIN(MAX(out_buff3, output_activation_min), output_activation_max);
  100. output[out_idx++] = (int8_t)out_buff0;
  101. output[out_idx++] = (int8_t)out_buff1;
  102. output[out_idx++] = (int8_t)out_buff2;
  103. output[out_idx++] = (int8_t)out_buff3;
  104. }
  105. }
  106. }
  107. }
  108. }
  109. static void depthwise_conv_s8_generic(const q7_t *input,
  110. const uint16_t input_x,
  111. const uint16_t input_y,
  112. const uint16_t input_ch,
  113. const q7_t *kernel,
  114. const uint16_t output_ch,
  115. const uint16_t ch_mult,
  116. const uint16_t kernel_x,
  117. const uint16_t kernel_y,
  118. const uint16_t pad_x,
  119. const uint16_t pad_y,
  120. const uint16_t stride_x,
  121. const uint16_t stride_y,
  122. const int32_t *bias,
  123. q7_t *output,
  124. const int32_t *output_shift,
  125. const int32_t *output_mult,
  126. const uint16_t output_x,
  127. const uint16_t output_y,
  128. const int32_t output_offset,
  129. const int32_t input_offset,
  130. const int32_t output_activation_min,
  131. const int32_t output_activation_max)
  132. {
  133. (void)output_ch;
  134. int i_out = 0;
  135. for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
  136. {
  137. const int16_t base_idx_y = (i_out_y * stride_y) - pad_y;
  138. for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
  139. {
  140. const int16_t base_idx_x = (i_out_x * stride_x) - pad_x;
  141. for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++)
  142. {
  143. for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++)
  144. {
  145. const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult;
  146. int32_t acc_0;
  147. /* Condition for kernel start dimension: (base_idx_<x,y> + ker_<x,y>_start) >= 0 */
  148. const int ker_y_start = MAX(0, -base_idx_y);
  149. const int ker_x_start = MAX(0, -base_idx_x);
  150. /* Condition for kernel end dimension: (base_idx_<x,y> + ker_<x,y>_end) < input_<x,y> */
  151. const int ker_y_end = MIN(kernel_y, input_y - base_idx_y);
  152. const int ker_x_end = MIN(kernel_x, input_x - base_idx_x);
  153. acc_0 = bias[idx_out_ch];
  154. for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++)
  155. {
  156. const int32_t idx_y = base_idx_y + i_ker_y;
  157. for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++)
  158. {
  159. const int32_t idx_x = base_idx_x + i_ker_x;
  160. int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch;
  161. int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch;
  162. acc_0 += (input[idx_0] + input_offset) * kernel[ker_idx_0];
  163. }
  164. }
  165. /* Requantize and clamp output to provided range */
  166. acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]);
  167. acc_0 += output_offset;
  168. acc_0 = MAX(acc_0, output_activation_min);
  169. acc_0 = MIN(acc_0, output_activation_max);
  170. output[i_out++] = acc_0;
  171. }
  172. }
  173. }
  174. }
  175. }
  176. /*
  177. * Basic s8 depthwise convolution function.
  178. *
  179. * Refer header file for details.
  180. * Optimization using DSP extension is not available for the generic case where channel multiplier is > 1.
  181. *
  182. */
  183. arm_status arm_depthwise_conv_s8(const q7_t *input,
  184. const uint16_t input_x,
  185. const uint16_t input_y,
  186. const uint16_t input_ch,
  187. const q7_t *kernel,
  188. const uint16_t output_ch,
  189. const uint16_t ch_mult,
  190. const uint16_t kernel_x,
  191. const uint16_t kernel_y,
  192. const uint16_t pad_x,
  193. const uint16_t pad_y,
  194. const uint16_t stride_x,
  195. const uint16_t stride_y,
  196. const int32_t *bias,
  197. q7_t *output,
  198. const int32_t *output_shift,
  199. const int32_t *output_mult,
  200. const uint16_t output_x,
  201. const uint16_t output_y,
  202. const int32_t output_offset,
  203. const int32_t input_offset,
  204. const int32_t output_activation_min,
  205. const int32_t output_activation_max,
  206. const uint16_t dilation_x,
  207. const uint16_t dilation_y,
  208. q15_t *buffer_a)
  209. {
  210. (void)dilation_x;
  211. (void)dilation_y;
  212. (void)buffer_a;
  213. if(ch_mult % 4 == 0)
  214. {
  215. depthwise_conv_s8_mult_4(input, input_x, input_y, input_ch, kernel, output_ch, ch_mult, kernel_x, kernel_y, pad_x, pad_y, stride_x, stride_y, bias,
  216. output, output_shift, output_mult, output_x, output_y, output_offset, input_offset, output_activation_min, output_activation_max);
  217. }
  218. else
  219. {
  220. depthwise_conv_s8_generic(input, input_x, input_y, input_ch, kernel, output_ch, ch_mult, kernel_x, kernel_y, pad_x, pad_y, stride_x, stride_y, bias,
  221. output, output_shift, output_mult, output_x, output_y, output_offset, input_offset, output_activation_min, output_activation_max);
  222. }
  223. /* Return to application */
  224. return ARM_MATH_SUCCESS;
  225. }
  226. /**
  227. * @} end of NNConv group
  228. */