DAP_config.h 20 KB

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  1. /*
  2. * Copyright (c) 2013-2021 ARM Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * ----------------------------------------------------------------------
  19. *
  20. * $Date: 16. June 2021
  21. * $Revision: V2.1.0
  22. *
  23. * Project: CMSIS-DAP Configuration
  24. * Title: DAP_config.h CMSIS-DAP Configuration File (Template)
  25. *
  26. *---------------------------------------------------------------------------*/
  27. #ifndef __DAP_CONFIG_H__
  28. #define __DAP_CONFIG_H__
  29. //**************************************************************************************************
  30. /**
  31. \defgroup DAP_Config_Debug_gr CMSIS-DAP Debug Unit Information
  32. \ingroup DAP_ConfigIO_gr
  33. @{
  34. Provides definitions about the hardware and configuration of the Debug Unit.
  35. This information includes:
  36. - Definition of Cortex-M processor parameters used in CMSIS-DAP Debug Unit.
  37. - Debug Unit Identification strings (Vendor, Product, Serial Number).
  38. - Debug Unit communication packet size.
  39. - Debug Access Port supported modes and settings (JTAG/SWD and SWO).
  40. - Optional information about a connected Target Device (for Evaluation Boards).
  41. */
  42. #ifdef _RTE_
  43. #include "RTE_Components.h"
  44. #include CMSIS_device_header
  45. #else
  46. #include "device.h" // Debug Unit Cortex-M Processor Header File
  47. #endif
  48. /// Processor Clock of the Cortex-M MCU used in the Debug Unit.
  49. /// This value is used to calculate the SWD/JTAG clock speed.
  50. #define CPU_CLOCK 100000000U ///< Specifies the CPU Clock in Hz.
  51. /// Number of processor cycles for I/O Port write operations.
  52. /// This value is used to calculate the SWD/JTAG clock speed that is generated with I/O
  53. /// Port write operations in the Debug Unit by a Cortex-M MCU. Most Cortex-M processors
  54. /// require 2 processor cycles for a I/O Port Write operation. If the Debug Unit uses
  55. /// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be
  56. /// required.
  57. #define IO_PORT_WRITE_CYCLES 2U ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0.
  58. /// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port.
  59. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  60. #define DAP_SWD 1 ///< SWD Mode: 1 = available, 0 = not available.
  61. /// Indicate that JTAG communication mode is available at the Debug Port.
  62. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  63. #define DAP_JTAG 1 ///< JTAG Mode: 1 = available, 0 = not available.
  64. /// Configure maximum number of JTAG devices on the scan chain connected to the Debug Access Port.
  65. /// This setting impacts the RAM requirements of the Debug Unit. Valid range is 1 .. 255.
  66. #define DAP_JTAG_DEV_CNT 8U ///< Maximum number of JTAG devices on scan chain.
  67. /// Default communication mode on the Debug Access Port.
  68. /// Used for the command \ref DAP_Connect when Port Default mode is selected.
  69. #define DAP_DEFAULT_PORT 1U ///< Default JTAG/SWJ Port Mode: 1 = SWD, 2 = JTAG.
  70. /// Default communication speed on the Debug Access Port for SWD and JTAG mode.
  71. /// Used to initialize the default SWD/JTAG clock frequency.
  72. /// The command \ref DAP_SWJ_Clock can be used to overwrite this default setting.
  73. #define DAP_DEFAULT_SWJ_CLOCK 1000000U ///< Default SWD/JTAG clock frequency in Hz.
  74. /// Maximum Package Size for Command and Response data.
  75. /// This configuration settings is used to optimize the communication performance with the
  76. /// debugger and depends on the USB peripheral. Typical vales are 64 for Full-speed USB HID or WinUSB,
  77. /// 1024 for High-speed USB HID and 512 for High-speed USB WinUSB.
  78. #define DAP_PACKET_SIZE 512U ///< Specifies Packet Size in bytes.
  79. /// Maximum Package Buffers for Command and Response data.
  80. /// This configuration settings is used to optimize the communication performance with the
  81. /// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the
  82. /// setting can be reduced (valid range is 1 .. 255).
  83. #define DAP_PACKET_COUNT 8U ///< Specifies number of packets buffered.
  84. /// Indicate that UART Serial Wire Output (SWO) trace is available.
  85. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  86. #define SWO_UART 1 ///< SWO UART: 1 = available, 0 = not available.
  87. /// USART Driver instance number for the UART SWO.
  88. #define SWO_UART_DRIVER 0 ///< USART Driver instance number (Driver_USART#).
  89. /// Maximum SWO UART Baudrate.
  90. #define SWO_UART_MAX_BAUDRATE 10000000U ///< SWO UART Maximum Baudrate in Hz.
  91. /// Indicate that Manchester Serial Wire Output (SWO) trace is available.
  92. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  93. #define SWO_MANCHESTER 0 ///< SWO Manchester: 1 = available, 0 = not available.
  94. /// SWO Trace Buffer Size.
  95. #define SWO_BUFFER_SIZE 4096U ///< SWO Trace Buffer Size in bytes (must be 2^n).
  96. /// SWO Streaming Trace.
  97. #define SWO_STREAM 0 ///< SWO Streaming Trace: 1 = available, 0 = not available.
  98. /// Clock frequency of the Test Domain Timer. Timer value is returned with \ref TIMESTAMP_GET.
  99. #define TIMESTAMP_CLOCK 100000000U ///< Timestamp clock in Hz (0 = timestamps not supported).
  100. /// Indicate that UART Communication Port is available.
  101. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  102. #define DAP_UART 1 ///< DAP UART: 1 = available, 0 = not available.
  103. /// USART Driver instance number for the UART Communication Port.
  104. #define DAP_UART_DRIVER 1 ///< USART Driver instance number (Driver_USART#).
  105. /// UART Receive Buffer Size.
  106. #define DAP_UART_RX_BUFFER_SIZE 1024U ///< Uart Receive Buffer Size in bytes (must be 2^n).
  107. /// UART Transmit Buffer Size.
  108. #define DAP_UART_TX_BUFFER_SIZE 1024U ///< Uart Transmit Buffer Size in bytes (must be 2^n).
  109. /// Indicate that UART Communication via USB COM Port is available.
  110. /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
  111. #define DAP_UART_USB_COM_PORT 1 ///< USB COM Port: 1 = available, 0 = not available.
  112. /// Debug Unit is connected to fixed Target Device.
  113. /// The Debug Unit may be part of an evaluation board and always connected to a fixed
  114. /// known device. In this case a Device Vendor, Device Name, Board Vendor and Board Name strings
  115. /// are stored and may be used by the debugger or IDE to configure device parameters.
  116. #define TARGET_FIXED 0 ///< Target: 1 = known, 0 = unknown;
  117. #define TARGET_DEVICE_VENDOR "Arm" ///< String indicating the Silicon Vendor
  118. #define TARGET_DEVICE_NAME "Cortex-M" ///< String indicating the Target Device
  119. #define TARGET_BOARD_VENDOR "Arm" ///< String indicating the Board Vendor
  120. #define TARGET_BOARD_NAME "Arm board" ///< String indicating the Board Name
  121. #if TARGET_FIXED != 0
  122. #include <string.h>
  123. static const char TargetDeviceVendor [] = TARGET_DEVICE_VENDOR;
  124. static const char TargetDeviceName [] = TARGET_DEVICE_NAME;
  125. static const char TargetBoardVendor [] = TARGET_BOARD_VENDOR;
  126. static const char TargetBoardName [] = TARGET_BOARD_NAME;
  127. #endif
  128. /** Get Vendor Name string.
  129. \param str Pointer to buffer to store the string (max 60 characters).
  130. \return String length (including terminating NULL character) or 0 (no string).
  131. */
  132. __STATIC_INLINE uint8_t DAP_GetVendorString (char *str) {
  133. (void)str;
  134. return (0U);
  135. }
  136. /** Get Product Name string.
  137. \param str Pointer to buffer to store the string (max 60 characters).
  138. \return String length (including terminating NULL character) or 0 (no string).
  139. */
  140. __STATIC_INLINE uint8_t DAP_GetProductString (char *str) {
  141. (void)str;
  142. return (0U);
  143. }
  144. /** Get Serial Number string.
  145. \param str Pointer to buffer to store the string (max 60 characters).
  146. \return String length (including terminating NULL character) or 0 (no string).
  147. */
  148. __STATIC_INLINE uint8_t DAP_GetSerNumString (char *str) {
  149. (void)str;
  150. return (0U);
  151. }
  152. /** Get Target Device Vendor string.
  153. \param str Pointer to buffer to store the string (max 60 characters).
  154. \return String length (including terminating NULL character) or 0 (no string).
  155. */
  156. __STATIC_INLINE uint8_t DAP_GetTargetDeviceVendorString (char *str) {
  157. #if TARGET_FIXED != 0
  158. uint8_t len;
  159. strcpy(str, TargetDeviceVendor);
  160. len = (uint8_t)(strlen(TargetDeviceVendor) + 1U);
  161. return (len);
  162. #else
  163. (void)str;
  164. return (0U);
  165. #endif
  166. }
  167. /** Get Target Device Name string.
  168. \param str Pointer to buffer to store the string (max 60 characters).
  169. \return String length (including terminating NULL character) or 0 (no string).
  170. */
  171. __STATIC_INLINE uint8_t DAP_GetTargetDeviceNameString (char *str) {
  172. #if TARGET_FIXED != 0
  173. uint8_t len;
  174. strcpy(str, TargetDeviceName);
  175. len = (uint8_t)(strlen(TargetDeviceName) + 1U);
  176. return (len);
  177. #else
  178. (void)str;
  179. return (0U);
  180. #endif
  181. }
  182. /** Get Target Board Vendor string.
  183. \param str Pointer to buffer to store the string (max 60 characters).
  184. \return String length (including terminating NULL character) or 0 (no string).
  185. */
  186. __STATIC_INLINE uint8_t DAP_GetTargetBoardVendorString (char *str) {
  187. #if TARGET_FIXED != 0
  188. uint8_t len;
  189. strcpy(str, TargetBoardVendor);
  190. len = (uint8_t)(strlen(TargetBoardVendor) + 1U);
  191. return (len);
  192. #else
  193. (void)str;
  194. return (0U);
  195. #endif
  196. }
  197. /** Get Target Board Name string.
  198. \param str Pointer to buffer to store the string (max 60 characters).
  199. \return String length (including terminating NULL character) or 0 (no string).
  200. */
  201. __STATIC_INLINE uint8_t DAP_GetTargetBoardNameString (char *str) {
  202. #if TARGET_FIXED != 0
  203. uint8_t len;
  204. strcpy(str, TargetBoardName);
  205. len = (uint8_t)(strlen(TargetBoardName) + 1U);
  206. return (len);
  207. #else
  208. (void)str;
  209. return (0U);
  210. #endif
  211. }
  212. /** Get Product Firmware Version string.
  213. \param str Pointer to buffer to store the string (max 60 characters).
  214. \return String length (including terminating NULL character) or 0 (no string).
  215. */
  216. __STATIC_INLINE uint8_t DAP_GetProductFirmwareVersionString (char *str) {
  217. (void)str;
  218. return (0U);
  219. }
  220. ///@}
  221. //**************************************************************************************************
  222. /**
  223. \defgroup DAP_Config_PortIO_gr CMSIS-DAP Hardware I/O Pin Access
  224. \ingroup DAP_ConfigIO_gr
  225. @{
  226. Standard I/O Pins of the CMSIS-DAP Hardware Debug Port support standard JTAG mode
  227. and Serial Wire Debug (SWD) mode. In SWD mode only 2 pins are required to implement the debug
  228. interface of a device. The following I/O Pins are provided:
  229. JTAG I/O Pin | SWD I/O Pin | CMSIS-DAP Hardware pin mode
  230. ---------------------------- | -------------------- | ---------------------------------------------
  231. TCK: Test Clock | SWCLK: Clock | Output Push/Pull
  232. TMS: Test Mode Select | SWDIO: Data I/O | Output Push/Pull; Input (for receiving data)
  233. TDI: Test Data Input | | Output Push/Pull
  234. TDO: Test Data Output | | Input
  235. nTRST: Test Reset (optional) | | Output Open Drain with pull-up resistor
  236. nRESET: Device Reset | nRESET: Device Reset | Output Open Drain with pull-up resistor
  237. DAP Hardware I/O Pin Access Functions
  238. -------------------------------------
  239. The various I/O Pins are accessed by functions that implement the Read, Write, Set, or Clear to
  240. these I/O Pins.
  241. For the SWDIO I/O Pin there are additional functions that are called in SWD I/O mode only.
  242. This functions are provided to achieve faster I/O that is possible with some advanced GPIO
  243. peripherals that can independently write/read a single I/O pin without affecting any other pins
  244. of the same I/O port. The following SWDIO I/O Pin functions are provided:
  245. - \ref PIN_SWDIO_OUT_ENABLE to enable the output mode from the DAP hardware.
  246. - \ref PIN_SWDIO_OUT_DISABLE to enable the input mode to the DAP hardware.
  247. - \ref PIN_SWDIO_IN to read from the SWDIO I/O pin with utmost possible speed.
  248. - \ref PIN_SWDIO_OUT to write to the SWDIO I/O pin with utmost possible speed.
  249. */
  250. // Configure DAP I/O pins ------------------------------
  251. /** Setup JTAG I/O pins: TCK, TMS, TDI, TDO, nTRST, and nRESET.
  252. Configures the DAP Hardware I/O pins for JTAG mode:
  253. - TCK, TMS, TDI, nTRST, nRESET to output mode and set to high level.
  254. - TDO to input mode.
  255. */
  256. __STATIC_INLINE void PORT_JTAG_SETUP (void) {
  257. ;
  258. }
  259. /** Setup SWD I/O pins: SWCLK, SWDIO, and nRESET.
  260. Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
  261. - SWCLK, SWDIO, nRESET to output mode and set to default high level.
  262. - TDI, nTRST to HighZ mode (pins are unused in SWD mode).
  263. */
  264. __STATIC_INLINE void PORT_SWD_SETUP (void) {
  265. ;
  266. }
  267. /** Disable JTAG/SWD I/O Pins.
  268. Disables the DAP Hardware I/O pins which configures:
  269. - TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.
  270. */
  271. __STATIC_INLINE void PORT_OFF (void) {
  272. ;
  273. }
  274. // SWCLK/TCK I/O pin -------------------------------------
  275. /** SWCLK/TCK I/O pin: Get Input.
  276. \return Current status of the SWCLK/TCK DAP hardware I/O pin.
  277. */
  278. __STATIC_FORCEINLINE uint32_t PIN_SWCLK_TCK_IN (void) {
  279. return (0U);
  280. }
  281. /** SWCLK/TCK I/O pin: Set Output to High.
  282. Set the SWCLK/TCK DAP hardware I/O pin to high level.
  283. */
  284. __STATIC_FORCEINLINE void PIN_SWCLK_TCK_SET (void) {
  285. ;
  286. }
  287. /** SWCLK/TCK I/O pin: Set Output to Low.
  288. Set the SWCLK/TCK DAP hardware I/O pin to low level.
  289. */
  290. __STATIC_FORCEINLINE void PIN_SWCLK_TCK_CLR (void) {
  291. ;
  292. }
  293. // SWDIO/TMS Pin I/O --------------------------------------
  294. /** SWDIO/TMS I/O pin: Get Input.
  295. \return Current status of the SWDIO/TMS DAP hardware I/O pin.
  296. */
  297. __STATIC_FORCEINLINE uint32_t PIN_SWDIO_TMS_IN (void) {
  298. return (0U);
  299. }
  300. /** SWDIO/TMS I/O pin: Set Output to High.
  301. Set the SWDIO/TMS DAP hardware I/O pin to high level.
  302. */
  303. __STATIC_FORCEINLINE void PIN_SWDIO_TMS_SET (void) {
  304. ;
  305. }
  306. /** SWDIO/TMS I/O pin: Set Output to Low.
  307. Set the SWDIO/TMS DAP hardware I/O pin to low level.
  308. */
  309. __STATIC_FORCEINLINE void PIN_SWDIO_TMS_CLR (void) {
  310. ;
  311. }
  312. /** SWDIO I/O pin: Get Input (used in SWD mode only).
  313. \return Current status of the SWDIO DAP hardware I/O pin.
  314. */
  315. __STATIC_FORCEINLINE uint32_t PIN_SWDIO_IN (void) {
  316. return (0U);
  317. }
  318. /** SWDIO I/O pin: Set Output (used in SWD mode only).
  319. \param bit Output value for the SWDIO DAP hardware I/O pin.
  320. */
  321. __STATIC_FORCEINLINE void PIN_SWDIO_OUT (uint32_t bit) {
  322. ;
  323. }
  324. /** SWDIO I/O pin: Switch to Output mode (used in SWD mode only).
  325. Configure the SWDIO DAP hardware I/O pin to output mode. This function is
  326. called prior \ref PIN_SWDIO_OUT function calls.
  327. */
  328. __STATIC_FORCEINLINE void PIN_SWDIO_OUT_ENABLE (void) {
  329. ;
  330. }
  331. /** SWDIO I/O pin: Switch to Input mode (used in SWD mode only).
  332. Configure the SWDIO DAP hardware I/O pin to input mode. This function is
  333. called prior \ref PIN_SWDIO_IN function calls.
  334. */
  335. __STATIC_FORCEINLINE void PIN_SWDIO_OUT_DISABLE (void) {
  336. ;
  337. }
  338. // TDI Pin I/O ---------------------------------------------
  339. /** TDI I/O pin: Get Input.
  340. \return Current status of the TDI DAP hardware I/O pin.
  341. */
  342. __STATIC_FORCEINLINE uint32_t PIN_TDI_IN (void) {
  343. return (0U);
  344. }
  345. /** TDI I/O pin: Set Output.
  346. \param bit Output value for the TDI DAP hardware I/O pin.
  347. */
  348. __STATIC_FORCEINLINE void PIN_TDI_OUT (uint32_t bit) {
  349. ;
  350. }
  351. // TDO Pin I/O ---------------------------------------------
  352. /** TDO I/O pin: Get Input.
  353. \return Current status of the TDO DAP hardware I/O pin.
  354. */
  355. __STATIC_FORCEINLINE uint32_t PIN_TDO_IN (void) {
  356. return (0U);
  357. }
  358. // nTRST Pin I/O -------------------------------------------
  359. /** nTRST I/O pin: Get Input.
  360. \return Current status of the nTRST DAP hardware I/O pin.
  361. */
  362. __STATIC_FORCEINLINE uint32_t PIN_nTRST_IN (void) {
  363. return (0U);
  364. }
  365. /** nTRST I/O pin: Set Output.
  366. \param bit JTAG TRST Test Reset pin status:
  367. - 0: issue a JTAG TRST Test Reset.
  368. - 1: release JTAG TRST Test Reset.
  369. */
  370. __STATIC_FORCEINLINE void PIN_nTRST_OUT (uint32_t bit) {
  371. ;
  372. }
  373. // nRESET Pin I/O------------------------------------------
  374. /** nRESET I/O pin: Get Input.
  375. \return Current status of the nRESET DAP hardware I/O pin.
  376. */
  377. __STATIC_FORCEINLINE uint32_t PIN_nRESET_IN (void) {
  378. return (0U);
  379. }
  380. /** nRESET I/O pin: Set Output.
  381. \param bit target device hardware reset pin status:
  382. - 0: issue a device hardware reset.
  383. - 1: release device hardware reset.
  384. */
  385. __STATIC_FORCEINLINE void PIN_nRESET_OUT (uint32_t bit) {
  386. ;
  387. }
  388. ///@}
  389. //**************************************************************************************************
  390. /**
  391. \defgroup DAP_Config_LEDs_gr CMSIS-DAP Hardware Status LEDs
  392. \ingroup DAP_ConfigIO_gr
  393. @{
  394. CMSIS-DAP Hardware may provide LEDs that indicate the status of the CMSIS-DAP Debug Unit.
  395. It is recommended to provide the following LEDs for status indication:
  396. - Connect LED: is active when the DAP hardware is connected to a debugger.
  397. - Running LED: is active when the debugger has put the target device into running state.
  398. */
  399. /** Debug Unit: Set status of Connected LED.
  400. \param bit status of the Connect LED.
  401. - 1: Connect LED ON: debugger is connected to CMSIS-DAP Debug Unit.
  402. - 0: Connect LED OFF: debugger is not connected to CMSIS-DAP Debug Unit.
  403. */
  404. __STATIC_INLINE void LED_CONNECTED_OUT (uint32_t bit) {}
  405. /** Debug Unit: Set status Target Running LED.
  406. \param bit status of the Target Running LED.
  407. - 1: Target Running LED ON: program execution in target started.
  408. - 0: Target Running LED OFF: program execution in target stopped.
  409. */
  410. __STATIC_INLINE void LED_RUNNING_OUT (uint32_t bit) {}
  411. ///@}
  412. //**************************************************************************************************
  413. /**
  414. \defgroup DAP_Config_Timestamp_gr CMSIS-DAP Timestamp
  415. \ingroup DAP_ConfigIO_gr
  416. @{
  417. Access function for Test Domain Timer.
  418. The value of the Test Domain Timer in the Debug Unit is returned by the function \ref TIMESTAMP_GET. By
  419. default, the DWT timer is used. The frequency of this timer is configured with \ref TIMESTAMP_CLOCK.
  420. */
  421. /** Get timestamp of Test Domain Timer.
  422. \return Current timestamp value.
  423. */
  424. __STATIC_INLINE uint32_t TIMESTAMP_GET (void) {
  425. return (DWT->CYCCNT);
  426. }
  427. ///@}
  428. //**************************************************************************************************
  429. /**
  430. \defgroup DAP_Config_Initialization_gr CMSIS-DAP Initialization
  431. \ingroup DAP_ConfigIO_gr
  432. @{
  433. CMSIS-DAP Hardware I/O and LED Pins are initialized with the function \ref DAP_SETUP.
  434. */
  435. /** Setup of the Debug Unit I/O pins and LEDs (called when Debug Unit is initialized).
  436. This function performs the initialization of the CMSIS-DAP Hardware I/O Pins and the
  437. Status LEDs. In detail the operation of Hardware I/O and LED pins are enabled and set:
  438. - I/O clock system enabled.
  439. - all I/O pins: input buffer enabled, output pins are set to HighZ mode.
  440. - for nTRST, nRESET a weak pull-up (if available) is enabled.
  441. - LED output pins are enabled and LEDs are turned off.
  442. */
  443. __STATIC_INLINE void DAP_SETUP (void) {
  444. ;
  445. }
  446. /** Reset Target Device with custom specific I/O pin or command sequence.
  447. This function allows the optional implementation of a device specific reset sequence.
  448. It is called when the command \ref DAP_ResetTarget and is for example required
  449. when a device needs a time-critical unlock sequence that enables the debug port.
  450. \return 0 = no device specific reset sequence is implemented.\n
  451. 1 = a device specific reset sequence is implemented.
  452. */
  453. __STATIC_INLINE uint8_t RESET_TARGET (void) {
  454. return (0U); // change to '1' when a device reset sequence is implemented
  455. }
  456. ///@}
  457. #endif /* __DAP_CONFIG_H__ */