DAP.h 14 KB

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  1. /*
  2. * Copyright (c) 2013-2022 ARM Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * ----------------------------------------------------------------------
  19. *
  20. * $Date: 5. December 2022
  21. * $Revision: V2.1.2
  22. *
  23. * Project: CMSIS-DAP Include
  24. * Title: DAP.h Definitions
  25. *
  26. *---------------------------------------------------------------------------*/
  27. #ifndef __DAP_H__
  28. #define __DAP_H__
  29. // DAP Firmware Version
  30. #ifdef DAP_FW_V1
  31. #define DAP_FW_VER "1.3.0"
  32. #else
  33. #define DAP_FW_VER "2.1.2"
  34. #endif
  35. // DAP Command IDs
  36. #define ID_DAP_Info 0x00U
  37. #define ID_DAP_HostStatus 0x01U
  38. #define ID_DAP_Connect 0x02U
  39. #define ID_DAP_Disconnect 0x03U
  40. #define ID_DAP_TransferConfigure 0x04U
  41. #define ID_DAP_Transfer 0x05U
  42. #define ID_DAP_TransferBlock 0x06U
  43. #define ID_DAP_TransferAbort 0x07U
  44. #define ID_DAP_WriteABORT 0x08U
  45. #define ID_DAP_Delay 0x09U
  46. #define ID_DAP_ResetTarget 0x0AU
  47. #define ID_DAP_SWJ_Pins 0x10U
  48. #define ID_DAP_SWJ_Clock 0x11U
  49. #define ID_DAP_SWJ_Sequence 0x12U
  50. #define ID_DAP_SWD_Configure 0x13U
  51. #define ID_DAP_SWD_Sequence 0x1DU
  52. #define ID_DAP_JTAG_Sequence 0x14U
  53. #define ID_DAP_JTAG_Configure 0x15U
  54. #define ID_DAP_JTAG_IDCODE 0x16U
  55. #define ID_DAP_SWO_Transport 0x17U
  56. #define ID_DAP_SWO_Mode 0x18U
  57. #define ID_DAP_SWO_Baudrate 0x19U
  58. #define ID_DAP_SWO_Control 0x1AU
  59. #define ID_DAP_SWO_Status 0x1BU
  60. #define ID_DAP_SWO_ExtendedStatus 0x1EU
  61. #define ID_DAP_SWO_Data 0x1CU
  62. #define ID_DAP_UART_Transport 0x1FU
  63. #define ID_DAP_UART_Configure 0x20U
  64. #define ID_DAP_UART_Control 0x22U
  65. #define ID_DAP_UART_Status 0x23U
  66. #define ID_DAP_UART_Transfer 0x21U
  67. #define ID_DAP_QueueCommands 0x7EU
  68. #define ID_DAP_ExecuteCommands 0x7FU
  69. // DAP Vendor Command IDs
  70. #define ID_DAP_Vendor0 0x80U
  71. #define ID_DAP_Vendor1 0x81U
  72. #define ID_DAP_Vendor2 0x82U
  73. #define ID_DAP_Vendor3 0x83U
  74. #define ID_DAP_Vendor4 0x84U
  75. #define ID_DAP_Vendor5 0x85U
  76. #define ID_DAP_Vendor6 0x86U
  77. #define ID_DAP_Vendor7 0x87U
  78. #define ID_DAP_Vendor8 0x88U
  79. #define ID_DAP_Vendor9 0x89U
  80. #define ID_DAP_Vendor10 0x8AU
  81. #define ID_DAP_Vendor11 0x8BU
  82. #define ID_DAP_Vendor12 0x8CU
  83. #define ID_DAP_Vendor13 0x8DU
  84. #define ID_DAP_Vendor14 0x8EU
  85. #define ID_DAP_Vendor15 0x8FU
  86. #define ID_DAP_Vendor16 0x90U
  87. #define ID_DAP_Vendor17 0x91U
  88. #define ID_DAP_Vendor18 0x92U
  89. #define ID_DAP_Vendor19 0x93U
  90. #define ID_DAP_Vendor20 0x94U
  91. #define ID_DAP_Vendor21 0x95U
  92. #define ID_DAP_Vendor22 0x96U
  93. #define ID_DAP_Vendor23 0x97U
  94. #define ID_DAP_Vendor24 0x98U
  95. #define ID_DAP_Vendor25 0x99U
  96. #define ID_DAP_Vendor26 0x9AU
  97. #define ID_DAP_Vendor27 0x9BU
  98. #define ID_DAP_Vendor28 0x9CU
  99. #define ID_DAP_Vendor29 0x9DU
  100. #define ID_DAP_Vendor30 0x9EU
  101. #define ID_DAP_Vendor31 0x9FU
  102. #define ID_DAP_Invalid 0xFFU
  103. // DAP Status Code
  104. #define DAP_OK 0U
  105. #define DAP_ERROR 0xFFU
  106. // DAP ID
  107. #define DAP_ID_VENDOR 1U
  108. #define DAP_ID_PRODUCT 2U
  109. #define DAP_ID_SER_NUM 3U
  110. #define DAP_ID_DAP_FW_VER 4U
  111. #define DAP_ID_DEVICE_VENDOR 5U
  112. #define DAP_ID_DEVICE_NAME 6U
  113. #define DAP_ID_BOARD_VENDOR 7U
  114. #define DAP_ID_BOARD_NAME 8U
  115. #define DAP_ID_PRODUCT_FW_VER 9U
  116. #define DAP_ID_CAPABILITIES 0xF0U
  117. #define DAP_ID_TIMESTAMP_CLOCK 0xF1U
  118. #define DAP_ID_UART_RX_BUFFER_SIZE 0xFBU
  119. #define DAP_ID_UART_TX_BUFFER_SIZE 0xFCU
  120. #define DAP_ID_SWO_BUFFER_SIZE 0xFDU
  121. #define DAP_ID_PACKET_COUNT 0xFEU
  122. #define DAP_ID_PACKET_SIZE 0xFFU
  123. // DAP Host Status
  124. #define DAP_DEBUGGER_CONNECTED 0U
  125. #define DAP_TARGET_RUNNING 1U
  126. // DAP Port
  127. #define DAP_PORT_AUTODETECT 0U // Autodetect Port
  128. #define DAP_PORT_DISABLED 0U // Port Disabled (I/O pins in High-Z)
  129. #define DAP_PORT_SWD 1U // SWD Port (SWCLK, SWDIO) + nRESET
  130. #define DAP_PORT_JTAG 2U // JTAG Port (TCK, TMS, TDI, TDO, nTRST) + nRESET
  131. // DAP SWJ Pins
  132. #define DAP_SWJ_SWCLK_TCK 0 // SWCLK/TCK
  133. #define DAP_SWJ_SWDIO_TMS 1 // SWDIO/TMS
  134. #define DAP_SWJ_TDI 2 // TDI
  135. #define DAP_SWJ_TDO 3 // TDO
  136. #define DAP_SWJ_nTRST 5 // nTRST
  137. #define DAP_SWJ_nRESET 7 // nRESET
  138. // DAP Transfer Request
  139. #define DAP_TRANSFER_APnDP (1U<<0)
  140. #define DAP_TRANSFER_RnW (1U<<1)
  141. #define DAP_TRANSFER_A2 (1U<<2)
  142. #define DAP_TRANSFER_A3 (1U<<3)
  143. #define DAP_TRANSFER_MATCH_VALUE (1U<<4)
  144. #define DAP_TRANSFER_MATCH_MASK (1U<<5)
  145. #define DAP_TRANSFER_TIMESTAMP (1U<<7)
  146. // DAP Transfer Response
  147. #define DAP_TRANSFER_OK (1U<<0)
  148. #define DAP_TRANSFER_WAIT (1U<<1)
  149. #define DAP_TRANSFER_FAULT (1U<<2)
  150. #define DAP_TRANSFER_ERROR (1U<<3)
  151. #define DAP_TRANSFER_MISMATCH (1U<<4)
  152. // DAP SWO Trace Mode
  153. #define DAP_SWO_OFF 0U
  154. #define DAP_SWO_UART 1U
  155. #define DAP_SWO_MANCHESTER 2U
  156. // DAP SWO Trace Status
  157. #define DAP_SWO_CAPTURE_ACTIVE (1U<<0)
  158. #define DAP_SWO_CAPTURE_PAUSED (1U<<1)
  159. #define DAP_SWO_STREAM_ERROR (1U<<6)
  160. #define DAP_SWO_BUFFER_OVERRUN (1U<<7)
  161. // DAP UART Transport
  162. #define DAP_UART_TRANSPORT_NONE 0U
  163. #define DAP_UART_TRANSPORT_USB_COM_PORT 1U
  164. #define DAP_UART_TRANSPORT_DAP_COMMAND 2U
  165. // DAP UART Control
  166. #define DAP_UART_CONTROL_RX_ENABLE (1U<<0)
  167. #define DAP_UART_CONTROL_RX_DISABLE (1U<<1)
  168. #define DAP_UART_CONTROL_RX_BUF_FLUSH (1U<<2)
  169. #define DAP_UART_CONTROL_TX_ENABLE (1U<<4)
  170. #define DAP_UART_CONTROL_TX_DISABLE (1U<<5)
  171. #define DAP_UART_CONTROL_TX_BUF_FLUSH (1U<<6)
  172. // DAP UART Status
  173. #define DAP_UART_STATUS_RX_ENABLED (1U<<0)
  174. #define DAP_UART_STATUS_RX_DATA_LOST (1U<<1)
  175. #define DAP_UART_STATUS_FRAMING_ERROR (1U<<2)
  176. #define DAP_UART_STATUS_PARITY_ERROR (1U<<3)
  177. #define DAP_UART_STATUS_TX_ENABLED (1U<<4)
  178. // DAP UART Configure Error
  179. #define DAP_UART_CFG_ERROR_DATA_BITS (1U<<0)
  180. #define DAP_UART_CFG_ERROR_PARITY (1U<<1)
  181. #define DAP_UART_CFG_ERROR_STOP_BITS (1U<<2)
  182. // Debug Port Register Addresses
  183. #define DP_IDCODE 0x00U // IDCODE Register (SW Read only)
  184. #define DP_ABORT 0x00U // Abort Register (SW Write only)
  185. #define DP_CTRL_STAT 0x04U // Control & Status
  186. #define DP_WCR 0x04U // Wire Control Register (SW Only)
  187. #define DP_SELECT 0x08U // Select Register (JTAG R/W & SW W)
  188. #define DP_RESEND 0x08U // Resend (SW Read Only)
  189. #define DP_RDBUFF 0x0CU // Read Buffer (Read Only)
  190. // JTAG IR Codes
  191. #define JTAG_ABORT 0x08U
  192. #define JTAG_DPACC 0x0AU
  193. #define JTAG_APACC 0x0BU
  194. #define JTAG_IDCODE 0x0EU
  195. #define JTAG_BYPASS 0x0FU
  196. // JTAG Sequence Info
  197. #define JTAG_SEQUENCE_TCK 0x3FU // TCK count
  198. #define JTAG_SEQUENCE_TMS 0x40U // TMS value
  199. #define JTAG_SEQUENCE_TDO 0x80U // TDO capture
  200. // SWD Sequence Info
  201. #define SWD_SEQUENCE_CLK 0x3FU // SWCLK count
  202. #define SWD_SEQUENCE_DIN 0x80U // SWDIO capture
  203. #include <stddef.h>
  204. #include <stdint.h>
  205. #include "cmsis_compiler.h"
  206. // DAP Data structure
  207. typedef struct {
  208. uint8_t debug_port; // Debug Port
  209. uint8_t fast_clock; // Fast Clock Flag
  210. uint8_t padding[2];
  211. uint32_t clock_delay; // Clock Delay
  212. uint32_t timestamp; // Last captured Timestamp
  213. struct { // Transfer Configuration
  214. uint8_t idle_cycles; // Idle cycles after transfer
  215. uint8_t padding[3];
  216. uint16_t retry_count; // Number of retries after WAIT response
  217. uint16_t match_retry; // Number of retries if read value does not match
  218. uint32_t match_mask; // Match Mask
  219. } transfer;
  220. #if (DAP_SWD != 0)
  221. struct { // SWD Configuration
  222. uint8_t turnaround; // Turnaround period
  223. uint8_t data_phase; // Always generate Data Phase
  224. } swd_conf;
  225. #endif
  226. #if (DAP_JTAG != 0)
  227. struct { // JTAG Device Chain
  228. uint8_t count; // Number of devices
  229. uint8_t index; // Device index (device at TDO has index 0)
  230. #if (DAP_JTAG_DEV_CNT != 0)
  231. uint8_t ir_length[DAP_JTAG_DEV_CNT]; // IR Length in bits
  232. uint16_t ir_before[DAP_JTAG_DEV_CNT]; // Bits before IR
  233. uint16_t ir_after [DAP_JTAG_DEV_CNT]; // Bits after IR
  234. #endif
  235. } jtag_dev;
  236. #endif
  237. } DAP_Data_t;
  238. extern DAP_Data_t DAP_Data; // DAP Data
  239. extern volatile uint8_t DAP_TransferAbort; // Transfer Abort Flag
  240. #ifdef __cplusplus
  241. extern "C"
  242. {
  243. #endif
  244. // Functions
  245. extern void SWJ_Sequence (uint32_t count, const uint8_t *data);
  246. extern void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi);
  247. extern void JTAG_Sequence (uint32_t info, const uint8_t *tdi, uint8_t *tdo);
  248. extern void JTAG_IR (uint32_t ir);
  249. extern uint32_t JTAG_ReadIDCode (void);
  250. extern void JTAG_WriteAbort (uint32_t data);
  251. extern uint8_t JTAG_Transfer (uint32_t request, uint32_t *data);
  252. extern uint8_t SWD_Transfer (uint32_t request, uint32_t *data);
  253. extern void Delayms (uint32_t delay);
  254. extern uint32_t SWO_Transport (const uint8_t *request, uint8_t *response);
  255. extern uint32_t SWO_Mode (const uint8_t *request, uint8_t *response);
  256. extern uint32_t SWO_Baudrate (const uint8_t *request, uint8_t *response);
  257. extern uint32_t SWO_Control (const uint8_t *request, uint8_t *response);
  258. extern uint32_t SWO_Status (uint8_t *response);
  259. extern uint32_t SWO_ExtendedStatus (const uint8_t *request, uint8_t *response);
  260. extern uint32_t SWO_Data (const uint8_t *request, uint8_t *response);
  261. extern void SWO_QueueTransfer (uint8_t *buf, uint32_t num);
  262. extern void SWO_AbortTransfer (void);
  263. extern void SWO_TransferComplete (void);
  264. extern uint32_t SWO_Mode_UART (uint32_t enable);
  265. extern uint32_t SWO_Baudrate_UART (uint32_t baudrate);
  266. extern uint32_t SWO_Control_UART (uint32_t active);
  267. extern void SWO_Capture_UART (uint8_t *buf, uint32_t num);
  268. extern uint32_t SWO_GetCount_UART (void);
  269. extern uint32_t SWO_Mode_Manchester (uint32_t enable);
  270. extern uint32_t SWO_Baudrate_Manchester (uint32_t baudrate);
  271. extern uint32_t SWO_Control_Manchester (uint32_t active);
  272. extern void SWO_Capture_Manchester (uint8_t *buf, uint32_t num);
  273. extern uint32_t SWO_GetCount_Manchester (void);
  274. extern uint32_t UART_Transport (const uint8_t *request, uint8_t *response);
  275. extern uint32_t UART_Configure (const uint8_t *request, uint8_t *response);
  276. extern uint32_t UART_Control (const uint8_t *request, uint8_t *response);
  277. extern uint32_t UART_Status (uint8_t *response);
  278. extern uint32_t UART_Transfer (const uint8_t *request, uint8_t *response);
  279. extern uint8_t USB_COM_PORT_Activate (uint32_t cmd);
  280. extern uint32_t DAP_ProcessVendorCommand (const uint8_t *request, uint8_t *response);
  281. extern uint32_t DAP_ProcessCommand (const uint8_t *request, uint8_t *response);
  282. extern uint32_t DAP_ExecuteCommand (const uint8_t *request, uint8_t *response);
  283. extern void DAP_Setup (void);
  284. // Configurable delay for clock generation
  285. #ifndef DELAY_SLOW_CYCLES
  286. #define DELAY_SLOW_CYCLES 3U // Number of cycles for one iteration
  287. #endif
  288. #if defined(__CC_ARM)
  289. __STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) {
  290. uint32_t count = delay;
  291. while (--count);
  292. }
  293. #else
  294. __STATIC_FORCEINLINE void PIN_DELAY_SLOW (uint32_t delay) {
  295. __ASM volatile (
  296. ".syntax unified\n"
  297. "0:\n\t"
  298. "subs %0,%0,#1\n\t"
  299. "bne 0b\n"
  300. : "+l" (delay) : : "cc"
  301. );
  302. }
  303. #endif
  304. // Fixed delay for fast clock generation
  305. #ifndef DELAY_FAST_CYCLES
  306. #define DELAY_FAST_CYCLES 0U // Number of cycles: 0..3
  307. #endif
  308. __STATIC_FORCEINLINE void PIN_DELAY_FAST (void) {
  309. #if (DELAY_FAST_CYCLES >= 1U)
  310. __NOP();
  311. #endif
  312. #if (DELAY_FAST_CYCLES >= 2U)
  313. __NOP();
  314. #endif
  315. #if (DELAY_FAST_CYCLES >= 3U)
  316. __NOP();
  317. #endif
  318. }
  319. #ifdef __cplusplus
  320. }
  321. #endif
  322. #endif /* __DAP_H__ */