SW_DP.c 14 KB

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  1. /*
  2. * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * ----------------------------------------------------------------------
  19. *
  20. * $Date: 1. December 2017
  21. * $Revision: V2.0.0
  22. *
  23. * Project: CMSIS-DAP Source
  24. * Title: SW_DP.c CMSIS-DAP SW DP I/O
  25. *
  26. *---------------------------------------------------------------------------*/
  27. #include "DAP_config.h"
  28. #include "DAP.h"
  29. // SW Macros
  30. #define PIN_SWCLK_SET PIN_SWCLK_TCK_SET
  31. #define PIN_SWCLK_CLR PIN_SWCLK_TCK_CLR
  32. #define SW_CLOCK_CYCLE() \
  33. PIN_SWCLK_CLR(); \
  34. PIN_DELAY(); \
  35. PIN_SWCLK_SET(); \
  36. PIN_DELAY()
  37. #define SW_WRITE_BIT(bit) \
  38. PIN_SWDIO_OUT(bit); \
  39. PIN_SWCLK_CLR(); \
  40. PIN_DELAY(); \
  41. PIN_SWCLK_SET(); \
  42. PIN_DELAY()
  43. #define SW_READ_BIT(bit) \
  44. PIN_SWCLK_CLR(); \
  45. PIN_DELAY(); \
  46. bit = PIN_SWDIO_IN(); \
  47. PIN_SWCLK_SET(); \
  48. PIN_DELAY()
  49. #define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay)
  50. // Generate SWJ Sequence
  51. // count: sequence bit count
  52. // data: pointer to sequence bit data
  53. // return: none
  54. #if ((DAP_SWD != 0) || (DAP_JTAG != 0))
  55. void SWJ_Sequence (uint32_t count, const uint8_t *data) {
  56. uint32_t val;
  57. uint32_t n;
  58. val = 0U;
  59. n = 0U;
  60. while (count--) {
  61. if (n == 0U) {
  62. val = *data++;
  63. n = 8U;
  64. }
  65. if (val & 1U) {
  66. PIN_SWDIO_TMS_SET();
  67. } else {
  68. PIN_SWDIO_TMS_CLR();
  69. }
  70. SW_CLOCK_CYCLE();
  71. val >>= 1;
  72. n--;
  73. }
  74. }
  75. #endif
  76. // Generate SWD Sequence
  77. // info: sequence information
  78. // swdo: pointer to SWDIO generated data
  79. // swdi: pointer to SWDIO captured data
  80. // return: none
  81. #if (DAP_SWD != 0)
  82. void SWD_Sequence (uint32_t info, const uint8_t *swdo, uint8_t *swdi) {
  83. uint32_t val;
  84. uint32_t bit;
  85. uint32_t n, k;
  86. n = info & SWD_SEQUENCE_CLK;
  87. if (n == 0U) {
  88. n = 64U;
  89. }
  90. if (info & SWD_SEQUENCE_DIN) {
  91. while (n) {
  92. val = 0U;
  93. for (k = 8U; k && n; k--, n--) {
  94. SW_READ_BIT(bit);
  95. val >>= 1;
  96. val |= bit << 7;
  97. }
  98. val >>= k;
  99. *swdi++ = (uint8_t)val;
  100. }
  101. } else {
  102. while (n) {
  103. val = *swdo++;
  104. for (k = 8U; k && n; k--, n--) {
  105. SW_WRITE_BIT(val);
  106. val >>= 1;
  107. }
  108. }
  109. }
  110. }
  111. #endif
  112. #if (DAP_SWD != 0)
  113. // SWD Transfer I/O
  114. // request: A[3:2] RnW APnDP
  115. // data: DATA[31:0]
  116. // return: ACK[2:0]
  117. #define SWD_TransferFunction(speed) /**/ \
  118. static uint8_t SWD_Transfer##speed (uint32_t request, uint32_t *data) { \
  119. uint32_t ack; \
  120. uint32_t bit; \
  121. uint32_t val; \
  122. uint32_t parity; \
  123. \
  124. uint32_t n; \
  125. \
  126. /* Packet Request */ \
  127. parity = 0U; \
  128. SW_WRITE_BIT(1U); /* Start Bit */ \
  129. bit = request >> 0; \
  130. SW_WRITE_BIT(bit); /* APnDP Bit */ \
  131. parity += bit; \
  132. bit = request >> 1; \
  133. SW_WRITE_BIT(bit); /* RnW Bit */ \
  134. parity += bit; \
  135. bit = request >> 2; \
  136. SW_WRITE_BIT(bit); /* A2 Bit */ \
  137. parity += bit; \
  138. bit = request >> 3; \
  139. SW_WRITE_BIT(bit); /* A3 Bit */ \
  140. parity += bit; \
  141. SW_WRITE_BIT(parity); /* Parity Bit */ \
  142. SW_WRITE_BIT(0U); /* Stop Bit */ \
  143. SW_WRITE_BIT(1U); /* Park Bit */ \
  144. \
  145. /* Turnaround */ \
  146. PIN_SWDIO_OUT_DISABLE(); \
  147. for (n = DAP_Data.swd_conf.turnaround; n; n--) { \
  148. SW_CLOCK_CYCLE(); \
  149. } \
  150. \
  151. /* Acknowledge response */ \
  152. SW_READ_BIT(bit); \
  153. ack = bit << 0; \
  154. SW_READ_BIT(bit); \
  155. ack |= bit << 1; \
  156. SW_READ_BIT(bit); \
  157. ack |= bit << 2; \
  158. \
  159. if (ack == DAP_TRANSFER_OK) { /* OK response */ \
  160. /* Data transfer */ \
  161. if (request & DAP_TRANSFER_RnW) { \
  162. /* Read data */ \
  163. val = 0U; \
  164. parity = 0U; \
  165. for (n = 32U; n; n--) { \
  166. SW_READ_BIT(bit); /* Read RDATA[0:31] */ \
  167. parity += bit; \
  168. val >>= 1; \
  169. val |= bit << 31; \
  170. } \
  171. SW_READ_BIT(bit); /* Read Parity */ \
  172. if ((parity ^ bit) & 1U) { \
  173. ack = DAP_TRANSFER_ERROR; \
  174. } \
  175. if (data) { *data = val; } \
  176. /* Turnaround */ \
  177. for (n = DAP_Data.swd_conf.turnaround; n; n--) { \
  178. SW_CLOCK_CYCLE(); \
  179. } \
  180. PIN_SWDIO_OUT_ENABLE(); \
  181. } else { \
  182. /* Turnaround */ \
  183. for (n = DAP_Data.swd_conf.turnaround; n; n--) { \
  184. SW_CLOCK_CYCLE(); \
  185. } \
  186. PIN_SWDIO_OUT_ENABLE(); \
  187. /* Write data */ \
  188. val = *data; \
  189. parity = 0U; \
  190. for (n = 32U; n; n--) { \
  191. SW_WRITE_BIT(val); /* Write WDATA[0:31] */ \
  192. parity += val; \
  193. val >>= 1; \
  194. } \
  195. SW_WRITE_BIT(parity); /* Write Parity Bit */ \
  196. } \
  197. /* Capture Timestamp */ \
  198. if (request & DAP_TRANSFER_TIMESTAMP) { \
  199. DAP_Data.timestamp = TIMESTAMP_GET(); \
  200. } \
  201. /* Idle cycles */ \
  202. n = DAP_Data.transfer.idle_cycles; \
  203. if (n) { \
  204. PIN_SWDIO_OUT(0U); \
  205. for (; n; n--) { \
  206. SW_CLOCK_CYCLE(); \
  207. } \
  208. } \
  209. PIN_SWDIO_OUT(1U); \
  210. return ((uint8_t)ack); \
  211. } \
  212. \
  213. if ((ack == DAP_TRANSFER_WAIT) || (ack == DAP_TRANSFER_FAULT)) { \
  214. /* WAIT or FAULT response */ \
  215. if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) != 0U)) { \
  216. for (n = 32U+1U; n; n--) { \
  217. SW_CLOCK_CYCLE(); /* Dummy Read RDATA[0:31] + Parity */ \
  218. } \
  219. } \
  220. /* Turnaround */ \
  221. for (n = DAP_Data.swd_conf.turnaround; n; n--) { \
  222. SW_CLOCK_CYCLE(); \
  223. } \
  224. PIN_SWDIO_OUT_ENABLE(); \
  225. if (DAP_Data.swd_conf.data_phase && ((request & DAP_TRANSFER_RnW) == 0U)) { \
  226. PIN_SWDIO_OUT(0U); \
  227. for (n = 32U+1U; n; n--) { \
  228. SW_CLOCK_CYCLE(); /* Dummy Write WDATA[0:31] + Parity */ \
  229. } \
  230. } \
  231. PIN_SWDIO_OUT(1U); \
  232. return ((uint8_t)ack); \
  233. } \
  234. \
  235. /* Protocol error */ \
  236. for (n = DAP_Data.swd_conf.turnaround + 32U + 1U; n; n--) { \
  237. SW_CLOCK_CYCLE(); /* Back off data phase */ \
  238. } \
  239. PIN_SWDIO_OUT_ENABLE(); \
  240. PIN_SWDIO_OUT(1U); \
  241. return ((uint8_t)ack); \
  242. }
  243. #undef PIN_DELAY
  244. #define PIN_DELAY() PIN_DELAY_FAST()
  245. SWD_TransferFunction(Fast)
  246. #undef PIN_DELAY
  247. #define PIN_DELAY() PIN_DELAY_SLOW(DAP_Data.clock_delay)
  248. SWD_TransferFunction(Slow)
  249. // SWD Transfer I/O
  250. // request: A[3:2] RnW APnDP
  251. // data: DATA[31:0]
  252. // return: ACK[2:0]
  253. uint8_t SWD_Transfer(uint32_t request, uint32_t *data) {
  254. if (DAP_Data.fast_clock) {
  255. return SWD_TransferFast(request, data);
  256. } else {
  257. return SWD_TransferSlow(request, data);
  258. }
  259. }
  260. #endif /* (DAP_SWD != 0) */