ARMCM33.h 5.0 KB

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  1. /**************************************************************************//**
  2. * @file ARMCM33.h
  3. * @brief CMSIS Core Peripheral Access Layer Header File for
  4. * ARMCM33 Device (configured for ARMCM33 without FPU, without DSP extension, without TrustZone)
  5. * @version V5.3.2
  6. * @date 01. May 2023
  7. ******************************************************************************/
  8. /*
  9. * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  10. *
  11. * SPDX-License-Identifier: Apache-2.0
  12. *
  13. * Licensed under the Apache License, Version 2.0 (the License); you may
  14. * not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at
  16. *
  17. * www.apache.org/licenses/LICENSE-2.0
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  21. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. */
  25. #ifndef ARMCM33_H
  26. #define ARMCM33_H
  27. #ifdef __cplusplus
  28. extern "C" {
  29. #endif
  30. /* ------------------------- Interrupt Number Definition ------------------------ */
  31. typedef enum IRQn
  32. {
  33. /* ------------------- Processor Exceptions Numbers ----------------------------- */
  34. NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */
  35. HardFault_IRQn = -13, /* 3 HardFault Interrupt */
  36. MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */
  37. BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */
  38. UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */
  39. SecureFault_IRQn = -9, /* 7 Secure Fault Interrupt */
  40. SVCall_IRQn = -5, /* 11 SV Call Interrupt */
  41. DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */
  42. PendSV_IRQn = -2, /* 14 Pend SV Interrupt */
  43. SysTick_IRQn = -1, /* 15 System Tick Interrupt */
  44. /* ------------------- Processor Interrupt Numbers ------------------------------ */
  45. Interrupt0_IRQn = 0,
  46. Interrupt1_IRQn = 1,
  47. Interrupt2_IRQn = 2,
  48. Interrupt3_IRQn = 3,
  49. Interrupt4_IRQn = 4,
  50. Interrupt5_IRQn = 5,
  51. Interrupt6_IRQn = 6,
  52. Interrupt7_IRQn = 7,
  53. Interrupt8_IRQn = 8,
  54. Interrupt9_IRQn = 9,
  55. /* Interrupts 10 .. 479 are left out */
  56. Interrupt480_IRQn = 480
  57. } IRQn_Type;
  58. /* ================================================================================ */
  59. /* ================ Processor and Core Peripheral Section ================ */
  60. /* ================================================================================ */
  61. /* ------- Start of section using anonymous unions and disabling warnings ------- */
  62. #if defined (__CC_ARM)
  63. #pragma push
  64. #pragma anon_unions
  65. #elif defined (__ICCARM__)
  66. #pragma language=extended
  67. #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  68. #pragma clang diagnostic push
  69. #pragma clang diagnostic ignored "-Wc11-extensions"
  70. #pragma clang diagnostic ignored "-Wreserved-id-macro"
  71. #elif defined (__GNUC__)
  72. /* anonymous unions are enabled by default */
  73. #elif defined (__TMS470__)
  74. /* anonymous unions are enabled by default */
  75. #elif defined (__TASKING__)
  76. #pragma warning 586
  77. #elif defined (__CSMC__)
  78. /* anonymous unions are enabled by default */
  79. #else
  80. #warning Not supported compiler type
  81. #endif
  82. /* -------- Configuration of Core Peripherals ----------------------------------- */
  83. #define __CM33_REV 0x0000U /* Core revision r0p1 */
  84. #define __SAUREGION_PRESENT 0U /* SAU regions present */
  85. #define __MPU_PRESENT 1U /* MPU present */
  86. #define __VTOR_PRESENT 1U /* VTOR present */
  87. #define __NVIC_PRIO_BITS 3U /* Number of Bits used for Priority Levels */
  88. #define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */
  89. #define __FPU_PRESENT 0U /* no FPU present */
  90. #define __DSP_PRESENT 0U /* no DSP extension present */
  91. #include "core_cm33.h" /* Processor and core peripherals */
  92. #include "system_ARMCM33.h" /* System Header */
  93. /* -------- End of section using anonymous unions and disabling warnings -------- */
  94. #if defined (__CC_ARM)
  95. #pragma pop
  96. #elif defined (__ICCARM__)
  97. /* leave anonymous unions enabled */
  98. #elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
  99. #pragma clang diagnostic pop
  100. #elif defined (__GNUC__)
  101. /* anonymous unions are enabled by default */
  102. #elif defined (__TMS470__)
  103. /* anonymous unions are enabled by default */
  104. #elif defined (__TASKING__)
  105. #pragma warning restore
  106. #elif defined (__CSMC__)
  107. /* anonymous unions are enabled by default */
  108. #else
  109. #warning Not supported compiler type
  110. #endif
  111. #ifdef __cplusplus
  112. }
  113. #endif
  114. #endif /* ARMCM33_H */