system_ARMv81MML.c 3.1 KB

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  1. /**************************************************************************//**
  2. * @file system_ARMv81MML.c
  3. * @brief CMSIS Device System Source File for
  4. * Armv8.1-M Mainline Device Series
  5. * @version V1.2.1
  6. * @date 27. March 2020
  7. ******************************************************************************/
  8. /*
  9. * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
  10. *
  11. * SPDX-License-Identifier: Apache-2.0
  12. *
  13. * Licensed under the Apache License, Version 2.0 (the License); you may
  14. * not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at
  16. *
  17. * www.apache.org/licenses/LICENSE-2.0
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  21. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. */
  25. #if defined (ARMv81MML_DSP_DP_MVE_FP)
  26. #include "ARMv81MML_DSP_DP_MVE_FP.h"
  27. #else
  28. #error device not specified!
  29. #endif
  30. #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
  31. #include "partition_ARMv81MML.h"
  32. #endif
  33. /*----------------------------------------------------------------------------
  34. Define clocks
  35. *----------------------------------------------------------------------------*/
  36. #define XTAL ( 5000000UL) /* Oscillator frequency */
  37. #define SYSTEM_CLOCK (5U * XTAL)
  38. /*----------------------------------------------------------------------------
  39. Exception / Interrupt Vector table
  40. *----------------------------------------------------------------------------*/
  41. extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
  42. /*----------------------------------------------------------------------------
  43. System Core Clock Variable
  44. *----------------------------------------------------------------------------*/
  45. uint32_t SystemCoreClock = SYSTEM_CLOCK;
  46. /*----------------------------------------------------------------------------
  47. System Core Clock update function
  48. *----------------------------------------------------------------------------*/
  49. void SystemCoreClockUpdate (void)
  50. {
  51. SystemCoreClock = SYSTEM_CLOCK;
  52. }
  53. /*----------------------------------------------------------------------------
  54. System initialization function
  55. *----------------------------------------------------------------------------*/
  56. void SystemInit (void)
  57. {
  58. #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
  59. SCB->VTOR = (uint32_t)(&__VECTOR_TABLE[0]);
  60. #endif
  61. #if (defined (__FPU_USED) && (__FPU_USED == 1U)) || \
  62. (defined (__ARM_FEATURE_MVE) && (__ARM_FEATURE_MVE > 0U))
  63. SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
  64. (3U << 11U*2U) ); /* enable CP11 Full Access */
  65. #endif
  66. #ifdef UNALIGNED_SUPPORT_DISABLE
  67. SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
  68. #endif
  69. // Enable Loop and branch info cache
  70. SCB->CCR |= SCB_CCR_LOB_Msk;
  71. __ISB();
  72. #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
  73. TZ_SAU_Setup();
  74. #endif
  75. SystemCoreClock = SYSTEM_CLOCK;
  76. }