Driver_SAI.h 18 KB

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  1. /*
  2. * Copyright (c) 2013-2020 ARM Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. *
  18. * $Date: 31. March 2020
  19. * $Revision: V1.2
  20. *
  21. * Project: SAI (Serial Audio Interface) Driver definitions
  22. */
  23. /* History:
  24. * Version 1.2
  25. * Removed volatile from ARM_SAI_STATUS
  26. * Version 1.1
  27. * ARM_SAI_STATUS made volatile
  28. * Version 1.0
  29. * Initial release
  30. */
  31. #ifndef DRIVER_SAI_H_
  32. #define DRIVER_SAI_H_
  33. #ifdef __cplusplus
  34. extern "C"
  35. {
  36. #endif
  37. #include "Driver_Common.h"
  38. #define ARM_SAI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,2) /* API version */
  39. #define _ARM_Driver_SAI_(n) Driver_SAI##n
  40. #define ARM_Driver_SAI_(n) _ARM_Driver_SAI_(n)
  41. /****** SAI Control Codes *****/
  42. #define ARM_SAI_CONTROL_Msk (0xFFUL)
  43. #define ARM_SAI_CONFIGURE_TX (0x01UL) ///< Configure Transmitter; arg1 and arg2 provide additional configuration
  44. #define ARM_SAI_CONFIGURE_RX (0x02UL) ///< Configure Receiver; arg1 and arg2 provide additional configuration
  45. #define ARM_SAI_CONTROL_TX (0x03UL) ///< Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute
  46. #define ARM_SAI_CONTROL_RX (0x04UL) ///< Control Receiver; arg1.0: 0=disable (default), 1=enable
  47. #define ARM_SAI_MASK_SLOTS_TX (0x05UL) ///< Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default
  48. #define ARM_SAI_MASK_SLOTS_RX (0x06UL) ///< Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default
  49. #define ARM_SAI_ABORT_SEND (0x07UL) ///< Abort \ref ARM_SAI_Send
  50. #define ARM_SAI_ABORT_RECEIVE (0x08UL) ///< Abort \ref ARM_SAI_Receive
  51. /*----- SAI Control Codes: Configuration Parameters: Mode -----*/
  52. #define ARM_SAI_MODE_Pos 8
  53. #define ARM_SAI_MODE_Msk (1UL << ARM_SAI_MODE_Pos)
  54. #define ARM_SAI_MODE_MASTER (1UL << ARM_SAI_MODE_Pos) ///< Master Mode
  55. #define ARM_SAI_MODE_SLAVE (0UL << ARM_SAI_MODE_Pos) ///< Slave Mode (default)
  56. /*----- SAI Control Codes: Configuration Parameters: Synchronization -----*/
  57. #define ARM_SAI_SYNCHRONIZATION_Pos 9
  58. #define ARM_SAI_SYNCHRONIZATION_Msk (1UL << ARM_SAI_SYNCHRONIZATION_Pos)
  59. #define ARM_SAI_ASYNCHRONOUS (0UL << ARM_SAI_SYNCHRONIZATION_Pos) ///< Asynchronous (default)
  60. #define ARM_SAI_SYNCHRONOUS (1UL << ARM_SAI_SYNCHRONIZATION_Pos) ///< Synchronous
  61. /*----- SAI Control Codes: Configuration Parameters: Protocol -----*/
  62. #define ARM_SAI_PROTOCOL_Pos 10
  63. #define ARM_SAI_PROTOCOL_Msk (7UL << ARM_SAI_PROTOCOL_Pos)
  64. #define ARM_SAI_PROTOCOL_USER (0UL << ARM_SAI_PROTOCOL_Pos) ///< User defined (default)
  65. #define ARM_SAI_PROTOCOL_I2S (1UL << ARM_SAI_PROTOCOL_Pos) ///< I2S
  66. #define ARM_SAI_PROTOCOL_MSB_JUSTIFIED (2UL << ARM_SAI_PROTOCOL_Pos) ///< MSB (left) justified
  67. #define ARM_SAI_PROTOCOL_LSB_JUSTIFIED (3UL << ARM_SAI_PROTOCOL_Pos) ///< LSB (right) justified
  68. #define ARM_SAI_PROTOCOL_PCM_SHORT (4UL << ARM_SAI_PROTOCOL_Pos) ///< PCM with short frame
  69. #define ARM_SAI_PROTOCOL_PCM_LONG (5UL << ARM_SAI_PROTOCOL_Pos) ///< PCM with long frame
  70. #define ARM_SAI_PROTOCOL_AC97 (6UL << ARM_SAI_PROTOCOL_Pos) ///< AC'97
  71. /*----- SAI Control Codes: Configuration Parameters: Data Size -----*/
  72. #define ARM_SAI_DATA_SIZE_Pos 13
  73. #define ARM_SAI_DATA_SIZE_Msk (0x1FUL << ARM_SAI_DATA_SIZE_Pos)
  74. #define ARM_SAI_DATA_SIZE(n) ((((n)-1UL)&0x1FUL) << ARM_SAI_DATA_SIZE_Pos) ///< Data size in bits (8..32)
  75. /*----- SAI Control Codes: Configuration Parameters: Bit Order -----*/
  76. #define ARM_SAI_BIT_ORDER_Pos 18
  77. #define ARM_SAI_BIT_ORDER_Msk (1UL << ARM_SAI_BIT_ORDER_Pos)
  78. #define ARM_SAI_MSB_FIRST (0UL << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with MSB first (default)
  79. #define ARM_SAI_LSB_FIRST (1UL << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with LSB first; User Protocol only (ignored otherwise)
  80. /*----- SAI Control Codes: Configuration Parameters: Mono Mode -----*/
  81. #define ARM_SAI_MONO_MODE (1UL << 19) ///< Mono Mode (only for I2S, MSB/LSB justified)
  82. /*----- SAI Control Codes:Configuration Parameters: Companding -----*/
  83. #define ARM_SAI_COMPANDING_Pos 20
  84. #define ARM_SAI_COMPANDING_Msk (3UL << ARM_SAI_COMPANDING_Pos)
  85. #define ARM_SAI_COMPANDING_NONE (0UL << ARM_SAI_COMPANDING_Pos) ///< No companding (default)
  86. #define ARM_SAI_COMPANDING_A_LAW (2UL << ARM_SAI_COMPANDING_Pos) ///< A-Law companding
  87. #define ARM_SAI_COMPANDING_U_LAW (3UL << ARM_SAI_COMPANDING_Pos) ///< u-Law companding
  88. /*----- SAI Control Codes: Configuration Parameters: Clock Polarity -----*/
  89. #define ARM_SAI_CLOCK_POLARITY_Pos 23
  90. #define ARM_SAI_CLOCK_POLARITY_Msk (1UL << ARM_SAI_CLOCK_POLARITY_Pos)
  91. #define ARM_SAI_CLOCK_POLARITY_0 (0UL << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on falling edge, Capture on rising edge (default)
  92. #define ARM_SAI_CLOCK_POLARITY_1 (1UL << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on rising edge, Capture on falling edge
  93. /*----- SAI Control Codes: Configuration Parameters: Master Clock Pin -----*/
  94. #define ARM_SAI_MCLK_PIN_Pos 24
  95. #define ARM_SAI_MCLK_PIN_Msk (3UL << ARM_SAI_MCLK_PIN_Pos)
  96. #define ARM_SAI_MCLK_PIN_INACTIVE (0UL << ARM_SAI_MCLK_PIN_Pos) ///< MCLK not used (default)
  97. #define ARM_SAI_MCLK_PIN_OUTPUT (1UL << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is output (Master only)
  98. #define ARM_SAI_MCLK_PIN_INPUT (2UL << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is input (Master only)
  99. /****** SAI Configuration (arg1) *****/
  100. /*----- SAI Configuration (arg1): Frame Length -----*/
  101. #define ARM_SAI_FRAME_LENGTH_Pos 0
  102. #define ARM_SAI_FRAME_LENGTH_Msk (0x3FFUL << ARM_SAI_FRAME_LENGTH_Pos)
  103. #define ARM_SAI_FRAME_LENGTH(n) ((((n)-1UL)&0x3FFUL) << ARM_SAI_FRAME_LENGTH_Pos) ///< Frame length in bits (8..1024); default depends on protocol and data
  104. /*----- SAI Configuration (arg1): Frame Sync Width -----*/
  105. #define ARM_SAI_FRAME_SYNC_WIDTH_Pos 10
  106. #define ARM_SAI_FRAME_SYNC_WIDTH_Msk (0xFFUL << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
  107. #define ARM_SAI_FRAME_SYNC_WIDTH(n) ((((n)-1UL)&0xFFUL) << ARM_SAI_FRAME_SYNC_WIDTH_Pos) ///< Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise)
  108. /*----- SAI Configuration (arg1): Frame Sync Polarity -----*/
  109. #define ARM_SAI_FRAME_SYNC_POLARITY_Pos 18
  110. #define ARM_SAI_FRAME_SYNC_POLARITY_Msk (1UL << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
  111. #define ARM_SAI_FRAME_SYNC_POLARITY_HIGH (0UL << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active high (default); User Protocol only (ignored otherwise)
  112. #define ARM_SAI_FRAME_SYNC_POLARITY_LOW (1UL << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active low; User Protocol only (ignored otherwise)
  113. /*----- SAI Configuration (arg1): Frame Sync Early -----*/
  114. #define ARM_SAI_FRAME_SYNC_EARLY (1UL << 19) ///< Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise)
  115. /*----- SAI Configuration (arg1): Slot Count -----*/
  116. #define ARM_SAI_SLOT_COUNT_Pos 20
  117. #define ARM_SAI_SLOT_COUNT_Msk (0x1FUL << ARM_SAI_SLOT_COUNT_Pos)
  118. #define ARM_SAI_SLOT_COUNT(n) ((((n)-1UL)&0x1FUL) << ARM_SAI_SLOT_COUNT_Pos) ///< Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise)
  119. /*----- SAI Configuration (arg1): Slot Size -----*/
  120. #define ARM_SAI_SLOT_SIZE_Pos 25
  121. #define ARM_SAI_SLOT_SIZE_Msk (3UL << ARM_SAI_SLOT_SIZE_Pos)
  122. #define ARM_SAI_SLOT_SIZE_DEFAULT (0UL << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size is equal to data size (default)
  123. #define ARM_SAI_SLOT_SIZE_16 (1UL << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 16 bits; User Protocol only (ignored otherwise)
  124. #define ARM_SAI_SLOT_SIZE_32 (3UL << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 32 bits; User Protocol only (ignored otherwise)
  125. /*----- SAI Configuration (arg1): Slot Offset -----*/
  126. #define ARM_SAI_SLOT_OFFSET_Pos 27
  127. #define ARM_SAI_SLOT_OFFSET_Msk (0x1FUL << ARM_SAI_SLOT_OFFSET_Pos)
  128. #define ARM_SAI_SLOT_OFFSET(n) (((n)&0x1FUL) << ARM_SAI_SLOT_OFFSET_Pos) ///< Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise)
  129. /****** SAI Configuration (arg2) *****/
  130. /*----- SAI Control Codes: Configuration Parameters: Audio Frequency (Master only) -----*/
  131. #define ARM_SAI_AUDIO_FREQ_Msk (0x0FFFFFUL) ///< Audio frequency mask
  132. /*----- SAI Control Codes: Configuration Parameters: Master Clock Prescaler (Master only and MCLK Pin) -----*/
  133. #define ARM_SAI_MCLK_PRESCALER_Pos 20
  134. #define ARM_SAI_MCLK_PRESCALER_Msk (0xFFFUL << ARM_SAI_MCLK_PRESCALER_Pos)
  135. #define ARM_SAI_MCLK_PRESCALER(n) ((((n)-1UL)&0xFFFUL) << ARM_SAI_MCLK_PRESCALER_Pos) ///< MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1)
  136. /****** SAI specific error codes *****/
  137. #define ARM_SAI_ERROR_SYNCHRONIZATION (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Synchronization not supported
  138. #define ARM_SAI_ERROR_PROTOCOL (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified Protocol not supported
  139. #define ARM_SAI_ERROR_DATA_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified Data size not supported
  140. #define ARM_SAI_ERROR_BIT_ORDER (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Bit order not supported
  141. #define ARM_SAI_ERROR_MONO_MODE (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified Mono mode not supported
  142. #define ARM_SAI_ERROR_COMPANDING (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Companding not supported
  143. #define ARM_SAI_ERROR_CLOCK_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock polarity not supported
  144. #define ARM_SAI_ERROR_AUDIO_FREQ (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Audio frequency not supported
  145. #define ARM_SAI_ERROR_MCLK_PIN (ARM_DRIVER_ERROR_SPECIFIC - 9) ///< Specified MCLK Pin setting not supported
  146. #define ARM_SAI_ERROR_MCLK_PRESCALER (ARM_DRIVER_ERROR_SPECIFIC - 10) ///< Specified MCLK Prescaler not supported
  147. #define ARM_SAI_ERROR_FRAME_LENGTH (ARM_DRIVER_ERROR_SPECIFIC - 11) ///< Specified Frame length not supported
  148. #define ARM_SAI_ERROR_FRAME_LENGHT (ARM_DRIVER_ERROR_SPECIFIC - 11) ///< Specified Frame length not supported @deprecated use \ref ARM_SAI_ERROR_FRAME_LENGTH instead
  149. #define ARM_SAI_ERROR_FRAME_SYNC_WIDTH (ARM_DRIVER_ERROR_SPECIFIC - 12) ///< Specified Frame Sync width not supported
  150. #define ARM_SAI_ERROR_FRAME_SYNC_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 13) ///< Specified Frame Sync polarity not supported
  151. #define ARM_SAI_ERROR_FRAME_SYNC_EARLY (ARM_DRIVER_ERROR_SPECIFIC - 14) ///< Specified Frame Sync early not supported
  152. #define ARM_SAI_ERROR_SLOT_COUNT (ARM_DRIVER_ERROR_SPECIFIC - 15) ///< Specified Slot count not supported
  153. #define ARM_SAI_ERROR_SLOT_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 16) ///< Specified Slot size not supported
  154. #define ARM_SAI_ERROR_SLOT_OFFESET (ARM_DRIVER_ERROR_SPECIFIC - 17) ///< Specified Slot offset not supported
  155. /**
  156. \brief SAI Status
  157. */
  158. typedef struct _ARM_SAI_STATUS {
  159. uint32_t tx_busy : 1; ///< Transmitter busy flag
  160. uint32_t rx_busy : 1; ///< Receiver busy flag
  161. uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation)
  162. uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation)
  163. uint32_t frame_error : 1; ///< Sync Frame error detected (cleared on start of next send/receive operation)
  164. uint32_t reserved : 27;
  165. } ARM_SAI_STATUS;
  166. /****** SAI Event *****/
  167. #define ARM_SAI_EVENT_SEND_COMPLETE (1UL << 0) ///< Send completed
  168. #define ARM_SAI_EVENT_RECEIVE_COMPLETE (1UL << 1) ///< Receive completed
  169. #define ARM_SAI_EVENT_TX_UNDERFLOW (1UL << 2) ///< Transmit data not available
  170. #define ARM_SAI_EVENT_RX_OVERFLOW (1UL << 3) ///< Receive data overflow
  171. #define ARM_SAI_EVENT_FRAME_ERROR (1UL << 4) ///< Sync Frame error in Slave mode (optional)
  172. // Function documentation
  173. /**
  174. \fn ARM_DRIVER_VERSION ARM_SAI_GetVersion (void)
  175. \brief Get driver version.
  176. \return \ref ARM_DRIVER_VERSION
  177. \fn ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void)
  178. \brief Get driver capabilities.
  179. \return \ref ARM_SAI_CAPABILITIES
  180. \fn int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event)
  181. \brief Initialize SAI Interface.
  182. \param[in] cb_event Pointer to \ref ARM_SAI_SignalEvent
  183. \return \ref execution_status
  184. \fn int32_t ARM_SAI_Uninitialize (void)
  185. \brief De-initialize SAI Interface.
  186. \return \ref execution_status
  187. \fn int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state)
  188. \brief Control SAI Interface Power.
  189. \param[in] state Power state
  190. \return \ref execution_status
  191. \fn int32_t ARM_SAI_Send (const void *data, uint32_t num)
  192. \brief Start sending data to SAI transmitter.
  193. \param[in] data Pointer to buffer with data to send to SAI transmitter
  194. \param[in] num Number of data items to send
  195. \return \ref execution_status
  196. \fn int32_t ARM_SAI_Receive (void *data, uint32_t num)
  197. \brief Start receiving data from SAI receiver.
  198. \param[out] data Pointer to buffer for data to receive from SAI receiver
  199. \param[in] num Number of data items to receive
  200. \return \ref execution_status
  201. \fn uint32_t ARM_SAI_GetTxCount (void)
  202. \brief Get transmitted data count.
  203. \return number of data items transmitted
  204. \fn uint32_t ARM_SAI_GetRxCount (void)
  205. \brief Get received data count.
  206. \return number of data items received
  207. \fn int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2)
  208. \brief Control SAI Interface.
  209. \param[in] control Operation
  210. \param[in] arg1 Argument 1 of operation (optional)
  211. \param[in] arg2 Argument 2 of operation (optional)
  212. \return common \ref execution_status and driver specific \ref sai_execution_status
  213. \fn ARM_SAI_STATUS ARM_SAI_GetStatus (void)
  214. \brief Get SAI status.
  215. \return SAI status \ref ARM_SAI_STATUS
  216. \fn void ARM_SAI_SignalEvent (uint32_t event)
  217. \brief Signal SAI Events.
  218. \param[in] event \ref SAI_events notification mask
  219. \return none
  220. */
  221. typedef void (*ARM_SAI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_SAI_SignalEvent : Signal SAI Event.
  222. /**
  223. \brief SAI Driver Capabilities.
  224. */
  225. typedef struct _ARM_SAI_CAPABILITIES {
  226. uint32_t asynchronous : 1; ///< supports asynchronous Transmit/Receive
  227. uint32_t synchronous : 1; ///< supports synchronous Transmit/Receive
  228. uint32_t protocol_user : 1; ///< supports user defined Protocol
  229. uint32_t protocol_i2s : 1; ///< supports I2S Protocol
  230. uint32_t protocol_justified : 1; ///< supports MSB/LSB justified Protocol
  231. uint32_t protocol_pcm : 1; ///< supports PCM short/long frame Protocol
  232. uint32_t protocol_ac97 : 1; ///< supports AC'97 Protocol
  233. uint32_t mono_mode : 1; ///< supports Mono mode
  234. uint32_t companding : 1; ///< supports Companding
  235. uint32_t mclk_pin : 1; ///< supports MCLK (Master Clock) pin
  236. uint32_t event_frame_error : 1; ///< supports Frame error event: \ref ARM_SAI_EVENT_FRAME_ERROR
  237. uint32_t reserved : 21; ///< Reserved (must be zero)
  238. } ARM_SAI_CAPABILITIES;
  239. /**
  240. \brief Access structure of the SAI Driver.
  241. */
  242. typedef struct _ARM_DRIVER_SAI {
  243. ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_SAI_GetVersion : Get driver version.
  244. ARM_SAI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_SAI_GetCapabilities : Get driver capabilities.
  245. int32_t (*Initialize) (ARM_SAI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_SAI_Initialize : Initialize SAI Interface.
  246. int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_SAI_Uninitialize : De-initialize SAI Interface.
  247. int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_SAI_PowerControl : Control SAI Interface Power.
  248. int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Send : Start sending data to SAI Interface.
  249. int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Receive : Start receiving data from SAI Interface.
  250. uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_SAI_GetTxCount : Get transmitted data count.
  251. uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_SAI_GetRxCount : Get received data count.
  252. int32_t (*Control) (uint32_t control, uint32_t arg1, uint32_t arg2); ///< Pointer to \ref ARM_SAI_Control : Control SAI Interface.
  253. ARM_SAI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_SAI_GetStatus : Get SAI status.
  254. } const ARM_DRIVER_SAI;
  255. #ifdef __cplusplus
  256. }
  257. #endif
  258. #endif /* DRIVER_SAI_H_ */