arm_depthwise_conv_3x3_s8.c 8.8 KB

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  1. /*
  2. * Copyright (C) 2010-2020 Arm Limited or its affiliates. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_depthwise_conv_3x3_s8.c
  21. * Description: Optimized s8 depthwise convolution function for channel
  22. * multiplier of 1 and 3x3 kernel size.
  23. *
  24. * $Date: 09. October 2020
  25. * $Revision: V.2.0.1
  26. *
  27. * Target Processor: Cortex-M CPUs
  28. *
  29. * -------------------------------------------------------------------- */
  30. #include "arm_nnfunctions.h"
  31. #include "arm_nnsupportfunctions.h"
  32. /**
  33. * @ingroup groupNN
  34. */
  35. /**
  36. * @addtogroup NNConv
  37. * @{
  38. */
  39. /*
  40. * Optimized s8 depthwise convolution function with constraint that
  41. * in_channel == out_channel and kernel_x == kernel_y == 3 with pads at most 1
  42. *
  43. * Refer prototype header file for details.
  44. *
  45. */
  46. arm_status arm_depthwise_conv_3x3_s8(const cmsis_nn_context *ctx,
  47. const cmsis_nn_dw_conv_params *dw_conv_params,
  48. const cmsis_nn_per_channel_quant_params *quant_params,
  49. const cmsis_nn_dims *input_dims,
  50. const q7_t *input,
  51. const cmsis_nn_dims *filter_dims,
  52. const q7_t *kernel,
  53. const cmsis_nn_dims *bias_dims,
  54. const int32_t *bias,
  55. const cmsis_nn_dims *output_dims,
  56. q7_t *output)
  57. {
  58. (void)ctx;
  59. (void)bias_dims;
  60. const int32_t input_x = input_dims->w;
  61. const int32_t input_y = input_dims->h;
  62. const int32_t input_ch = input_dims->c;
  63. const int32_t output_ch = output_dims->c;
  64. const int32_t pad_x = dw_conv_params->padding.w;
  65. const int32_t pad_y = dw_conv_params->padding.h;
  66. const int32_t stride_x = dw_conv_params->stride.w;
  67. const int32_t stride_y = dw_conv_params->stride.h;
  68. const int32_t *output_shift = quant_params->shift;
  69. const int32_t *output_mult = quant_params->multiplier;
  70. const int32_t output_x = output_dims->w;
  71. const int32_t output_y = output_dims->h;
  72. const int32_t output_offset = dw_conv_params->output_offset;
  73. const int32_t input_offset = dw_conv_params->input_offset;
  74. const int32_t output_activation_min = dw_conv_params->activation.min;
  75. const int32_t output_activation_max = dw_conv_params->activation.max;
  76. /* Check input constraints input_ch == output_ch */
  77. if (input_ch != output_ch)
  78. {
  79. return ARM_MATH_SIZE_MISMATCH;
  80. }
  81. /* Check input constraints pad_x <= 1 */
  82. if (pad_x > 1 || filter_dims->w != 3 || filter_dims->h != 3)
  83. {
  84. return ARM_MATH_ARGUMENT_ERROR;
  85. }
  86. for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h)
  87. {
  88. for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w)
  89. {
  90. int32_t in_ch = 0;
  91. int32_t ker_w_start = MAX(0, -in_w);
  92. for (; in_ch <= (input_ch - 4); in_ch += 4)
  93. {
  94. int32_t out_buff0 = bias[in_ch + 0];
  95. int32_t out_buff1 = bias[in_ch + 1];
  96. int32_t out_buff2 = bias[in_ch + 2];
  97. int32_t out_buff3 = bias[in_ch + 3];
  98. const int8_t *input_ptr = input + (in_h + ker_h_start) * (input_ch * input_x) + in_w * input_ch + in_ch;
  99. const int8_t *kernel_ptr = kernel + ker_h_start * (input_ch * 3) + in_ch;
  100. for (int32_t ker_h = ker_h_start; ker_h < MIN(3, input_y - in_h); ++ker_h)
  101. {
  102. int32_t in_val = 0;
  103. int32_t ker_val = 0;
  104. if (ker_w_start == 0)
  105. {
  106. in_val = arm_nn_read_q7x4(input_ptr);
  107. ker_val = arm_nn_read_q7x4(kernel_ptr);
  108. out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val;
  109. out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8);
  110. out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16);
  111. out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24);
  112. }
  113. in_val = arm_nn_read_q7x4(input_ptr + input_ch);
  114. ker_val = arm_nn_read_q7x4(kernel_ptr + input_ch);
  115. out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val;
  116. out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8);
  117. out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16);
  118. out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24);
  119. if ((input_x - in_w) >= 3)
  120. {
  121. in_val = arm_nn_read_q7x4(input_ptr + (input_ch << 1));
  122. ker_val = arm_nn_read_q7x4(kernel_ptr + (input_ch << 1));
  123. out_buff0 += ((int8_t)in_val + input_offset) * (int8_t)ker_val;
  124. out_buff1 += ((int8_t)(in_val >> 8) + input_offset) * (int8_t)(ker_val >> 8);
  125. out_buff2 += ((int8_t)(in_val >> 16) + input_offset) * (int8_t)(ker_val >> 16);
  126. out_buff3 += ((int8_t)(in_val >> 24) + input_offset) * (int8_t)(ker_val >> 24);
  127. }
  128. input_ptr += (input_ch * input_x);
  129. kernel_ptr += (input_ch * 3);
  130. }
  131. out_buff0 = arm_nn_requantize(out_buff0, output_mult[in_ch + 0], output_shift[in_ch + 0]);
  132. out_buff1 = arm_nn_requantize(out_buff1, output_mult[in_ch + 1], output_shift[in_ch + 1]);
  133. out_buff2 = arm_nn_requantize(out_buff2, output_mult[in_ch + 2], output_shift[in_ch + 2]);
  134. out_buff3 = arm_nn_requantize(out_buff3, output_mult[in_ch + 3], output_shift[in_ch + 3]);
  135. out_buff0 += output_offset;
  136. out_buff1 += output_offset;
  137. out_buff2 += output_offset;
  138. out_buff3 += output_offset;
  139. out_buff0 = MIN(MAX(out_buff0, output_activation_min), output_activation_max);
  140. out_buff1 = MIN(MAX(out_buff1, output_activation_min), output_activation_max);
  141. out_buff2 = MIN(MAX(out_buff2, output_activation_min), output_activation_max);
  142. out_buff3 = MIN(MAX(out_buff3, output_activation_min), output_activation_max);
  143. output[out_idx++] = (int8_t)out_buff0;
  144. output[out_idx++] = (int8_t)out_buff1;
  145. output[out_idx++] = (int8_t)out_buff2;
  146. output[out_idx++] = (int8_t)out_buff3;
  147. }
  148. // Leftover
  149. for (; in_ch < input_ch; ++in_ch)
  150. {
  151. int32_t out_buff = bias[in_ch];
  152. const int8_t *input_ptr = input + (in_h + ker_h_start) * (input_ch * input_x) + in_w * input_ch + in_ch;
  153. const int8_t *kernel_ptr = kernel + ker_h_start * (input_ch * 3) + in_ch;
  154. for (int32_t ker_h = ker_h_start; ker_h < MIN(3, input_y - in_h); ++ker_h)
  155. {
  156. if (ker_w_start == 0)
  157. {
  158. out_buff += (*(input_ptr) + input_offset) * *(kernel_ptr);
  159. }
  160. out_buff += (*(input_ptr + input_ch) + input_offset) * *(kernel_ptr + input_ch);
  161. if ((input_x - in_w) >= 3)
  162. {
  163. out_buff += (*(input_ptr + (input_ch << 1)) + input_offset) * *(kernel_ptr + (input_ch << 1));
  164. }
  165. input_ptr += (input_ch * input_x);
  166. kernel_ptr += (input_ch * 3);
  167. }
  168. out_buff = arm_nn_requantize(out_buff, output_mult[in_ch], output_shift[in_ch]);
  169. out_buff += output_offset;
  170. out_buff = MIN(MAX(out_buff, output_activation_min), output_activation_max);
  171. output[out_idx++] = (int8_t)out_buff;
  172. }
  173. }
  174. }
  175. /* Return to application */
  176. return ARM_MATH_SUCCESS;
  177. }
  178. /**
  179. * @} end of NNConv group
  180. */