arm_depthwise_conv_s8.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347
  1. /*
  2. * Copyright (C) 2010-2021 Arm Limited or its affiliates.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. /* ----------------------------------------------------------------------
  19. * Project: CMSIS NN Library
  20. * Title: arm_depthwise_conv_s8.c
  21. * Description: s8 version of depthwise convolution.
  22. *
  23. * $Date: 30. Dec 2021
  24. * $Revision: V.2.7.1
  25. *
  26. * Target Processor: Cortex-M CPUs
  27. *
  28. * -------------------------------------------------------------------- */
  29. #include "arm_nnfunctions.h"
  30. #include "arm_nnsupportfunctions.h"
  31. /**
  32. * @ingroup groupNN
  33. */
  34. /**
  35. * @addtogroup NNConv
  36. * @{
  37. */
  38. static void depthwise_conv_s8_mult_4(const int8_t *input,
  39. const int32_t input_x,
  40. const int32_t input_y,
  41. const int32_t input_ch,
  42. const int8_t *kernel,
  43. const int32_t output_ch,
  44. const int32_t ch_mult,
  45. const int32_t kernel_x,
  46. const int32_t kernel_y,
  47. const int32_t pad_x,
  48. const int32_t pad_y,
  49. const int32_t stride_x,
  50. const int32_t stride_y,
  51. const int32_t *bias,
  52. int8_t *output,
  53. const int32_t *output_shift,
  54. const int32_t *output_mult,
  55. const int32_t output_x,
  56. const int32_t output_y,
  57. const int32_t output_offset,
  58. const int32_t input_offset,
  59. const int32_t output_activation_min,
  60. const int32_t output_activation_max)
  61. {
  62. for (int32_t in_h = -pad_y, out_h = 0, out_idx = 0; out_h < output_y; in_h += stride_y, ++out_h)
  63. {
  64. for (int32_t in_w = -pad_x, out_w = 0, ker_h_start = MAX(0, -in_h); out_w < output_x; in_w += stride_x, ++out_w)
  65. {
  66. for (int32_t in_ch = 0, out_ch = 0, ker_w_start = MAX(0, -in_w); out_ch < output_ch;
  67. ++in_ch, out_ch += ch_mult)
  68. {
  69. for (int mult_tile = 0; mult_tile < ch_mult; mult_tile += 4)
  70. {
  71. int32_t out_buff[4] = {0, 0, 0, 0};
  72. if (bias)
  73. {
  74. out_buff[0] = bias[out_ch + 0 + mult_tile];
  75. out_buff[1] = bias[out_ch + 1 + mult_tile];
  76. out_buff[2] = bias[out_ch + 2 + mult_tile];
  77. out_buff[3] = bias[out_ch + 3 + mult_tile];
  78. }
  79. for (int32_t ker_h = ker_h_start; ker_h < MIN(kernel_y, input_y - in_h); ++ker_h)
  80. {
  81. int32_t ker_idx = ker_h * (output_ch * kernel_x) + ker_w_start * output_ch + out_ch;
  82. int32_t in_idx = (in_h + ker_h) * (input_ch * input_x) + in_w * input_ch + in_ch;
  83. #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  84. #pragma clang loop unroll(disable)
  85. #endif
  86. for (int32_t ker_w = ker_w_start; ker_w < MIN(kernel_x, input_x - in_w);
  87. ++ker_w, ker_idx += output_ch)
  88. {
  89. int32_t in_val = input[in_idx + ker_w * input_ch] + input_offset;
  90. out_buff[0] += in_val * kernel[ker_idx + 0 + mult_tile];
  91. out_buff[1] += in_val * kernel[ker_idx + 1 + mult_tile];
  92. out_buff[2] += in_val * kernel[ker_idx + 2 + mult_tile];
  93. out_buff[3] += in_val * kernel[ker_idx + 3 + mult_tile];
  94. }
  95. }
  96. #if defined(ARM_MATH_MVEI)
  97. (void)out_idx;
  98. int32x4_t res = vldrwq_s32(out_buff);
  99. res = arm_requantize_mve_32x4(res,
  100. vldrwq_s32(&output_mult[out_ch + mult_tile]),
  101. vldrwq_s32(&output_shift[out_ch + mult_tile]));
  102. res = vaddq_n_s32(res, output_offset);
  103. res = vmaxq_s32(res, vdupq_n_s32(output_activation_min));
  104. res = vminq_s32(res, vdupq_n_s32(output_activation_max));
  105. vstrbq_s32(output, res);
  106. output += 4;
  107. #else
  108. out_buff[0] = arm_nn_requantize(
  109. out_buff[0], output_mult[out_ch + 0 + mult_tile], output_shift[out_ch + 0 + mult_tile]);
  110. out_buff[1] = arm_nn_requantize(
  111. out_buff[1], output_mult[out_ch + 1 + mult_tile], output_shift[out_ch + 1 + mult_tile]);
  112. out_buff[2] = arm_nn_requantize(
  113. out_buff[2], output_mult[out_ch + 2 + mult_tile], output_shift[out_ch + 2 + mult_tile]);
  114. out_buff[3] = arm_nn_requantize(
  115. out_buff[3], output_mult[out_ch + 3 + mult_tile], output_shift[out_ch + 3 + mult_tile]);
  116. out_buff[0] += output_offset;
  117. out_buff[1] += output_offset;
  118. out_buff[2] += output_offset;
  119. out_buff[3] += output_offset;
  120. out_buff[0] = MIN(MAX(out_buff[0], output_activation_min), output_activation_max);
  121. out_buff[1] = MIN(MAX(out_buff[1], output_activation_min), output_activation_max);
  122. out_buff[2] = MIN(MAX(out_buff[2], output_activation_min), output_activation_max);
  123. out_buff[3] = MIN(MAX(out_buff[3], output_activation_min), output_activation_max);
  124. output[out_idx++] = (int8_t)out_buff[0];
  125. output[out_idx++] = (int8_t)out_buff[1];
  126. output[out_idx++] = (int8_t)out_buff[2];
  127. output[out_idx++] = (int8_t)out_buff[3];
  128. #endif
  129. }
  130. }
  131. }
  132. }
  133. }
  134. static void depthwise_conv_s8_generic(const q7_t *input,
  135. const uint16_t input_batches,
  136. const uint16_t input_x,
  137. const uint16_t input_y,
  138. const uint16_t input_ch,
  139. const q7_t *kernel,
  140. const uint16_t output_ch,
  141. const uint16_t ch_mult,
  142. const uint16_t kernel_x,
  143. const uint16_t kernel_y,
  144. const uint16_t pad_x,
  145. const uint16_t pad_y,
  146. const uint16_t stride_x,
  147. const uint16_t stride_y,
  148. const int32_t *bias,
  149. q7_t *output,
  150. const int32_t *output_shift,
  151. const int32_t *output_mult,
  152. const uint16_t output_x,
  153. const uint16_t output_y,
  154. const int32_t output_offset,
  155. const int32_t input_offset,
  156. const int32_t output_activation_min,
  157. const int32_t output_activation_max,
  158. const uint16_t dilation_x,
  159. const uint16_t dilation_y)
  160. {
  161. (void)output_ch;
  162. int i_out = 0;
  163. int i_batch;
  164. for (i_batch = 0; i_batch < input_batches; i_batch++)
  165. {
  166. for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
  167. {
  168. const int16_t base_idx_y = (i_out_y * stride_y) - pad_y;
  169. for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
  170. {
  171. const int16_t base_idx_x = (i_out_x * stride_x) - pad_x;
  172. for (int i_input_ch = 0; i_input_ch < input_ch; i_input_ch++)
  173. {
  174. for (int i_ch_mult = 0; i_ch_mult < ch_mult; i_ch_mult++)
  175. {
  176. const int idx_out_ch = i_ch_mult + i_input_ch * ch_mult;
  177. int32_t acc_0 = 0;
  178. int ker_y_start;
  179. int ker_x_start;
  180. int ker_y_end;
  181. int ker_x_end;
  182. if (dilation_x > 1)
  183. {
  184. const int32_t start_x_max = (-base_idx_x + dilation_x - 1) / dilation_x;
  185. ker_x_start = MAX(0, start_x_max);
  186. const int32_t end_min_x = (input_x - base_idx_x + dilation_x - 1) / dilation_x;
  187. ker_x_end = MIN(kernel_x, end_min_x);
  188. }
  189. else
  190. {
  191. ker_x_start = MAX(0, -base_idx_x);
  192. ker_x_end = MIN(kernel_x, input_x - base_idx_x);
  193. }
  194. if (dilation_y > 1)
  195. {
  196. const int32_t start_y_max = (-base_idx_y + dilation_y - 1) / dilation_y;
  197. ker_y_start = MAX(0, start_y_max);
  198. const int32_t end_min_y = (input_y - base_idx_y + dilation_y - 1) / dilation_y;
  199. ker_y_end = MIN(kernel_y, end_min_y);
  200. }
  201. else
  202. {
  203. ker_y_start = MAX(0, -base_idx_y);
  204. ker_y_end = MIN(kernel_y, input_y - base_idx_y);
  205. }
  206. if (bias)
  207. {
  208. acc_0 = bias[idx_out_ch];
  209. }
  210. for (int i_ker_y = ker_y_start; i_ker_y < ker_y_end; i_ker_y++)
  211. {
  212. const int32_t idx_y = base_idx_y + dilation_y * i_ker_y;
  213. for (int i_ker_x = ker_x_start; i_ker_x < ker_x_end; i_ker_x++)
  214. {
  215. const int32_t idx_x = base_idx_x + dilation_x * i_ker_x;
  216. int32_t idx_0 = (idx_y * input_x + idx_x) * input_ch + i_input_ch;
  217. int32_t ker_idx_0 = (i_ker_y * kernel_x + i_ker_x) * (input_ch * ch_mult) + idx_out_ch;
  218. acc_0 += (input[idx_0] + input_offset) * kernel[ker_idx_0];
  219. }
  220. }
  221. /* Requantize and clamp output to provided range */
  222. acc_0 = arm_nn_requantize(acc_0, output_mult[idx_out_ch], output_shift[idx_out_ch]);
  223. acc_0 += output_offset;
  224. acc_0 = MAX(acc_0, output_activation_min);
  225. acc_0 = MIN(acc_0, output_activation_max);
  226. output[i_out++] = acc_0;
  227. }
  228. }
  229. }
  230. }
  231. /* Advance to the next batch */
  232. input += (input_x * input_y * input_ch);
  233. }
  234. }
  235. /*
  236. * Basic s8 depthwise convolution function.
  237. *
  238. * Refer header file for details.
  239. * Optimization using DSP extension is not available for the generic case where channel multiplier is > 1.
  240. *
  241. */
  242. arm_status arm_depthwise_conv_s8(const cmsis_nn_context *ctx,
  243. const cmsis_nn_dw_conv_params *dw_conv_params,
  244. const cmsis_nn_per_channel_quant_params *quant_params,
  245. const cmsis_nn_dims *input_dims,
  246. const q7_t *input,
  247. const cmsis_nn_dims *filter_dims,
  248. const q7_t *kernel,
  249. const cmsis_nn_dims *bias_dims,
  250. const int32_t *bias,
  251. const cmsis_nn_dims *output_dims,
  252. q7_t *output)
  253. {
  254. const uint16_t dilation_x = dw_conv_params->dilation.w;
  255. const uint16_t dilation_y = dw_conv_params->dilation.h;
  256. (void)dw_conv_params->dilation;
  257. (void)bias_dims;
  258. (void)ctx;
  259. if (dw_conv_params->ch_mult % 4 == 0 && input_dims->n == 1 && dw_conv_params->dilation.w == 1 &&
  260. dw_conv_params->dilation.h == 1)
  261. {
  262. depthwise_conv_s8_mult_4(input,
  263. input_dims->w,
  264. input_dims->h,
  265. input_dims->c,
  266. kernel,
  267. output_dims->c,
  268. dw_conv_params->ch_mult,
  269. filter_dims->w,
  270. filter_dims->h,
  271. dw_conv_params->padding.w,
  272. dw_conv_params->padding.h,
  273. dw_conv_params->stride.w,
  274. dw_conv_params->stride.h,
  275. bias,
  276. output,
  277. quant_params->shift,
  278. quant_params->multiplier,
  279. output_dims->w,
  280. output_dims->h,
  281. dw_conv_params->output_offset,
  282. dw_conv_params->input_offset,
  283. dw_conv_params->activation.min,
  284. dw_conv_params->activation.max);
  285. }
  286. else
  287. {
  288. depthwise_conv_s8_generic(input,
  289. input_dims->n,
  290. input_dims->w,
  291. input_dims->h,
  292. input_dims->c,
  293. kernel,
  294. output_dims->c,
  295. dw_conv_params->ch_mult,
  296. filter_dims->w,
  297. filter_dims->h,
  298. dw_conv_params->padding.w,
  299. dw_conv_params->padding.h,
  300. dw_conv_params->stride.w,
  301. dw_conv_params->stride.h,
  302. bias,
  303. output,
  304. quant_params->shift,
  305. quant_params->multiplier,
  306. output_dims->w,
  307. output_dims->h,
  308. dw_conv_params->output_offset,
  309. dw_conv_params->input_offset,
  310. dw_conv_params->activation.min,
  311. dw_conv_params->activation.max,
  312. dilation_x,
  313. dilation_y);
  314. }
  315. /* Return to application */
  316. return ARM_MATH_SUCCESS;
  317. }
  318. /**
  319. * @} end of NNConv group
  320. */