riscv_encoding.h 6.5 KB

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  1. /*
  2. * Copyright (c) 2019 Nuclei Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Licensed under the Apache License, Version 2.0 (the License); you may
  7. * not use this file except in compliance with the License.
  8. * You may obtain a copy of the License at
  9. *
  10. * www.apache.org/licenses/LICENSE-2.0
  11. *
  12. * Unless required by applicable law or agreed to in writing, software
  13. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  14. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  15. * See the License for the specific language governing permissions and
  16. * limitations under the License.
  17. */
  18. #ifndef __RISCV_ENCODING_H__
  19. #define __RISCV_ENCODING_H__
  20. #ifdef __cplusplus
  21. extern "C" {
  22. #endif
  23. #include "riscv_bits.h"
  24. /**
  25. * \defgroup NMSIS_Core_CSR_Encoding Core CSR Encodings
  26. * \ingroup NMSIS_Core
  27. * \brief NMSIS Core CSR Encodings
  28. * \details
  29. *
  30. * The following macros are used for CSR encodings
  31. * @{
  32. */
  33. /* === Standard CSR bit mask === */
  34. #define MSTATUS_UIE 0x00000001
  35. #define MSTATUS_SIE 0x00000002
  36. #define MSTATUS_HIE 0x00000004
  37. #define MSTATUS_MIE 0x00000008
  38. #define MSTATUS_UPIE 0x00000010
  39. #define MSTATUS_SPIE 0x00000020
  40. #define MSTATUS_UBE 0x00000040
  41. #define MSTATUS_MPIE 0x00000080
  42. #define MSTATUS_SPP 0x00000100
  43. #define MSTATUS_VS 0x00000600
  44. #define MSTATUS_MPP 0x00001800
  45. #define MSTATUS_FS 0x00006000
  46. #define MSTATUS_XS 0x00018000
  47. #define MSTATUS_MPRV 0x00020000
  48. #define MSTATUS_SUM 0x00040000
  49. #define MSTATUS_MXR 0x00080000
  50. #define MSTATUS_TVM 0x00100000
  51. #define MSTATUS_TW 0x00200000
  52. #define MSTATUS_TSR 0x00400000
  53. #define MSTATUS32_SD 0x80000000
  54. #define MSTATUS_UXL 0x0000000300000000
  55. #define MSTATUS_SXL 0x0000000C00000000
  56. #define MSTATUS_SBE 0x0000001000000000
  57. #define MSTATUS_MBE 0x0000002000000000
  58. #define MSTATUS_GVA 0x0000004000000000
  59. #define MSTATUS_MPV 0x0000008000000000
  60. #define MSTATUS64_SD 0x8000000000000000
  61. #define MSTATUS_FS_INITIAL 0x00002000
  62. #define MSTATUS_FS_CLEAN 0x00004000
  63. #define MSTATUS_FS_DIRTY 0x00006000
  64. #define MSTATUS_VS_INITIAL 0x00000200
  65. #define MSTATUS_VS_CLEAN 0x00000400
  66. #define MSTATUS_VS_DIRTY 0x00000600
  67. #define MSTATUSH_SBE 0x00000010
  68. #define MSTATUSH_MBE 0x00000020
  69. #define MSTATUSH_GVA 0x00000040
  70. #define MSTATUSH_MPV 0x00000080
  71. #define MIP_SSIP (1 << IRQ_S_SOFT)
  72. #define MIP_HSIP (1 << IRQ_H_SOFT)
  73. #define MIP_MSIP (1 << IRQ_M_SOFT)
  74. #define MIP_STIP (1 << IRQ_S_TIMER)
  75. #define MIP_HTIP (1 << IRQ_H_TIMER)
  76. #define MIP_MTIP (1 << IRQ_M_TIMER)
  77. #define MIP_SEIP (1 << IRQ_S_EXT)
  78. #define MIP_HEIP (1 << IRQ_H_EXT)
  79. #define MIP_MEIP (1 << IRQ_M_EXT)
  80. #define MIE_SSIE MIP_SSIP
  81. #define MIE_HSIE MIP_HSIP
  82. #define MIE_MSIE MIP_MSIP
  83. #define MIE_STIE MIP_STIP
  84. #define MIE_HTIE MIP_HTIP
  85. #define MIE_MTIE MIP_MTIP
  86. #define MIE_SEIE MIP_SEIP
  87. #define MIE_HEIE MIP_HEIP
  88. #define MIE_MEIE MIP_MEIP
  89. #define MCAUSE_INTR (1ULL << (__riscv_xlen - 1))
  90. #define MCAUSE_CAUSE 0x00000FFFUL
  91. #define WFE_WFE (0x1)
  92. #define TXEVT_TXEVT (0x1)
  93. #define SLEEPVALUE_SLEEPVALUE (0x1)
  94. #define MCOUNTINHIBIT_IR (1<<2)
  95. #define MCOUNTINHIBIT_CY (1<<0)
  96. #define PRV_U 0
  97. #define PRV_S 1
  98. #define PRV_H 2
  99. #define PRV_M 3
  100. /**
  101. * \defgroup NMSIS_Core_CSR_Registers Core CSR Registers
  102. * \ingroup NMSIS_Core
  103. * \brief NMSIS Core CSR Register Definitions
  104. * \details
  105. *
  106. * The following macros are used for CSR Register Defintions.
  107. * @{
  108. */
  109. /* === Standard RISC-V CSR Registers === */
  110. #define CSR_JVT 0x17
  111. #define CSR_MTVT 0x307
  112. #define CSR_MSTATUS 0x300
  113. #define CSR_MSTATUSH 0x310
  114. #define CSR_MISA 0x301
  115. #define CSR_MIE 0x304
  116. #define CSR_MTVEC 0x305
  117. #define CSR_MCOUNTEREN 0x306
  118. #define CSR_MCOUNTINHIBIT 0x320
  119. #define CSR_MSCRATCH 0x340 // Not present in N100
  120. #define CSR_MEPC 0x341
  121. #define CSR_MCAUSE 0x342
  122. #define CSR_MTVAL 0x343
  123. #define CSR_MBADADDR 0x343
  124. #define CSR_MIP 0x344
  125. #define CSR_TSELECT 0x7a0
  126. #define CSR_TDATA1 0x7a1
  127. #define CSR_TDATA2 0x7a2
  128. #define CSR_TDATA3 0x7a3
  129. #define CSR_TINFO 0x7a4
  130. #define CSR_TCONTROL 0x7a5
  131. #define CSR_DCSR 0x7b0
  132. #define CSR_DPC 0x7b1
  133. #define CSR_DSCRATCH0 0x7b2
  134. #define CSR_DSCRATCH1 0x7b3
  135. #define CSR_MCYCLE 0xb00
  136. #define CSR_MINSTRET 0xb02
  137. #define CSR_MVENDORID 0xf11
  138. #define CSR_MARCHID 0xf12
  139. #define CSR_MIMPID 0xf13
  140. #define CSR_MHARTID 0xf14
  141. /* === Nuclei custom CSR Registers === */
  142. #define CSR_SLEEPVALUE 0x811
  143. #define CSR_TXEVT 0x812
  144. #define CSR_WFE 0x810
  145. /* === Nuclei N100 TIMER */
  146. #define CSR_MSIP 0xBD8
  147. #define CSR_MTIMECMP 0xBD9
  148. #define CSR_MTIME 0xBDA
  149. #define CSR_MSTOP 0xBDB
  150. /* === Nuclei N100 IRQC */
  151. #define CSR_IRQCIP 0xBD0
  152. #define CSR_IRQCIE 0xBD1
  153. /** @} */ /** End of Doxygen Group NMSIS_Core_CSR_Registers **/
  154. /* Exception Code in MCAUSE CSR */
  155. #define CAUSE_MISALIGNED_FETCH 0x0
  156. #define CAUSE_FAULT_FETCH 0x1
  157. #define CAUSE_ILLEGAL_INSTRUCTION 0x2
  158. #define CAUSE_BREAKPOINT 0x3
  159. #define CAUSE_MISALIGNED_LOAD 0x4
  160. #define CAUSE_FAULT_LOAD 0x5
  161. #define CAUSE_MISALIGNED_STORE 0x6
  162. #define CAUSE_FAULT_STORE 0x7
  163. #define CAUSE_USER_ECALL 0x8
  164. #define CAUSE_SUPERVISOR_ECALL 0x9
  165. #define CAUSE_HYPERVISOR_ECALL 0xa
  166. #define CAUSE_MACHINE_ECALL 0xb
  167. #define CAUSE_FETCH_PAGE_FAULT 0xc
  168. #define CAUSE_LOAD_PAGE_FAULT 0xd
  169. #define CAUSE_STORE_PAGE_FAULT 0xf
  170. /* Delegatable Exception Code Mask in MCAUSE CSR*/
  171. #define MISALIGNED_FETCH (1 << CAUSE_MISALIGNED_FETCH)
  172. #define FAULT_FETCH (1 << CAUSE_FAULT_FETCH)
  173. #define ILLEGAL_INSTRUCTION (1 << CAUSE_ILLEGAL_INSTRUCTION)
  174. #define BREAKPOINT (1 << CAUSE_BREAKPOINT)
  175. #define MISALIGNED_LOAD (1 << CAUSE_MISALIGNED_LOAD)
  176. #define FAULT_LOAD (1 << CAUSE_FAULT_LOAD)
  177. #define MISALIGNED_STORE (1 << CAUSE_MISALIGNED_STORE)
  178. #define FAULT_STORE (1 << CAUSE_FAULT_STORE)
  179. #define USER_ECALL (1 << CAUSE_USER_ECALL)
  180. #define FETCH_PAGE_FAULT (1 << CAUSE_FETCH_PAGE_FAULT)
  181. #define LOAD_PAGE_FAULT (1 << CAUSE_LOAD_PAGE_FAULT)
  182. #define STORE_PAGE_FAULT (1 << CAUSE_STORE_PAGE_FAULT)
  183. /** @} */ /** End of Doxygen Group NMSIS_Core_CSR_Encoding **/
  184. #ifdef __cplusplus
  185. }
  186. #endif
  187. #endif /* __RISCV_ENCODING_H__ */