cpuport.c 7.7 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. * Copyright (c) 2019-Present Nuclei Limited. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Change Logs:
  8. * Date Author Notes
  9. * 2020/03/26 Huaqi Nuclei RISC-V Core porting code.
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include <stdio.h>
  14. #include "cpuport.h"
  15. #define SYSTICK_TICK_CONST (SOC_TIMER_FREQ / RT_TICK_PER_SECOND)
  16. #ifndef configKERNEL_INTERRUPT_PRIORITY
  17. #define configKERNEL_INTERRUPT_PRIORITY 0
  18. #endif
  19. #define portINITIAL_MSTATUS ( MSTATUS_MPP | MSTATUS_MPIE | MSTATUS_FS_INITIAL | MSTATUS_VS_INITIAL)
  20. volatile rt_ubase_t rt_interrupt_from_thread = 0;
  21. volatile rt_ubase_t rt_interrupt_to_thread = 0;
  22. volatile rt_ubase_t rt_thread_switch_interrupt_flag = 0;
  23. struct rt_hw_stack_frame {
  24. rt_ubase_t epc; /* epc - epc - program counter */
  25. rt_ubase_t ra; /* x1 - ra - return address for jumps */
  26. rt_ubase_t t0; /* x5 - t0 - temporary register 0 */
  27. rt_ubase_t t1; /* x6 - t1 - temporary register 1 */
  28. rt_ubase_t t2; /* x7 - t2 - temporary register 2 */
  29. rt_ubase_t s0_fp; /* x8 - s0/fp - saved register 0 or frame pointer */
  30. rt_ubase_t s1; /* x9 - s1 - saved register 1 */
  31. rt_ubase_t a0; /* x10 - a0 - return value or function argument 0 */
  32. rt_ubase_t a1; /* x11 - a1 - return value or function argument 1 */
  33. rt_ubase_t a2; /* x12 - a2 - function argument 2 */
  34. rt_ubase_t a3; /* x13 - a3 - function argument 3 */
  35. rt_ubase_t a4; /* x14 - a4 - function argument 4 */
  36. rt_ubase_t a5; /* x15 - a5 - function argument 5 */
  37. #ifndef __riscv_32e
  38. rt_ubase_t a6; /* x16 - a6 - function argument 6 */
  39. rt_ubase_t a7; /* x17 - s7 - function argument 7 */
  40. rt_ubase_t s2; /* x18 - s2 - saved register 2 */
  41. rt_ubase_t s3; /* x19 - s3 - saved register 3 */
  42. rt_ubase_t s4; /* x20 - s4 - saved register 4 */
  43. rt_ubase_t s5; /* x21 - s5 - saved register 5 */
  44. rt_ubase_t s6; /* x22 - s6 - saved register 6 */
  45. rt_ubase_t s7; /* x23 - s7 - saved register 7 */
  46. rt_ubase_t s8; /* x24 - s8 - saved register 8 */
  47. rt_ubase_t s9; /* x25 - s9 - saved register 9 */
  48. rt_ubase_t s10; /* x26 - s10 - saved register 10 */
  49. rt_ubase_t s11; /* x27 - s11 - saved register 11 */
  50. rt_ubase_t t3; /* x28 - t3 - temporary register 3 */
  51. rt_ubase_t t4; /* x29 - t4 - temporary register 4 */
  52. rt_ubase_t t5; /* x30 - t5 - temporary register 5 */
  53. rt_ubase_t t6; /* x31 - t6 - temporary register 6 */
  54. rt_ubase_t rsv0; /* reserved 0 - reserved to make space */
  55. rt_ubase_t rsv1; /* reserved 1 - reserved to make space */
  56. #endif
  57. rt_ubase_t mstatus; /* - machine status register */
  58. };
  59. /**
  60. * This function will initialize thread stack
  61. *
  62. * @param tentry the entry of thread
  63. * @param parameter the parameter of entry
  64. * @param stack_addr the beginning stack address
  65. * @param texit the function will be called when thread exit
  66. *
  67. * @return stack address
  68. */
  69. rt_uint8_t* rt_hw_stack_init(void* tentry,
  70. void* parameter,
  71. rt_uint8_t* stack_addr,
  72. void* texit)
  73. {
  74. struct rt_hw_stack_frame* frame;
  75. rt_uint8_t* stk;
  76. int i;
  77. stk = stack_addr + sizeof(rt_ubase_t);
  78. #ifndef __riscv_32e
  79. stk = (rt_uint8_t*)RT_ALIGN_DOWN((rt_ubase_t)stk, 16);
  80. #else
  81. stk = (rt_uint8_t*)RT_ALIGN_DOWN((rt_ubase_t)stk, 4);
  82. #endif
  83. stk -= sizeof(struct rt_hw_stack_frame);
  84. frame = (struct rt_hw_stack_frame*)stk;
  85. for (i = 0; i < sizeof(struct rt_hw_stack_frame) / sizeof(rt_ubase_t); i++) {
  86. ((rt_ubase_t*)frame)[i] = 0xdeadbeef;
  87. }
  88. frame->ra = (rt_ubase_t)texit;
  89. frame->a0 = (rt_ubase_t)parameter;
  90. frame->epc = (rt_ubase_t)tentry;
  91. frame->mstatus = portINITIAL_MSTATUS;
  92. return stk;
  93. }
  94. /*
  95. * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
  96. */
  97. void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to)
  98. {
  99. if (rt_thread_switch_interrupt_flag == 0) {
  100. rt_interrupt_from_thread = from;
  101. }
  102. rt_interrupt_to_thread = to;
  103. rt_thread_switch_interrupt_flag = 1;
  104. portYIELD();
  105. }
  106. void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to)
  107. {
  108. rt_hw_context_switch_interrupt(from, to);
  109. }
  110. /** shutdown CPU */
  111. void rt_hw_cpu_shutdown()
  112. {
  113. rt_uint32_t level;
  114. rt_kprintf("shutdown...\n");
  115. level = rt_hw_interrupt_disable();
  116. while (level) {
  117. RT_ASSERT(0);
  118. }
  119. }
  120. void xPortTaskSwitch(void)
  121. {
  122. /* Clear Software IRQ, A MUST */
  123. SysTimer_ClearSWIRQ();
  124. rt_thread_switch_interrupt_flag = 0;
  125. // make from thread to be to thread
  126. // If there is another swi interrupt triggered by other harts
  127. // not through rt_hw_context_switch or rt_hw_context_switch_interrupt
  128. // the task switch should just do a same task save and restore
  129. rt_interrupt_from_thread = rt_interrupt_to_thread;
  130. }
  131. void vPortSetupTimerInterrupt(void)
  132. {
  133. uint32_t ticks = SYSTICK_TICK_CONST;
  134. /* Make SWI and SysTick the lowest priority interrupts. */
  135. /* Stop and clear the SysTimer. SysTimer as Vector Interrupt */
  136. SysTick_Config(ticks);
  137. IRQC_EnableIRQ(SysTimer_IRQn);
  138. /* Enable SwIRQ Vector Interrupt */
  139. IRQC_EnableIRQ(SysTimerSW_IRQn);
  140. }
  141. #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
  142. #ifndef RT_HEAP_SIZE
  143. #warning RT_HEAP_SIZE is not defined in rtconfig.h, using default 2048
  144. #define RT_HEAP_SIZE 2048
  145. #endif
  146. static uint32_t rt_heap[RT_HEAP_SIZE]; // heap default size: 4K(1024 * 4)
  147. RT_WEAK void* rt_heap_begin_get(void)
  148. {
  149. return rt_heap;
  150. }
  151. RT_WEAK void* rt_heap_end_get(void)
  152. {
  153. return rt_heap + RT_HEAP_SIZE;
  154. }
  155. #endif
  156. /**
  157. * This function will initial your board.
  158. */
  159. void rt_hw_board_init()
  160. {
  161. /* OS Tick Configuration */
  162. vPortSetupTimerInterrupt();
  163. /* Call components board initial (use INIT_BOARD_EXPORT()) */
  164. #ifdef RT_USING_COMPONENTS_INIT
  165. rt_components_board_init();
  166. #endif
  167. #if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
  168. rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
  169. #endif
  170. __disable_irq();
  171. }
  172. #define SysTick_Handler irqc_mtip_handler
  173. /* This is the timer interrupt service routine. */
  174. __INTERRUPT void SysTick_Handler(void)
  175. {
  176. // Reload timer
  177. SysTick_Reload(SYSTICK_TICK_CONST);
  178. /* enter interrupt */
  179. rt_interrupt_enter();
  180. /* tick increase */
  181. rt_tick_increase();
  182. /* leave interrupt */
  183. rt_interrupt_leave();
  184. }
  185. void rt_hw_console_output(const char* str)
  186. {
  187. rt_size_t size = 0;
  188. size = rt_strlen(str);
  189. for (int i = 0; i < size; i ++) {
  190. putchar(str[i]);
  191. }
  192. }
  193. char rt_hw_console_getchar(void)
  194. {
  195. char ch = -1;
  196. ch = (char)getchar();
  197. return ch;
  198. }
  199. rt_base_t rt_hw_interrupt_disable(void)
  200. {
  201. return __RV_CSR_READ_CLEAR(CSR_MSTATUS, MSTATUS_MIE);
  202. }
  203. void rt_hw_interrupt_enable(rt_base_t level)
  204. {
  205. __RV_CSR_WRITE(CSR_MSTATUS, level);
  206. }