system_evalsoc.h 4.0 KB

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  1. /*
  2. * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  3. * Copyright (c) 2019 Nuclei Limited. All rights reserved.
  4. *
  5. * SPDX-License-Identifier: Apache-2.0
  6. *
  7. * Licensed under the Apache License, Version 2.0 (the License); you may
  8. * not use this file except in compliance with the License.
  9. * You may obtain a copy of the License at
  10. *
  11. * www.apache.org/licenses/LICENSE-2.0
  12. *
  13. * Unless required by applicable law or agreed to in writing, software
  14. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  15. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  16. * See the License for the specific language governing permissions and
  17. * limitations under the License.
  18. */
  19. /*******************************************************************************
  20. * @file system_evalsoc.h
  21. * @brief NMSIS Nuclei N/NX Device Peripheral Access Layer Header File for
  22. * Device <Device>
  23. * @version V1.00
  24. * @date 17. Dec 2019
  25. ******************************************************************************/
  26. #ifndef __SYSTEM_EVALSOC_H__ /* ToDo: replace '<Device>' with your device name */
  27. #define __SYSTEM_EVALSOC_H__
  28. #ifdef __cplusplus
  29. extern "C" {
  30. #endif
  31. #include <stdint.h>
  32. extern volatile uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
  33. typedef struct EXC_Frame {
  34. unsigned long ra; /* ra: x1, return address for jump */
  35. unsigned long tp; /* tp: x4, thread pointer */
  36. unsigned long t0; /* t0: x5, temporary register 0 */
  37. unsigned long t1; /* t1: x6, temporary register 1 */
  38. unsigned long t2; /* t2: x7, temporary register 2 */
  39. unsigned long a0; /* a0: x10, return value or function argument 0 */
  40. unsigned long a1; /* a1: x11, return value or function argument 1 */
  41. unsigned long a2; /* a2: x12, function argument 2 */
  42. unsigned long a3; /* a3: x13, function argument 3 */
  43. unsigned long a4; /* a4: x14, function argument 4 */
  44. unsigned long a5; /* a5: x15, function argument 5 */
  45. unsigned long cause; /* cause: machine/supervisor mode cause csr register */
  46. unsigned long epc; /* epc: machine/ supervisor mode exception program counter csr register */
  47. unsigned long reserved0; /* reserved */
  48. #ifndef __riscv_32e
  49. unsigned long a6; /* a6: x16, function argument 6 */
  50. unsigned long a7; /* a7: x17, function argument 7 */
  51. unsigned long t3; /* t3: x28, temporary register 3 */
  52. unsigned long t4; /* t4: x29, temporary register 4 */
  53. unsigned long t5; /* t5: x30, temporary register 5 */
  54. unsigned long t6; /* t6: x31, temporary register 6 */
  55. #endif
  56. } EXC_Frame_Type;
  57. /**
  58. * \brief Setup the microcontroller system.
  59. * \details
  60. * Initialize the System and update the SystemCoreClock variable.
  61. */
  62. extern void SystemInit(void);
  63. /**
  64. * \brief Update SystemCoreClock variable.
  65. * \details
  66. * Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
  67. */
  68. extern void SystemCoreClockUpdate(void);
  69. extern uint32_t core_exception_handler(unsigned long mcause, unsigned long sp);
  70. #if defined(__Vendor_EXCEPTION) && (__Vendor_EXCEPTION == 0)
  71. /**
  72. * \brief Dump Exception Frame
  73. */
  74. void Exception_DumpFrame(unsigned long sp, uint8_t mode);
  75. /**
  76. * \brief Register an exception handler for exception code EXCn
  77. */
  78. extern void Exception_Register_EXC(uint32_t EXCn, unsigned long exc_handler);
  79. /**
  80. * \brief Get current exception handler for exception code EXCn
  81. */
  82. extern unsigned long Exception_Get_EXC(uint32_t EXCn);
  83. #endif
  84. /**
  85. * \brief Initialize interrupt config
  86. */
  87. extern void Interrupt_Init(void);
  88. /**
  89. * \brief Initialize a specific IRQ and register the handler
  90. * \details
  91. * This function set handler for specific IRQn and enable it.
  92. */
  93. extern int32_t IRQC_Register_IRQ(IRQn_Type IRQn, void* handler);
  94. #ifdef __cplusplus
  95. }
  96. #endif
  97. #endif /* __SYSTEM_EVALSOC_H__ */