demo_cache.c 4.1 KB

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  1. // See LICENSE for license details.
  2. #include <stdio.h>
  3. #include <stdlib.h>
  4. #include "nuclei_sdk_soc.h"
  5. #define DISABLE_NMSIS_HPM
  6. #include "nmsis_bench.h"
  7. #if !defined(__CCM_PRESENT) || (__CCM_PRESENT != 1)
  8. /* __CCM_PRESENT should be defined in <Device>.h */
  9. #warning "__CCM_PRESENT is not defined or equal to 1, please check!"
  10. #endif
  11. // Declare HPMCOUNTER4
  12. HPM_DECLARE_VAR(4);
  13. // Means select the Dcache miss events, record Dcache miss event for all M/S/U mode, using
  14. #define HPM_EVENT4 HPM_EVENT(EVENT_SEL_MEMORY_ACCESS, EVENT_MEMORY_ACCESS_DCACHE_MISS, MSU_EVENT_ENABLE)
  15. //#define BIG_ROW_SIZE
  16. #ifndef BIG_ROW_SIZE
  17. #define ROW_SIZE 10
  18. #else
  19. #define ROW_SIZE 2048
  20. #endif
  21. /* Column size same as cache line size, for better understanding cache mechanism*/
  22. #define COL_SIZE 64
  23. uint8_t array_test[ROW_SIZE][COL_SIZE] __attribute__((aligned(0x40))) = {0};
  24. void array_update_by_row(void)
  25. {
  26. int32_t i, j = 0;
  27. for (i = 0; i < ROW_SIZE; i++)
  28. for (j = 0; j < COL_SIZE; j++) {
  29. array_test[i][j] = 0xab;
  30. }
  31. }
  32. void array_update_by_col(void)
  33. {
  34. int32_t i, j = 0;
  35. for (i = 0; i < COL_SIZE; i++)
  36. for (j = 0; j < ROW_SIZE; j++) {
  37. array_test[j][i] = 0xab;
  38. }
  39. }
  40. void array_init(void)
  41. {
  42. int32_t i, j = 0;
  43. for (i = 0; i < ROW_SIZE; i++)
  44. for (j = 0; j < COL_SIZE; j++) {
  45. array_test[i][j] = 0x34;
  46. }
  47. }
  48. int main(void)
  49. {
  50. #if defined(__CCM_PRESENT) && (__CCM_PRESENT == 1)
  51. int32_t ret = 0;
  52. int32_t val = 0;
  53. CacheInfo_Type cacheinfo_type;
  54. if (!DCachePresent() || !ICachePresent()) {
  55. printf("DCache or ICache not present in CPU!\n");
  56. return -1;
  57. }
  58. GetDCacheInfo(&cacheinfo_type);
  59. printf("DCache Linesize is %d bytes, ways is %d, setperway is %d, total size is %d bytes\n\n", cacheinfo_type.linesize, \
  60. cacheinfo_type.ways, cacheinfo_type.setperway,cacheinfo_type.size);
  61. printf("array_test %d * %d bytes\n", ROW_SIZE, COL_SIZE);
  62. printf("\n------Update array in memory------\n");
  63. EnableDCache();
  64. EnableICache();
  65. MFlushDCache();
  66. MInvalDCache();
  67. // Init HPM bench, only need to do it once
  68. HPM_INIT();
  69. // start to record hpm3 and hpm4
  70. printf("\n------Update array to all 0xab in cache: array_update_by_row------\n");
  71. // start to record hpm4
  72. HPM_START(4, array_update_by_row_dcache_miss, HPM_EVENT4);
  73. array_update_by_row();
  74. // finish record and print hpm value
  75. HPM_END(4, array_update_by_row_dcache_miss, HPM_EVENT4);
  76. printf("\n-------Keep DCache valid, do array_update_by_row again-------\n");
  77. HPM_START(4, array_update_by_row_dcache_miss, HPM_EVENT4);
  78. array_update_by_row();
  79. HPM_END(4, array_update_by_row_dcache_miss, HPM_EVENT4);
  80. printf("\n-------Invalidate all the Dcache-------\n");
  81. MInvalDCache();
  82. printf("\n------Update array to all 0xab in cache: array_update_by_col ------\n");
  83. HPM_START(4, array_update_by_col_dcache_miss, HPM_EVENT4);
  84. array_update_by_col();
  85. HPM_END(4, array_update_by_col_dcache_miss, HPM_EVENT4);
  86. printf("Read out array_test[0][0] 0x%x in cache, then disable DCache\n", array_test[0][0]);
  87. DisableDCache();
  88. printf("\n------Init array in memory to all 0x34------\n");
  89. array_init();
  90. printf("Read out array_test[0][0] 0x%x in memory, then enable Dcache\n", array_test[0][0]);
  91. EnableDCache();
  92. MFlushDCache();
  93. printf("After cache flushed to memory, array_test[0][0] in memory is 0x%x\n", array_test[0][0]);
  94. printf("\n------Again init array in memory to all 0x34, then enable DCache------\n");
  95. DisableDCache();
  96. array_init();
  97. /* Read from memory */
  98. printf("Read out array_test[0][0] 0x%x in memory\n", array_test[0][0]);
  99. EnableDCache();
  100. printf("Read out array_test[0][0] 0x%x in cache, when mapped value in memory has changed\n", array_test[0][0]);
  101. MInvalDCache();
  102. HPM_START(4, dcachemiss_readonebyte, HPM_EVENT4);
  103. /* Read brings in one cache miss */
  104. val = *(volatile uint8_t*) &array_test[0][0];
  105. HPM_END(4, dcachemiss_readonebyte, HPM_EVENT4);
  106. #else
  107. printf("[ERROR]__CCM_PRESENT must be defined as 1 in <Device>.h!\r\n");
  108. #endif
  109. return 0;
  110. }