ux900.json 1.8 KB

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  1. {
  2. "build_config": {
  3. "CPU_SERIES": "900"
  4. },
  5. "build_configs": {
  6. "rv64imac": {"CORE":"nx900"},
  7. "rv64imacb": {"CORE":"nx900", "ARCH_EXT":"_zba_zbb_zbc_zbs"},
  8. "rv64imacp": {"CORE":"nx900", "ARCH_EXT":"_xxldsp"},
  9. "rv64imacbp": {"CORE":"nx900", "ARCH_EXT":"_zba_zbb_zbc_zbs_xxldsp"},
  10. "rv64imafc": {"CORE":"nx900f", "ARCH_EXT":""},
  11. "rv64imafcb": {"CORE":"nx900f", "ARCH_EXT":"_zba_zbb_zbc_zbs"},
  12. "rv64imafcp": {"CORE":"nx900f", "ARCH_EXT":"_xxldsp"},
  13. "rv64imafcbp": {"CORE":"nx900f", "ARCH_EXT":"_zba_zbb_zbc_zbs_xxldsp"},
  14. "rv64imafdc": {"CORE":"nx900fd", "ARCH_EXT":""},
  15. "rv64imafdcb": {"CORE":"nx900fd", "ARCH_EXT":"_zba_zbb_zbc_zbs"},
  16. "rv64imafdcp": {"CORE":"nx900fd", "ARCH_EXT":"_xxldsp"},
  17. "rv64imafdcbp": {"CORE":"nx900fd", "ARCH_EXT":"_zba_zbb_zbc_zbs_xxldsp"},
  18. "rv64imafdcbp_zicond": {"CORE":"nx900fd", "ARCH_EXT":"_zba_zbb_zbc_zbs_zicond_xxldsp", "NMSIS_LIB_ARCH": "rv64imafdc_zba_zbb_zbc_zbs_xxldsp"},
  19. "rv64imafcv": { "CORE": "nx900f", "ARCH_EXT": "_zve64f" },
  20. "rv64imafdcv": { "CORE": "nx900fd", "ARCH_EXT": "v" },
  21. "rv64imafcbv": { "CORE": "nx900f", "ARCH_EXT": "_zve64f_zba_zbb_zbc_zbs" },
  22. "rv64imafdcbv": { "CORE": "nx900fd", "ARCH_EXT": "v_zba_zbb_zbc_zbs" },
  23. "rv64imafcpv": { "CORE": "nx900f", "ARCH_EXT": "_zve64f_xxldsp" },
  24. "rv64imafdcpv": { "CORE": "nx900fd", "ARCH_EXT": "v_xxldsp" },
  25. "rv64imafcbpv": { "CORE": "nx900f", "ARCH_EXT": "_zve64f_zba_zbb_zbc_zbs_xxldsp" },
  26. "rv64imafdcbpv": { "CORE": "nx900fd", "ARCH_EXT": "v_zba_zbb_zbc_zbs_xxldsp" },
  27. "rv64imafdcbpv_zicond": { "CORE": "nx900fd", "ARCH_EXT": "v_zba_zbb_zbc_zbs_zicond_xxldsp", "NMSIS_LIB_ARCH": "rv64imafdcv_zba_zbb_zbc_zbs_xxldsp"}
  28. }
  29. }