bench_n100.json 1.8 KB

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  1. {
  2. "build_config": {
  3. "SOC": "evalsoc",
  4. "CPU_SERIES": "100"
  5. },
  6. "build_configs": {
  7. "rv32ec": {"CORE":"n100e", "ARCH_EXT": ""},
  8. "rv32emc": {"CORE":"n100em", "ARCH_EXT": ""},
  9. "rv32ec_zmmul": {"CORE":"n100ezmmul", "ARCH_EXT": ""},
  10. "rv32ic": {"CORE":"n100", "ARCH_EXT": ""},
  11. "rv32imc": {"CORE":"n100m", "ARCH_EXT": ""},
  12. "rv32ic_zmmul": {"CORE":"n100zmmul", "ARCH_EXT": ""},
  13. "rv32e_zc": {"CORE":"n100e", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  14. "rv32em_zc": {"CORE":"n100em", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  15. "rv32e_zc_zmmul": {"CORE":"n100ezmmul", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  16. "rv32i_zc": {"CORE":"n100", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  17. "rv32im_zc": {"CORE":"n100m", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  18. "rv32i_zc_zmmul": {"CORE":"n100zmmul", "ARCH_EXT": "_zca_zcb_zcmp_zcmt"},
  19. "rv32ec_zicond": {"CORE":"n100e", "ARCH_EXT": "_zicond"},
  20. "rv32emc_zicond": {"CORE":"n100em", "ARCH_EXT": "_zicond"},
  21. "rv32ec_zmmul_zicond": {"CORE":"n100ezmmul", "ARCH_EXT": "_zicond"},
  22. "rv32ic_zicond": {"CORE":"n100", "ARCH_EXT": "_zicond"},
  23. "rv32imc_zicond": {"CORE":"n100m", "ARCH_EXT": "_zicond"},
  24. "rv32ic_zmmul_zicond": {"CORE":"n100zmmul", "ARCH_EXT": "_zicond"},
  25. "rv32e_zc_zicond": {"CORE":"n100e", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"},
  26. "rv32em_zc_zicond": {"CORE":"n100em", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"},
  27. "rv32e_zc_zmmul_zicond": {"CORE":"n100ezmmul", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"},
  28. "rv32i_zc_zicond": {"CORE":"n100", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"},
  29. "rv32im_zc_zicond": {"CORE":"n100m", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"},
  30. "rv32i_zc_zmmul_zicond": {"CORE":"n100zmmul", "ARCH_EXT": "_zca_zcb_zcmp_zcmt_zicond"}
  31. }
  32. }