完善驱动代码, 完善mpy模块驱动

project_0/.config

@@ -174,9 +174,11 @@ CONFIG_RT_USING_SERIAL_V1=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
-# CONFIG_RT_USING_HWTIMER is not set
+CONFIG_RT_USING_HWTIMER=y
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+# CONFIG_RT_USING_I2C_BITOPS is not set
 # CONFIG_RT_USING_PHY is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
@@ -185,7 +187,10 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
-# CONFIG_RT_USING_RTC is not set
+CONFIG_RT_USING_WDT=y
+CONFIG_RT_USING_RTC=y
+# CONFIG_RT_USING_ALARM is not set
+# CONFIG_RT_USING_SOFT_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 CONFIG_RT_USING_SPI=y
 # CONFIG_RT_USING_QSPI is not set
@@ -198,8 +203,10 @@ CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
 CONFIG_RT_DEBUG_SFUD=y
 # CONFIG_RT_USING_ENC28J60 is not set
 # CONFIG_RT_USING_SPI_WIFI is not set
-# CONFIG_RT_USING_WDT is not set
-# CONFIG_RT_USING_AUDIO is not set
+CONFIG_RT_USING_AUDIO=y
+CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_SIZE=4096
+CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2
+CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048
 # CONFIG_RT_USING_SENSOR is not set
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
@@ -401,6 +408,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_HM is not set
 # CONFIG_PKG_USING_SMALL_MODBUS is not set
 # CONFIG_PKG_USING_NET_SERVER is not set
+# CONFIG_PKG_USING_ZFTP is not set
 # end of IoT - internet of things
 
 #
@@ -427,6 +435,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_RAPIDJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PARSON is not set
 # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
@@ -441,6 +450,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
+# CONFIG_PKG_USING_RTT_RUST is not set
 # end of language packages
 
 #
@@ -485,7 +495,6 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # end of PainterEngine: A cross-platform graphics application framework written in C language
 
 # CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
 # CONFIG_PKG_USING_VT100 is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_GUIENGINE is not set
@@ -536,6 +545,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_SNOWFLAKE is not set
 # CONFIG_PKG_USING_HASH_MATCH is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 # end of tools packages
 
 #
@@ -550,15 +560,6 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
 # end of enhanced kernel services
 
-#
-# POSIX extension functions
-#
-# CONFIG_PKG_USING_POSIX_GETLINE is not set
-# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
-# CONFIG_PKG_USING_POSIX_ITOA is not set
-# CONFIG_PKG_USING_POSIX_STRINGS is not set
-# end of POSIX extension functions
-
 #
 # acceleration: Assembly language or algorithmic acceleration packages
 #
@@ -586,10 +587,11 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_UC_MODBUS is not set
 # end of Micrium: Micrium software products porting for RT-Thread
 
-# CONFIG_PKG_USING_RTDUINO is not set
+# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
 # CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_PERF_COUNTER is not set
 # CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
@@ -629,8 +631,10 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_ADT74XX is not set
 # CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_RTT_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -642,12 +646,19 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
+
+#
+# Kendryte SDK
+#
+# CONFIG_PKG_USING_K210_SDK is not set
 CONFIG_PKG_USING_KENDRYTE_SDK=y
-CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
+CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk/K210-SDK/kendryte-sdk"
 CONFIG_PKG_USING_KENDRYTE_SDK_V057=y
 # CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set
 CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.7"
 CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
+# end of Kendryte SDK
+
 # CONFIG_PKG_USING_INFRARED is not set
 # CONFIG_PKG_USING_MULTI_INFRARED is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
@@ -708,6 +719,7 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
 # CONFIG_PKG_USING_MB85RS16 is not set
 # CONFIG_PKG_USING_CW2015 is not set
 # CONFIG_PKG_USING_RFM300 is not set
+# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
 # end of peripheral libraries and drivers
 
 #
@@ -777,7 +789,6 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
 # CONFIG_PKG_USING_UPARAM is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
@@ -797,17 +808,35 @@ CONFIG_BOARD_K210_EVB=y
 #
 # Hardware Drivers Config
 #
+
+#
+# IO Groups Power Supply Settings
+#
+CONFIG_BSP_GROUPA_POWER_SUPPLY_1V8=y
+# CONFIG_BSP_GROUPA_POWER_SUPPLY_3V3 is not set
+# CONFIG_BSP_GROUPB_POWER_SUPPLY_1V8 is not set
+CONFIG_BSP_GROUPB_POWER_SUPPLY_3V3=y
+# CONFIG_BSP_GROUPC_POWER_SUPPLY_1V8 is not set
+CONFIG_BSP_GROUPC_POWER_SUPPLY_3V3=y
+# end of IO Groups Power Supply Settings
+
 CONFIG_BSP_USING_UART_HS=y
 
 #
 # General Purpose UARTs
 #
-# CONFIG_BSP_USING_UART1 is not set
+CONFIG_BSP_USING_UART1=y
+CONFIG_BSP_UART1_TXD_PIN=6
+CONFIG_BSP_UART1_RXD_PIN=7
 # CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_UART3 is not set
 # end of General Purpose UARTs
 
+CONFIG_BSP_USING_I2C0=y
+CONFIG_BSP_I2C0_SCL_PIN=18
+CONFIG_BSP_I2C0_SDA_PIN=19
 # CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_I2C2 is not set
 CONFIG_BSP_USING_SPI1=y
 CONFIG_BSP_SPI1_CLK_PIN=21
 CONFIG_BSP_SPI1_D0_PIN=19
@@ -832,8 +861,16 @@ CONFIG_BSP_BOARD_K210_DRACO=y
 # CONFIG_BSP_BOARD_USER is not set
 CONFIG_BSP_LCD_X_MAX=240
 CONFIG_BSP_LCD_Y_MAX=320
+# CONFIG_BSP_USING_I2S0 is not set
+# CONFIG_BSP_USING_I2S1 is not set
+# CONFIG_BSP_USING_I2S2 is not set
+# CONFIG_BSP_USING_PWM is not set
+# CONFIG_BSP_USING_TIMER0 is not set
+# CONFIG_BSP_USING_TIMER1 is not set
 # CONFIG_BSP_USING_CAMERA is not set
 # CONFIG_BSP_USING_RW007 is not set
+# CONFIG_BSP_USING_RTC is not set
+# CONFIG_BSP_USING_WDT is not set
 # end of Hardware Drivers Config
 
 CONFIG___STACKSIZE__=4096

project_0/.config.old

@@ -174,9 +174,11 @@ CONFIG_RT_USING_SERIAL_V1=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
-# CONFIG_RT_USING_HWTIMER is not set
+CONFIG_RT_USING_HWTIMER=y
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+# CONFIG_RT_USING_I2C_BITOPS is not set
 # CONFIG_RT_USING_PHY is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
@@ -185,6 +187,7 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
+CONFIG_RT_USING_WDT=y
 CONFIG_RT_USING_RTC=y
 # CONFIG_RT_USING_ALARM is not set
 # CONFIG_RT_USING_SOFT_RTC is not set
@@ -200,8 +203,10 @@ CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
 CONFIG_RT_DEBUG_SFUD=y
 # CONFIG_RT_USING_ENC28J60 is not set
 # CONFIG_RT_USING_SPI_WIFI is not set
-# CONFIG_RT_USING_WDT is not set
-# CONFIG_RT_USING_AUDIO is not set
+CONFIG_RT_USING_AUDIO=y
+CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_SIZE=4096
+CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2
+CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048
 # CONFIG_RT_USING_SENSOR is not set
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
@@ -403,6 +408,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_HM is not set
 # CONFIG_PKG_USING_SMALL_MODBUS is not set
 # CONFIG_PKG_USING_NET_SERVER is not set
+# CONFIG_PKG_USING_ZFTP is not set
 # end of IoT - internet of things
 
 #
@@ -429,6 +435,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
 # CONFIG_PKG_USING_RAPIDJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PARSON is not set
 # end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
@@ -450,20 +457,19 @@ CONFIG_PKG_MICROPYTHON_PATH="/packages/language/micropython"
 # CONFIG_MICROPYTHON_USING_MACHINE_I2C is not set
 # CONFIG_MICROPYTHON_USING_MACHINE_SPI is not set
 # CONFIG_MICROPYTHON_USING_MACHINE_UART is not set
-# CONFIG_MICROPYTHON_USING_MACHINE_RTC is not set
+CONFIG_MICROPYTHON_USING_MACHINE_RTC=y
 # CONFIG_MICROPYTHON_USING_MACHINE_PWM is not set
 # CONFIG_MICROPYTHON_USING_MACHINE_ADC is not set
-# CONFIG_MICROPYTHON_USING_MACHINE_WDT is not set
-# CONFIG_MICROPYTHON_USING_MACHINE_TIMER is not set
+CONFIG_MICROPYTHON_USING_MACHINE_WDT=y
+CONFIG_MICROPYTHON_USING_MACHINE_TIMER=y
 # CONFIG_MICROPYTHON_USING_NETWORK is not set
-CONFIG_MICROPYTHON_USING_MACHINE_LCD=y
+# CONFIG_MICROPYTHON_USING_MACHINE_LCD is not set
 # end of Hardware Module
 
 #
 # System Module
 #
-CONFIG_MICROPYTHON_USING_UOS=y
-CONFIG_MICROPYTHON_USING_FILE_SYNC_VIA_IDE=y
+# CONFIG_MICROPYTHON_USING_UOS is not set
 # CONFIG_MICROPYTHON_USING_THREAD is not set
 # CONFIG_MICROPYTHON_USING_USELECT is not set
 # CONFIG_MICROPYTHON_USING_UCTYPES is not set
@@ -497,9 +503,9 @@ CONFIG_MICROPYTHON_USING_FILE_SYNC_VIA_IDE=y
 CONFIG_MICROPYTHON_USING_USEREXTMODS=y
 # end of User Extended Module
 
-CONFIG_PKG_MICROPYTHON_HEAP_SIZE=600000
+CONFIG_PKG_MICROPYTHON_HEAP_SIZE=8192
 # CONFIG_MICROPYTHON_USING_FLOAT_IMPL_FLOAT is not set
-# CONFIG_PKG_USING_MICROPYTHON_V11300 is not set
+CONFIG_PKG_USING_MICROPYTHON_V11300=y
 # CONFIG_PKG_USING_MICROPYTHON_V11200 is not set
 # CONFIG_PKG_USING_MICROPYTHON_V11004 is not set
 # CONFIG_PKG_USING_MICROPYTHON_V11003 is not set
@@ -507,10 +513,11 @@ CONFIG_PKG_MICROPYTHON_HEAP_SIZE=600000
 # CONFIG_PKG_USING_MICROPYTHON_V11001 is not set
 # CONFIG_PKG_USING_MICROPYTHON_V11000 is not set
 # CONFIG_PKG_USING_MICROPYTHON_V10903 is not set
-CONFIG_PKG_USING_MICROPYTHON_LATEST_VERSION=y
-CONFIG_PKG_MICROPYTHON_VER="latest"
-CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
+# CONFIG_PKG_USING_MICROPYTHON_LATEST_VERSION is not set
+CONFIG_PKG_MICROPYTHON_VER="v1.13.0"
+CONFIG_PKG_MICROPYTHON_VER_NUM=0x11300
 # CONFIG_PKG_USING_PIKASCRIPT is not set
+# CONFIG_PKG_USING_RTT_RUST is not set
 # end of language packages
 
 #
@@ -555,7 +562,6 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # end of PainterEngine: A cross-platform graphics application framework written in C language
 
 # CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
 # CONFIG_PKG_USING_VT100 is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_GUIENGINE is not set
@@ -606,6 +612,7 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # CONFIG_PKG_USING_SNOWFLAKE is not set
 # CONFIG_PKG_USING_HASH_MATCH is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 # end of tools packages
 
 #
@@ -620,15 +627,6 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
 # end of enhanced kernel services
 
-#
-# POSIX extension functions
-#
-# CONFIG_PKG_USING_POSIX_GETLINE is not set
-# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
-# CONFIG_PKG_USING_POSIX_ITOA is not set
-# CONFIG_PKG_USING_POSIX_STRINGS is not set
-# end of POSIX extension functions
-
 #
 # acceleration: Assembly language or algorithmic acceleration packages
 #
@@ -656,10 +654,11 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # CONFIG_PKG_USING_UC_MODBUS is not set
 # end of Micrium: Micrium software products porting for RT-Thread
 
-# CONFIG_PKG_USING_RTDUINO is not set
+# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
 # CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_PERF_COUNTER is not set
 # CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
@@ -699,8 +698,10 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_ADT74XX is not set
 # CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_RTT_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -712,12 +713,19 @@ CONFIG_PKG_MICROPYTHON_VER_NUM=0x99999
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
+
+#
+# kendryte-sdk: Kendryte SDK
+#
+# CONFIG_PKG_USING_K210_SDK is not set
 CONFIG_PKG_USING_KENDRYTE_SDK=y
-CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
+CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk/K210-SDK/kendryte-sdk"
 CONFIG_PKG_USING_KENDRYTE_SDK_V057=y
 # CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set
 CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.7"
 CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
+# end of kendryte-sdk: Kendryte SDK
+
 # CONFIG_PKG_USING_INFRARED is not set
 # CONFIG_PKG_USING_MULTI_INFRARED is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
@@ -778,6 +786,7 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
 # CONFIG_PKG_USING_MB85RS16 is not set
 # CONFIG_PKG_USING_CW2015 is not set
 # CONFIG_PKG_USING_RFM300 is not set
+# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
 # end of peripheral libraries and drivers
 
 #
@@ -847,7 +856,6 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0057
 # CONFIG_PKG_USING_UPARAM is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
@@ -867,17 +875,35 @@ CONFIG_BOARD_K210_EVB=y
 #
 # Hardware Drivers Config
 #
+
+#
+# IO Groups Power Supply Settings
+#
+CONFIG_BSP_GROUPA_POWER_SUPPLY_1V8=y
+# CONFIG_BSP_GROUPA_POWER_SUPPLY_3V3 is not set
+# CONFIG_BSP_GROUPB_POWER_SUPPLY_1V8 is not set
+CONFIG_BSP_GROUPB_POWER_SUPPLY_3V3=y
+# CONFIG_BSP_GROUPC_POWER_SUPPLY_1V8 is not set
+CONFIG_BSP_GROUPC_POWER_SUPPLY_3V3=y
+# end of IO Groups Power Supply Settings
+
 CONFIG_BSP_USING_UART_HS=y
 
 #
 # General Purpose UARTs
 #
-# CONFIG_BSP_USING_UART1 is not set
+CONFIG_BSP_USING_UART1=y
+CONFIG_BSP_UART1_TXD_PIN=6
+CONFIG_BSP_UART1_RXD_PIN=7
 # CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_UART3 is not set
 # end of General Purpose UARTs
 
+CONFIG_BSP_USING_I2C0=y
+CONFIG_BSP_I2C0_SCL_PIN=18
+CONFIG_BSP_I2C0_SDA_PIN=19
 # CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_I2C2 is not set
 CONFIG_BSP_USING_SPI1=y
 CONFIG_BSP_SPI1_CLK_PIN=21
 CONFIG_BSP_SPI1_D0_PIN=19
@@ -902,17 +928,22 @@ CONFIG_BSP_BOARD_K210_DRACO=y
 # CONFIG_BSP_BOARD_USER is not set
 CONFIG_BSP_LCD_X_MAX=240
 CONFIG_BSP_LCD_Y_MAX=320
-CONFIG_BSP_USING_CAMERA=y
-CONFIG_BSP_CAMERA_SCCB_SDA_PIN=15
-CONFIG_BSP_CAMERA_SCCB_SDA0_PIN=0
-CONFIG_BSP_CAMERA_SCCB_SCLK_PIN=14
-CONFIG_BSP_CAMERA_CMOS_RST_PIN=13
-CONFIG_BSP_CAMERA_CMOS_VSYNC_PIN=12
-CONFIG_BSP_CAMERA_CMOS_PWDN_PIN=11
-CONFIG_BSP_CAMERA_CMOS_XCLK_PIN=9
-CONFIG_BSP_CAMERA_CMOS_PCLK_PIN=8
-CONFIG_BSP_CAMERA_CMOS_HREF_PIN=10
+# CONFIG_BSP_USING_I2S0 is not set
+# CONFIG_BSP_USING_I2S1 is not set
+# CONFIG_BSP_USING_I2S2 is not set
+# CONFIG_BSP_USING_PWM is not set
+CONFIG_BSP_USING_TIMER0=y
+CONFIG_BSP_TIMER0_CHN0_ENABLE=y
+CONFIG_BSP_TIMER0_CHN1_ENABLE=y
+CONFIG_BSP_TIMER0_CHN2_ENABLE=y
+CONFIG_BSP_TIMER0_CHN3_ENABLE=y
+# CONFIG_BSP_USING_TIMER1 is not set
+# CONFIG_BSP_USING_CAMERA is not set
 # CONFIG_BSP_USING_RW007 is not set
+CONFIG_BSP_USING_RTC=y
+# CONFIG_BSP_USING_SD3068 is not set
+CONFIG_BSP_USING_ONCHIP_RTC=y
+CONFIG_BSP_USING_WDT=y
 # end of Hardware Drivers Config
 
 CONFIG___STACKSIZE__=4096
@@ -921,9 +952,5 @@ CONFIG_RT_AI_USE_K210=y
 #
 # mpy-extmods
 #
-CONFIG_PRJ_USING_EXTMODS_MISC=y
-CONFIG_EXTMODS_MISC_USING_K210=y
-CONFIG_EXTMODS_K210_LCDCTL=y
-CONFIG_EXTMODS_K210_DVP=y
-CONFIG_PRJ_USING_RT_AK_EXMODS=y
+# CONFIG_PRJ_USING_EXTMODS_MISC is not set
 # end of mpy-extmods

project_0/.gitignore

@@ -24,8 +24,8 @@ documentation/html
 *.i
 *.d
 
-packages
-!packages/kendryte-sdk-v0.5.7
+packages/*
+!packages/kendryte-sdk
 
 dist
 dist_ide_project

project_0/.project

@@ -25,6 +25,37 @@
 		<nature>org.eclipse.cdt.core.ccnature</nature>
 		<nature>org.eclipse.cdt.core.ccnature</nature>
 		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
 		<nature>org.rt-thread.studio.rttnature</nature>
 		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
 		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>

project_0/.settings/ilg.gnumcueclipse.managedbuild.cross.riscv.prefs

@@ -1,2 +1,2 @@
 eclipse.preferences.version=1
-toolchain.path.512258282=${toolchain_install_path}/${risc-v-gcc-kendryte_relative_path}/bin
+toolchain.path.512258282=${toolchain_install_path}/KENDRYTE/RISC-V-GCC-KENDRYTE/8.3.0/bin

project_0/.settings/org.eclipse.core.resources.prefs

@@ -1,2 +1,4 @@
+autoUpdatePkgs=true
 eclipse.preferences.version=1
-rtt-studio.preferences.kflash.serial.port=COM30
+encoding//driver/drv_io_config.c=UTF-8
+rtt-studio.preferences.kflash.serial.port=COM14

project_0/.settings/projcfg.ini

@@ -1,5 +1,5 @@
 #RT-Thread Studio Project Configuration
-#Wed May 25 18:36:58 CST 2022
+#Fri Jul 29 14:00:04 CST 2022
 cfg_version=v3.0
 board_name=k210
 hardware_adapter=KFlash
@@ -7,9 +7,9 @@ tool_chain=gcc
 board_base_nano_proj=False
 project_type=rt-thread
 chip_name=k210
-bsp_version=1.0.0
 selected_rtt_version=latest
-project_base_bsp=true
-output_project_path=D\:\\project\\sdk-bsp-draco\\project_0
+bsp_version=1.0.0
 is_use_scons_build=True
+output_project_path=C\:\\Users\\RTT\\Desktop\\sdk-bsp-draco\\project_0
+project_base_bsp=true
 project_name=Draco

project_0/Kconfig

@@ -37,30 +37,6 @@ config RT_AI_USE_K210
 	bool "RT-AK use the k210-KPU backend"
 	default y
 
-menu "mpy-extmods"
-config PRJ_USING_EXTMODS_MISC
-    bool "Enable MPY extmods"
-    select PKG_USING_MICROPYTHON
-    select MICROPYTHON_USING_USEREXTMODS
-    default y
-
-    if PRJ_USING_EXTMODS_MISC
-        menuconfig EXTMODS_MISC_USING_K210
-            bool "Enable K210 extmods"
-            default y
-
-            if EXTMODS_MISC_USING_K210
-                config EXTMODS_K210_LCDCTL
-                    bool "Enable LCD Control"
-                    default y
-                config EXTMODS_K210_DVP
-                    bool "Enable DVP Camera"
-                    select BSP_USING_CAMERA
-                    default y
-            endif
+# Micropython extend modules
+source "extmods/Kconfig"
 
-        config PRJ_USING_RT_AK_EXMODS
-            bool "Enable RT-AK MPY module"
-            default y
-    endif
-endmenu

project_0/driver/Kconfig

@@ -1,5 +1,39 @@
 menu "Hardware Drivers Config"
 
+menu "IO Groups Power Supply Settings"
+
+    choice
+        prompt "voltage level for Group A -- Bank0~2"
+        default BSP_GROUPA_POWER_SUPPLY_3V3
+        
+        config BSP_GROUPA_POWER_SUPPLY_1V8
+            bool "1.8V"
+        config BSP_GROUPA_POWER_SUPPLY_3V3
+            bool "3.3V"
+    endchoice
+
+    choice
+        prompt "voltage level for Group B -- Bank3~5"
+        default BSP_GROUPB_POWER_SUPPLY_3V3
+        
+        config BSP_GROUPB_POWER_SUPPLY_1V8
+            bool "1.8V"
+        config BSP_GROUPB_POWER_SUPPLY_3V3
+            bool "3.3V"
+    endchoice
+
+    choice
+        prompt "voltage level for Group C -- Bank6~7"
+        default BSP_GROUPC_POWER_SUPPLY_3V3
+        
+        config BSP_GROUPC_POWER_SUPPLY_1V8
+            bool "1.8V"
+        config BSP_GROUPC_POWER_SUPPLY_3V3
+            bool "3.3V"
+    endchoice
+
+endmenu
+
 config BSP_USING_UART_HS
     bool "Enable High Speed UART"
     default y
@@ -43,10 +77,44 @@ menuconfig BSP_USING_UART3
     endif
 endmenu
 
+config BSP_USING_I2C0
+    bool "Enable I2C0"
+    select RT_USING_I2C
+    default n
+    if BSP_USING_I2C0
+        config BSP_I2C0_SCL_PIN
+            int "I2C0 SCL pin number"
+            default 18
+        config BSP_I2C0_SDA_PIN
+            int "I2C0 SDA pin number"
+            default 19
+    endif
+
 config BSP_USING_I2C1
-    bool "Enable I2C1 (GPIO36/37)"
+    bool "Enable I2C1"
+    select RT_USING_I2C
+    default n
+    if BSP_USING_I2C1
+        config BSP_I2C1_SCL_PIN
+            int "I2C1 SCL pin number"
+            default 0
+        config BSP_I2C1_SDA_PIN
+            int "I2C1 SDA pin number"
+            default 1
+    endif
+
+config BSP_USING_I2C2
+    bool "Enable I2C2"
     select RT_USING_I2C
     default n
+    if BSP_USING_I2C2
+        config BSP_I2C2_SCL_PIN
+            int "I2C2 SCL pin number"
+            default 3
+        config BSP_I2C2_SDA_PIN
+            int "I2C2 SDA pin number"
+            default 4
+    endif
 
 menuconfig BSP_USING_SPI1
     bool "Enable SPI1"
@@ -166,40 +234,182 @@ if BSP_USING_LCD
         default 320
 endif
 
+config BSP_USING_I2S0
+    bool "Enable I2S0(Play Only)"
+    select RT_USING_AUDIO
+    default y
+    if BSP_USING_I2S0
+        config BSP_I2S0_OUT_D1_PIN
+            int "I2S0 out_d1 pin number"
+            default 0
+        config BSP_I2S0_WS_PIN
+            int "I2S0 ws pin number"
+            default 1
+        config BSP_I2S0_SCLK_PIN
+            int "I2S0 sclk pin number"
+            default 2
+    endif
+
+config BSP_USING_I2S1
+    bool "Enable I2S1(Record Only)"
+    select RT_USING_AUDIO
+    default y
+    if BSP_USING_I2S1
+        config BSP_I2S1_IN_D0_PIN
+            int "I2S1 in_d0 pin number"
+            default 34
+        config BSP_I2S1_WS_PIN
+            int "I2S1 ws pin number"
+            default 33
+        config BSP_I2S1_SCLK_PIN
+            int "I2S1 sclk pin number"
+            default 35
+    endif
 
-menuconfig BSP_USING_CAMERA
+config BSP_USING_I2S2
+    bool "Enable I2S2"
+    select RT_USING_AUDIO
+    default n
+    if BSP_USING_I2S2
+        config BSP_I2S2_OUT_D1_PIN
+            int "I2S2 out_d1 pin number"
+            default 7
+        config BSP_I2S2_WS_PIN
+            int "I2S2 ws pin number"
+            default 8
+        config BSP_I2S2_SCLK_PIN
+            int "I2S2 sclk pin number"
+            default 9
+    endif
+
+menuconfig BSP_USING_PWM
+    bool "Enable PWM"
+    select RT_USING_PWM
+    default n
+
+    if BSP_USING_PWM
+        config BSP_PWM_CHN0_ENABLE
+            bool "Enable PWM Channel 0"
+            default y
+
+            if BSP_PWM_CHN0_ENABLE
+                config BSP_PWM_CHN0_PIN
+                int "pwm channel 0 pin number"
+                default 24
+            endif
+
+        config BSP_PWM_CHN1_ENABLE
+            bool "Enable PWM Channel 1"
+            default n
+
+            if BSP_PWM_CHN1_ENABLE
+                config BSP_PWM_CHN1_PIN
+                int "pwm channel 1 pin number"
+                default 25
+            endif
+
+        config BSP_PWM_CHN2_ENABLE
+            bool "Enable PWM Channel 2"
+            default n
+
+            if BSP_PWM_CHN2_ENABLE
+                config BSP_PWM_CHN2_PIN
+                int "pwm0 channel 2 pin number"
+                default 26
+            endif
+
+        config BSP_PWM_CHN3_ENABLE
+            bool "Enable PWM Channel 3"
+            default n
+
+            if BSP_PWM_CHN3_ENABLE
+                config BSP_PWM_CHN3_PIN
+                int "pwm channel 3 pin number"
+                default 27
+            endif
+    endif
+
+menuconfig BSP_USING_TIMER0
+    bool "Enable Timer0"
+    select RT_USING_HWTIMER
+    default n
+
+    if BSP_USING_TIMER0
+        config BSP_TIMER0_CHN0_ENABLE
+            bool "Enable Timer0 Channel 0"
+            default n
+        config BSP_TIMER0_CHN1_ENABLE
+            bool "Enable Timer0 Channel 1"
+            default n
+        config BSP_TIMER0_CHN2_ENABLE
+            bool "Enable Timer0 Channel 2"
+            default n
+        config BSP_TIMER0_CHN3_ENABLE
+            bool "Enable Timer0 Channel 3"
+            default n                
+    endif
+
+menuconfig BSP_USING_TIMER1
+    bool "Enable Timer1"
+    select RT_USING_HWTIMER
+    default n
+
+    if BSP_USING_TIMER1
+        config BSP_TIMER1_CHN0_ENABLE
+            bool "Enable Timer1 Channel 0"
+            default n
+        config BSP_TIMER1_CHN1_ENABLE
+            bool "Enable Timer1 Channel 1"
+            default n
+        config BSP_TIMER1_CHN2_ENABLE
+            bool "Enable Timer1 Channel 2"
+            default n
+        config BSP_TIMER1_CHN3_ENABLE
+            bool "Enable Timer1 Channel 3"
+            default n                
+    endif
+
+config BSP_USING_CAMERA
     bool "Enable Camera"
     default n
 
-if BSP_USING_CAMERA
-    config BSP_CAMERA_SCCB_SDA_PIN
-        int "SCCB SDA pin number for camera"
-        default 15
-    config BSP_CAMERA_SCCB_SDA0_PIN
-        int "SCCB SDA0 pin number for gc03x8"
-        default 0
-    config BSP_CAMERA_SCCB_SCLK_PIN
-        int "SCCB SCLK pin number for camera"
+    if BSP_USING_CAMERA
+        choice
+            prompt "Select camera type"
+            default CAMERA_USING_GC0308
+
+            config CAMERA_USING_GC0308
+                bool "Camera using gc0308"
+        endchoice
+
+	    config BSP_CAMERA_SCCB_SDA_PIN
+	        int "SCCB SDA pin number for camera"
+	        default 15
+        config BSP_CAMERA_SCCB_SDA0_PIN
+            int "SCCB SDA0 pin number for gc03x8"
+            default 0
+        config BSP_CAMERA_SCCB_SCLK_PIN
+            int "SCCB SCLK Pin"
         default 14
-    config BSP_CAMERA_CMOS_RST_PIN
-        int "CMOS RST pin number for camera"
+        config BSP_CAMERA_CMOS_RST_PIN
+            int "RST Pin"
         default 13
-    config BSP_CAMERA_CMOS_VSYNC_PIN
-        int "CMOS VSYNC pin number for camera"
-        default 12
-    config BSP_CAMERA_CMOS_PWDN_PIN
-        int "CMOS PWDN pin number for camera"
+        config BSP_CAMERA_CMOS_VSYNC_PIN
+            int "VSYNC Pin"
+            default 12
+        config BSP_CAMERA_CMOS_PWDN_PIN
+            int "PWDN Pin"
         default 11
-    config BSP_CAMERA_CMOS_XCLK_PIN
-        int "CMOS XCLK pin number for camera"
+        config BSP_CAMERA_CMOS_XCLK_PIN
+            int "XCLK Pin"
         default 9
-    config BSP_CAMERA_CMOS_PCLK_PIN
-        int "CMOS PCLK pin number for camera"
+        config BSP_CAMERA_CMOS_PCLK_PIN
+            int "PCLK Pin"
         default 8
-    config BSP_CAMERA_CMOS_HREF_PIN
-        int "CMOS HREF pin number for camera"
+        config BSP_CAMERA_CMOS_HREF_PIN
+            int "HREF Pin"
         default 10
-endif
+	endif
 
 menuconfig BSP_USING_RW007
     bool "Enable RW007"
@@ -208,6 +418,29 @@ menuconfig BSP_USING_RW007
     select PKG_USING_RW007
     select RT_USING_WIFI
     default n
+    
+menuconfig  BSP_USING_RTC
+    bool "Enable hardware rtc"
+    select RT_USING_RTC    
+    default n
+
+    if  BSP_USING_RTC
+        choice
+        prompt "select hardware rtc "
+        default BSP_USING_ONCHIP_RTC
 
+        config BSP_USING_SD3068
+            bool "Enable onboard rtc (sd3068) driver"
+
+        config BSP_USING_ONCHIP_RTC
+            bool "Enable onchip rtc driver"
+        endchoice
+    endif
+
+
+config BSP_USING_WDT
+    bool "Enable Watchdog"
+    select RT_USING_WDT
+    default n
 endmenu
 

project_0/driver/SConscript

@@ -31,6 +31,9 @@ if GetDepend('RT_USING_I2C'):
 
 if GetDepend('RT_USING_SPI'):
     src += ['drv_spi.c']
+    
+if GetDepend('RT_USING_AUDIO'):
+    src += ['drv_i2s.c']
 
 if GetDepend('RT_USING_PWM'):
     src += ['drv_pwm.c']
@@ -40,6 +43,9 @@ if GetDepend('RT_USING_WDT'):
 
 if GetDepend('BSP_USING_RW007'):
     src += ['rw007_port.c']
+    
+if GetDepend('BSP_USING_ONCHIP_RTC'):
+    src += ['drv_rtc.c']
 
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
 

project_0/driver/camera/SConscript

@@ -1,9 +1,11 @@
 from building import *
 
 cwd     = GetCurrentDir()
-src     = Glob('*.c') + Glob('*.cpp')
+# src     = Glob('*.c') + Glob('*.cpp')
+src = []
 CPPPATH = [cwd]
-
+if GetDepend('CAMERA_USING_GC0308'):
+    src += ['drv_gc0308.c']
 group = DefineGroup('Drivers', src, depend = ['BSP_USING_CAMERA'], CPPPATH = CPPPATH)
 
 Return('group')

project_0/applications/board_config/drv_gc0308.c → project_0/driver/camera/drv_gc0308.c

@@ -12,6 +12,7 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
 #include "dvp.h"
 #include "fpioa.h"
 #include "i2c.h"
@@ -19,12 +20,9 @@
 #include <unistd.h>
 #include <string.h>
 #include <stdlib.h>
-
+#include <rtthread.h>
 #include "syslog.h"
-#include "board_config.h"
 #include <stdint.h>
-#if CAMERA_USING_GC0308
-
 // #define DVP_PIN_SDA 15
 // #define DVP_PIN_SDA0 0
 // #define DVP_PIN_SCL 14
@@ -695,8 +693,8 @@ void i2c_master_init(uint8_t num)
 {
     if (num)                                            //1,GC0380  RGB
     {
-        fpioa_set_function(DVP_PIN_SDA, FUNC_I2C1_SDA);
-        fpioa_set_function(DVP_PIN_SCL, FUNC_I2C1_SCLK);
+        fpioa_set_function(BSP_CAMERA_SCCB_SDA_PIN, FUNC_I2C1_SDA);
+        fpioa_set_function(BSP_CAMERA_SCCB_SCLK_PIN, FUNC_I2C1_SCLK);
     }
     #if 0
     else
@@ -1999,4 +1997,3 @@ int rt_hw_gc0308_init(void)
 }
 INIT_DEVICE_EXPORT(rt_hw_gc0308_init);
 
-#endif //CAMERA_USING_GC0308

project_0/driver/drv_hw_timer.c

@@ -0,0 +1,225 @@
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include "timer.h"
+#include "sysctl.h"
+
+struct khwtimer
+{
+    rt_hwtimer_t time_device;
+    timer_device_number_t devno;
+    int chn;
+    const char *name;
+};
+
+extern uint32_t timer_get_count(timer_device_number_t timer_number, timer_channel_number_t channel);
+extern void timer_set_reload(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t count);
+
+static int timer_isr(void *ctx)
+{
+    struct khwtimer *ktm = (struct khwtimer*)ctx;
+
+    rt_device_hwtimer_isr(&ktm->time_device);
+
+    return 0;
+}
+
+static void khwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
+{
+    struct khwtimer *ktm = (struct khwtimer*)(timer->parent.user_data);
+
+    RT_ASSERT(ktm->devno < TIMER_DEVICE_2);
+
+    if (state)
+    {
+        sysctl_clock_enable(SYSCTL_CLOCK_TIMER0 + ktm->devno);
+    }
+    else
+    {
+        timer_set_enable(ktm->devno, ktm->chn, 0);
+    }
+}
+
+static rt_err_t khwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode)
+{
+    struct khwtimer *ktm = (struct khwtimer*)(timer->parent.user_data);
+
+    RT_ASSERT(ktm->devno < TIMER_DEVICE_2);
+
+    timer_set_reload(ktm->devno, ktm->chn, cnt);
+    timer_irq_register(ktm->devno, ktm->chn,
+                       mode == HWTIMER_MODE_ONESHOT,
+                       1,
+                       timer_isr, ktm);
+
+    timer_set_enable(ktm->devno, ktm->chn, 1);
+
+    return 0;
+}
+
+static void khwtimer_stop(struct rt_hwtimer_device *timer)
+{
+    struct khwtimer *ktm = (struct khwtimer*)(timer->parent.user_data);
+    
+    RT_ASSERT(ktm->devno < TIMER_DEVICE_2);
+
+    timer_set_enable(ktm->devno, ktm->chn, 0);
+}
+
+static rt_uint32_t khwtimer_count_get(struct rt_hwtimer_device *timer)
+{
+    struct khwtimer *ktm = (struct khwtimer*)(timer->parent.user_data);
+
+    RT_ASSERT(ktm->devno < TIMER_DEVICE_2);
+
+    return timer_get_count(ktm->devno, ktm->chn);
+}
+
+static rt_err_t khwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args)
+{
+    struct khwtimer *ktm = (struct khwtimer*)(timer->parent.user_data);
+    rt_uint32_t *f = (rt_uint32_t *)args;
+
+    return 0;
+}
+
+static const struct rt_hwtimer_ops _ops =
+{
+    khwtimer_init,
+    khwtimer_start,
+    khwtimer_stop,
+    khwtimer_count_get,
+    khwtimer_control
+};
+
+static struct rt_hwtimer_info _info =
+{
+    .maxcnt  = 0xffffffff,
+    .cntmode = HWTIMER_CNTMODE_DW
+};
+
+int k210_hwtimer_init(void)
+{
+    struct khwtimer *ktm;
+
+    _info.maxfreq = sysctl_clock_get_freq(SYSCTL_CLOCK_TIMER0);
+    _info.minfreq = _info.maxfreq;
+
+#if  defined(BSP_TIMER0_CHN0_ENABLE) || defined(BSP_TIMER0_CHN1_ENABLE) || defined(BSP_TIMER0_CHN2_ENABLE) || defined(BSP_TIMER0_CHN3_ENABLE)
+    timer_init(TIMER_DEVICE_0);
+    sysctl_clock_disable(SYSCTL_CLOCK_TIMER0);
+#endif
+
+#ifdef BSP_TIMER0_CHN0_ENABLE
+    static struct khwtimer _timer00;
+
+    ktm = &_timer00;
+    ktm->devno = TIMER_DEVICE_0;
+    ktm->chn = TIMER_CHANNEL_0;
+    ktm->name = "timer00";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER0_CHN1_ENABLE
+    static struct khwtimer _timer01;
+
+    ktm = &_timer01;
+    ktm->devno = TIMER_DEVICE_0;
+    ktm->chn = TIMER_CHANNEL_1;     
+    ktm->name = "timer01";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER0_CHN2_ENABLE
+    static struct khwtimer _timer02;
+
+    ktm = &_timer02;
+    ktm->devno = TIMER_DEVICE_0;
+    ktm->chn = TIMER_CHANNEL_2;     
+    ktm->name = "timer02";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER0_CHN3_ENABLE
+    static struct khwtimer _timer03;
+
+    ktm = &_timer03;
+    ktm->devno = TIMER_DEVICE_0;
+    ktm->chn = TIMER_CHANNEL_3;     
+    ktm->name = "timer03";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+
+#if  defined(BSP_TIMER1_CHN0_ENABLE) || defined(BSP_TIMER1_CHN1_ENABLE) || defined(BSP_TIMER1_CHN2_ENABLE) || defined(BSP_TIMER1_CHN3_ENABLE)
+    timer_init(TIMER_DEVICE_1);
+    sysctl_clock_disable(SYSCTL_CLOCK_TIMER1);
+#endif
+
+#ifdef BSP_TIMER1_CHN0_ENABLE
+    static struct khwtimer _timer10;
+
+    ktm = &_timer10;
+    ktm->devno = TIMER_DEVICE_1;
+    ktm->chn = TIMER_CHANNEL_0;
+    ktm->name = "timer10";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER1_CHN1_ENABLE
+    static struct khwtimer _timer11;
+
+    ktm = &_timer11;
+    ktm->devno = TIMER_DEVICE_1;
+    ktm->chn = TIMER_CHANNEL_1;
+    ktm->name = "timer11";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER1_CHN2_ENABLE
+    static struct khwtimer _timer12;
+
+    ktm = &_timer12;
+    ktm->devno = TIMER_DEVICE_1;
+    ktm->chn = TIMER_CHANNEL_2;
+    ktm->name = "timer12";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+#ifdef BSP_TIMER1_CHN3_ENABLE
+    static struct khwtimer _timer13;
+
+    ktm = &_timer13;
+    ktm->devno = TIMER_DEVICE_1;
+    ktm->chn = TIMER_CHANNEL_3;
+    ktm->name = "timer13";
+    ktm->time_device.ops = &_ops;
+    ktm->time_device.info = &_info;
+
+    rt_device_hwtimer_register(&ktm->time_device, ktm->name, ktm);
+#endif
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(k210_hwtimer_init);

project_0/driver/drv_i2c.c

@@ -5,7 +5,7 @@
  *
  * Change Logs:
  * Date           Author         Notes
- * 2021-12-24     flybreak    first version
+ * 2020-08-21     heyuanjie87    first version
  */
 
 #include <rtthread.h>
@@ -16,117 +16,327 @@
 #include "gpiohs.h"
 #include "utils.h"
 #include "sleep.h"
+#include "fpioa.h"
+#ifdef RT_USING_I2C
 
-#include <fpioa.h>
-#include <sysctl.h>
+static int ki2c_send(volatile i2c_t *i2c_adapter, uint8_t *send_buf, uint32_t send_buf_len)
+{
+    uint32_t fifo_len, index;
 
-#ifdef RT_USING_I2C
+    while (send_buf_len)
+    {
+        fifo_len = 8 - i2c_adapter->txflr;
+        fifo_len = send_buf_len < fifo_len ? send_buf_len : fifo_len;
+        for (index = 0; index < fifo_len; index++)
+            i2c_adapter->data_cmd = I2C_DATA_CMD_DATA(*send_buf++);
+        if (i2c_adapter->tx_abrt_source != 0)
+        {
+            while (i2c_adapter->status & I2C_STATUS_ACTIVITY);	//
+            i2c_adapter->clr_intr = i2c_adapter->clr_intr;		//
+            return 1;
+        }
 
-#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2) && !defined(BSP_USING_I2C3) && !defined(BSP_USING_I2C4)
-    #error "Please define at least one BSP_USING_I2Cx"
-    /* this driver can be disabled at menuconfig  RT-Thread Components  Device Drivers */
-#endif
+        send_buf_len -= fifo_len;
+    }
+
+    return 0;
+}
 
-struct _i2c_bus
+static int ki2c_recv(volatile i2c_t *i2c_adapter, uint8_t *receive_buf, uint32_t receive_buf_len)
 {
-    struct rt_i2c_bus_device parent;
-    i2c_device_number_t based;
-    char *device_name;
-};
+    uint32_t fifo_len, index;
+    uint32_t rx_len = receive_buf_len;
 
-static struct _i2c_bus _i2c_device[] =
+    while (receive_buf_len || rx_len)
+    {
+        fifo_len = i2c_adapter->rxflr;
+        fifo_len = rx_len < fifo_len ? rx_len : fifo_len;
+        for (index = 0; index < fifo_len; index++)
+            *receive_buf++ = (uint8_t)i2c_adapter->data_cmd;
+        rx_len -= fifo_len;
+        fifo_len = 8 - i2c_adapter->txflr;
+        fifo_len = receive_buf_len < fifo_len ? receive_buf_len : fifo_len;
+        for (index = 0; index < fifo_len; index++)
+            i2c_adapter->data_cmd = I2C_DATA_CMD_CMD;
+        if (i2c_adapter->tx_abrt_source != 0)
+            return 1;
+        receive_buf_len -= fifo_len;
+    }
+
+    return 0;
+}
+
+static void ki2c_setaddr(volatile i2c_t *i2c_adapter, uint16_t addr, int width)
 {
-    #ifdef BSP_USING_I2C1
+    i2c_adapter->tar = I2C_TAR_ADDRESS(addr) & I2C_TAR_ADDRESS_MASK;
+
+    if(width == 10)
     {
-        .based = I2C_DEVICE_0,
-        .device_name = "i2c1"
-    },
-    #endif
-};
+        i2c_adapter->tar |= I2C_TAR_10BITADDR_MASTER;
+    }
+    else
+    {
+        i2c_adapter->tar &= ~I2C_TAR_10BITADDR_MASTER;
+    }
+    
+}
 
-static rt_size_t _master_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
+static int ki2c_waittx(volatile i2c_t *i2c_adapter, int timeout_ms)
 {
-    rt_uint32_t send_num;
-    int abort_status = 1;
-    struct _i2c_bus *i2c_bus;
-    struct rt_i2c_msg *msg;
+    rt_tick_t start;
 
-    RT_ASSERT(bus != RT_NULL);
-    i2c_bus = rt_list_entry(bus, struct _i2c_bus, parent);
-    RT_ASSERT(i2c_bus != RT_NULL);
-    for (send_num = 0; send_num < num; send_num++)
+    start = rt_tick_get();
+    while ((i2c_adapter->status & I2C_STATUS_ACTIVITY) || !(i2c_adapter->status & I2C_STATUS_TFE))
     {
-        msg = &msgs[send_num];
+        if (rt_tick_from_millisecond(rt_tick_get() - start) > timeout_ms)
+            break;
+    }
 
-        if (msg->flags & RT_I2C_RD)
-        {
-            i2c_init(i2c_bus->based, msg->addr, 7, 200000);
+    if (i2c_adapter->tx_abrt_source != 0)
+        return 1;
 
-            abort_status = i2c_recv_data(i2c_bus->based, 0, 0, msg->buf, msg->len);
+    return 0;
+}
 
-            if (abort_status != 0)
-            {
-                return 0;
-            }
+static void ki2c_clearerr(volatile i2c_t *i2c_adapter)
+{
+    i2c_adapter->clr_tx_abrt = i2c_adapter->clr_tx_abrt;
+}
+
+static rt_size_t _i2c_mst_xfer(struct rt_i2c_bus_device *bus,
+                               struct rt_i2c_msg msgs[],
+                               rt_uint32_t num)
+{
+    rt_size_t i;
+    i2c_t *kbus = (i2c_t *)bus->priv;
+    int status;
+    int waittx = 0;
+
+    RT_ASSERT(bus != RT_NULL);
+    if(msgs[0].flags & RT_I2C_ADDR_10BIT)
+    {
+        ki2c_setaddr(kbus, msgs[0].addr, 10);
+    }
+    else
+    {
+        ki2c_setaddr(kbus, msgs[0].addr, 7);
+    }
+    
+    
+    ki2c_clearerr(kbus);
+
+    for (i = 0; i < num; i++)
+    {
+        waittx = 0;
+
+        if (msgs[i].flags & RT_I2C_RD)
+        {
+            status = ki2c_recv(kbus, msgs[i].buf, msgs[i].len);
         }
         else
         {
-            i2c_init(i2c_bus->based, msg->addr, 7, 200000);
-            abort_status = i2c_send_data(i2c_bus->based, msg->buf, msg->len);
-
-            if (abort_status != 0)
-            {
-                return 0;
-            }
+            status = ki2c_send(kbus, msgs[i].buf, msgs[i].len);
+            waittx = 1;
         }
+
+        if (status != 0)
+            goto _out;
+    }
+
+    if (waittx)
+    {
+        if (ki2c_waittx(kbus, 2000) != 0)
+            i = 0;
     }
 
-    return send_num;
+_out:
+    return i;
 }
 
-static rt_size_t _slave_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
+static const struct rt_i2c_bus_device_ops i2c_ops =
 {
-    return 0;
+    .master_xfer = _i2c_mst_xfer,
+    .slave_xfer = RT_NULL,
+    .i2c_bus_control = RT_NULL,
+};
+
+#ifdef RT_USING_I2C_BITOPS
+
+typedef struct pin_info_s {
+    uint32_t    scl;
+    uint32_t    sda;
+} pin_info_t;
+
+static void set_sda(void *data, rt_int32_t state)
+{
+    pin_info_t  *pin = (pin_info_t *)data;
+    /* state = 1: disable output. state = 0: enable output.*/
+    set_gpio_bit(gpiohs->output_en.u32, pin->sda, !state);  
+}
+
+static void set_scl(void *data, rt_int32_t state)
+{ 
+    pin_info_t  *pin = (pin_info_t *)data;
+    /* state = 1: disable output. state = 0: enable output.*/
+    set_gpio_bit(gpiohs->output_en.u32, pin->scl, !state);
 }
-static rt_err_t _i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t cmd, rt_uint32_t arg)
+
+static rt_int32_t get_sda(void *data)
 {
-    return 0;
+    pin_info_t  *pin = (pin_info_t *)data;
+    /* disable output.*/
+    set_gpio_bit(gpiohs->output_en.u32, pin->sda, 0);
+
+    return get_gpio_bit(gpiohs->input_val.u32, pin->sda);
 }
 
-static const struct rt_i2c_bus_device_ops _ops =
+static rt_int32_t get_scl(void *data)
 {
-    .master_xfer = _master_xfer,
-    .slave_xfer = _slave_xfer,
-    .i2c_bus_control = _i2c_bus_control,
+    pin_info_t  *pin = (pin_info_t *)data;
+    /* disable output.*/
+    set_gpio_bit(gpiohs->output_en.u32, pin->scl, 0);
+
+    return get_gpio_bit(gpiohs->input_val.u32, pin->scl);  
+}
+
+static void udelay(rt_uint32_t us)
+{
+    usleep((uint64_t)us);
+}
+
+static struct rt_i2c_bit_ops bit_ops_0 =
+{
+    RT_NULL,
+    set_sda,
+    set_scl,
+    get_sda,
+    get_scl,
+    udelay,
+    5,
+    5
 };
 
-static void hw_i2c_init(void)
+static struct rt_i2c_bit_ops bit_ops_1 =
 {
-#ifdef BSP_USING_I2C1
-    fpioa_set_function(37, FUNC_I2C0_SDA);
-    fpioa_set_function(36, FUNC_I2C0_SCLK);
-    sysctl_enable_irq();
-    i2c_init(I2C_DEVICE_0, 0x68, 7, 200000);
+    RT_NULL,
+    set_sda,
+    set_scl,
+    get_sda,
+    get_scl,
+    udelay,
+    5,
+    5
+};
+
+static struct rt_i2c_bit_ops bit_ops_2 =
+{
+    RT_NULL,
+    set_sda,
+    set_scl,
+    get_sda,
+    get_scl,
+    udelay,
+    5,
+    5
+};
+
+extern int get_pin_channel(rt_base_t pin_index);
 #endif
-}
 
 int rt_hw_i2c_init(void)
 {
-    rt_uint8_t i = 0;
-    rt_uint8_t i2c_bus_num = 0;
+    struct  rt_i2c_bus_device *busdev;
 
-    hw_i2c_init();
+#ifdef BSP_USING_I2C0
+    static  struct rt_i2c_bus_device i2c_dev0;
+    busdev = &i2c_dev0;
 
-    i2c_bus_num = sizeof(_i2c_device) / sizeof(_i2c_device[0]);
+    #ifdef RT_USING_I2C_BITOPS
+    fpioa_set_function(BSP_I2C0_SCL_PIN, FUNC_RESV0);
+    fpioa_set_function(BSP_I2C0_SDA_PIN, FUNC_RESV0);
 
-    for (i = 0; i < i2c_bus_num; i++)
-    {
-        _i2c_device[i].parent.ops = &_ops;
-        rt_i2c_bus_device_register(&_i2c_device[i].parent, _i2c_device[i].device_name);
-    }
+    rt_pin_write(BSP_I2C0_SCL_PIN, PIN_LOW);
+    rt_pin_write(BSP_I2C0_SDA_PIN, PIN_LOW);
+    rt_pin_mode(BSP_I2C0_SCL_PIN, PIN_MODE_INPUT_PULLUP);
+    rt_pin_mode(BSP_I2C0_SDA_PIN, PIN_MODE_INPUT_PULLUP);
+
+    static  pin_info_t  pin0;
+    pin0.scl = get_pin_channel(BSP_I2C0_SCL_PIN);
+    pin0.sda = get_pin_channel(BSP_I2C0_SDA_PIN);
+    bit_ops_0.data = (void *)&pin0;
+    
+    busdev->priv = (void *)&bit_ops_0;
+    rt_i2c_bit_add_bus(busdev, "i2c0");
+    #else
+
+    busdev->ops = &i2c_ops;
+    busdev->priv = (void *)I2C0_BASE_ADDR;
+
+    i2c_init(I2C_DEVICE_0, 0, 7, 100000);
+    rt_i2c_bus_device_register(busdev, "i2c0");       
+    #endif
+#endif
+
+#ifdef BSP_USING_I2C1
+    static  struct rt_i2c_bus_device i2c_dev1;
+    busdev = &i2c_dev1;
+
+    #ifdef RT_USING_I2C_BITOPS
+    fpioa_set_function(BSP_I2C1_SCL_PIN, FUNC_RESV0);
+    fpioa_set_function(BSP_I2C1_SDA_PIN, FUNC_RESV0);
+
+    rt_pin_write(BSP_I2C1_SCL_PIN, PIN_LOW);
+    rt_pin_write(BSP_I2C1_SDA_PIN, PIN_LOW);
+    rt_pin_mode(BSP_I2C1_SCL_PIN, PIN_MODE_INPUT_PULLUP);
+    rt_pin_mode(BSP_I2C1_SDA_PIN, PIN_MODE_INPUT_PULLUP);
+
+    static  pin_info_t  pin1;
+    pin1.scl = get_pin_channel(BSP_I2C1_SCL_PIN);
+    pin1.sda = get_pin_channel(BSP_I2C1_SDA_PIN);
+    bit_ops_1.data = (void *)&pin1;
+    
+    busdev->priv = (void *)&bit_ops_1;
+    rt_i2c_bit_add_bus(busdev, "i2c1");
+    #else
+
+    busdev->ops = &i2c_ops;
+    busdev->priv = (void *)I2C1_BASE_ADDR;
 
+    i2c_init(I2C_DEVICE_1, 0, 7, 100000);
+    rt_i2c_bus_device_register(busdev, "i2c1");
+    #endif
+#endif
+
+#ifdef BSP_USING_I2C2
+    static  struct rt_i2c_bus_device i2c_dev2;
+    busdev = &i2c_dev2;
+
+    #ifdef RT_USING_I2C_BITOPS
+    fpioa_set_function(BSP_I2C2_SCL_PIN, FUNC_RESV0);
+    fpioa_set_function(BSP_I2C2_SDA_PIN, FUNC_RESV0);
+
+    rt_pin_write(BSP_I2C2_SCL_PIN, PIN_LOW);
+    rt_pin_write(BSP_I2C2_SDA_PIN, PIN_LOW);
+    rt_pin_mode(BSP_I2C2_SCL_PIN, PIN_MODE_INPUT_PULLUP);
+    rt_pin_mode(BSP_I2C2_SDA_PIN, PIN_MODE_INPUT_PULLUP);
+
+    static  pin_info_t  pin2;
+    pin2.scl = get_pin_channel(BSP_I2C2_SCL_PIN);
+    pin2.sda = get_pin_channel(BSP_I2C2_SDA_PIN);
+    bit_ops_2.data = (void *)&pin2;
+    
+    busdev->priv = (void *)&bit_ops_2;
+    rt_i2c_bit_add_bus(busdev, "i2c2");
+    #else
+
+    busdev->ops = &i2c_ops;
+    busdev->priv = (void *)I2C2_BASE_ADDR;
+
+    i2c_init(I2C_DEVICE_2, 0, 7, 100000);
+    rt_i2c_bus_device_register(busdev, "i2c2");
+    #endif
+#endif
     return 0;
 }
-INIT_DEVICE_EXPORT(rt_hw_i2c_init);
-
-#endif /* BSP_USING_I2C */
+INIT_BOARD_EXPORT(rt_hw_i2c_init);
+#endif

project_0/driver/drv_i2s.c

@@ -0,0 +1,692 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 SummerGift <zhangyuan@rt-thread.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#include "board.h"
+#include "i2s.h"
+#include "dmalock.h"
+
+//#define DBG_ENABLE
+#define DBG_LEVEL DBG_LOG
+#define DBG_TAG "i2s"
+#define DBG_COLOR
+#include <rtdbg.h>
+
+typedef struct
+{
+    struct rt_audio_device audio;
+    struct rt_audio_configure config;
+    struct rt_audio_configure rxconfig;
+
+    const char *name;
+    i2s_device_number_t devno;
+    dmac_channel_number_t txdma;
+    i2s_device_number_t rxdevno;
+    dmac_channel_number_t rxdma;
+    uint8_t *tx_fifo;
+    uint16_t *tx_buf;
+    uint32_t *rx_buf;
+    int rxindex;
+    uint32_t caps;
+} ki2s_t;
+
+#define KI2S_TX_BLKSZ 1024
+#define KI2S_RX_BLKSZ 512
+
+static int dmacb(void *ctx)
+{
+    ki2s_t *ki2s = (ki2s_t *)ctx;
+
+    rt_audio_tx_complete(&ki2s->audio);
+
+    return 0;
+}
+
+static int rx_dmacb(void *ctx)
+{
+    ki2s_t *i2s = (ki2s_t *)ctx;
+    int16_t *d;
+    uint32_t *rec, *tmp;
+    int i;
+
+    if (i2s->rxindex)
+    {
+        i2s->rxindex = 0;
+        rec = i2s->rx_buf;
+        d = (int16_t*)&i2s->rx_buf[KI2S_RX_BLKSZ];
+    }
+    else
+    {
+        i2s->rxindex = 1;
+        rec = &i2s->rx_buf[KI2S_RX_BLKSZ];
+        d = (int16_t*)i2s->rx_buf;
+    }
+
+    i2s_receive_data_dma(i2s->rxdevno, (void*)rec, KI2S_RX_BLKSZ, i2s->rxdma);
+
+    tmp = (uint32_t*)d;
+    for (i = 0; i < KI2S_RX_BLKSZ/2; i ++)
+    {
+        d[2 * i] = (int16_t)(tmp[2 * i + 1]&0xffff);
+        d[2 * i + 1] = d[2 * i];
+    }
+
+    rt_audio_rx_done(&i2s->audio, (rt_uint8_t*)d, KI2S_RX_BLKSZ * 2);
+
+    return 0;
+}
+
+static void i2s_send_16_32(i2s_device_number_t device_num, dmac_channel_number_t channel_num,
+                           const uint8_t *buf, size_t buf_len, size_t bits_per_sample)
+{
+    size_t sample_cnt;
+
+    sample_cnt = buf_len / (bits_per_sample / 8) / 2;
+
+    if (bits_per_sample == 16)
+    {
+        i2s_set_dma_divide_16(device_num, 1);
+        i2s_send_data_dma(device_num, buf, sample_cnt, channel_num);
+    }
+    else if (bits_per_sample == 32)
+    {
+        i2s_set_dma_divide_16(device_num, 0);
+        i2s_send_data_dma(device_num, buf, sample_cnt * 2, channel_num);
+    }
+}
+
+static int voice_to16(uint8_t *pcm, size_t length, int track_num, int bps, uint16_t *buf, size_t *send_len)
+{
+    int i, j = 0;
+
+    switch (bps)
+    {
+    case 16:
+    {
+        uint16_t *src = (uint16_t *)pcm;
+
+        length /= 2;
+        for (i = 0; i < length; i++)
+        {
+            buf[2 * i] = src[i];
+            buf[2 * i + 1] = 0;
+        }
+    }
+    break;
+    case 24:
+    {
+        uint8_t *src = pcm;
+
+        length /= 3;
+        for (i = 0; i < length; i++)
+        {
+            buf[2 * i] = 0;
+            buf[2 * i] |= src[j++];
+            buf[2 * i] |= src[j++] << 8;
+            j++;
+
+            buf[2 * i + 1] = 0;
+            if (track_num == 2)
+            {
+                buf[2 * i + 1] |= pcm[j++];
+                buf[2 * i + 1] |= pcm[j++] << 8;
+                j++;
+            }
+        }
+    }
+    break;
+    case 32:
+    default:
+    {
+        uint32_t *src = (uint32_t *)pcm;
+
+        length /= 4;
+        for (i = 0; i < length; i++)
+        {
+            buf[2 * i] = (uint16_t)src[i];
+            buf[2 * i + 1] = 0;
+        }
+    }
+    break;
+    }
+
+    *send_len = length * 2 * 2;
+
+    return 0;
+}
+
+static void ki2s_send(ki2s_t *i2s, void *buf, size_t len)
+{
+    int track_num = i2s->config.channels;
+    int bps = i2s->config.samplebits;
+
+    if (((bps == 16) || (bps == 32)) && (track_num == 2))
+    {
+        i2s_send_16_32(i2s->devno, i2s->txdma, (const uint8_t *)buf, len, bps);
+    }
+    else
+    {
+        voice_to16(buf, len, track_num, bps, i2s->tx_buf, &len);
+        i2s_send_16_32(i2s->devno, i2s->txdma, (const uint8_t *)i2s->tx_buf, len, 16);
+    }
+}
+
+static void i2s_block_seten(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode, int en)
+{
+    irer_t u_irer;
+    iter_t u_iter;
+
+    if (rxtx_mode == I2S_RECEIVER)
+    {
+        u_irer.reg_data = readl(&i2s[device_num]->irer);
+        u_irer.irer.rxen = en;
+        writel(u_irer.reg_data, &i2s[device_num]->irer);
+        /* Receiver block disable */
+    }
+    else
+    {
+        u_iter.reg_data = readl(&i2s[device_num]->iter);
+        u_iter.iter.txen = en;
+        writel(u_iter.reg_data, &i2s[device_num]->iter);
+        /* Transmitter block disable */
+    }
+}
+
+static rt_err_t _i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_caps *caps)
+{
+    rt_err_t result = RT_EOK;
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+    RT_ASSERT(caps != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    switch (caps->main_type)
+    {
+    case AUDIO_TYPE_QUERY:
+        switch (caps->sub_type)
+        {
+        case AUDIO_TYPE_QUERY:
+            caps->udata.mask = i2s->caps;
+            break;
+        default:
+            result = -RT_ERROR;
+            break;
+        } // switch (caps->sub_type)
+        break;
+
+    case AUDIO_TYPE_MIXER:
+    {
+        switch (caps->sub_type)
+        {
+        case AUDIO_MIXER_QUERY:
+            return -1;
+
+        default:
+            return -1;
+        }
+    }
+    break;
+    case AUDIO_TYPE_INPUT:
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+            caps->udata.config.samplerate = i2s->rxconfig.samplerate;
+            caps->udata.config.channels = i2s->rxconfig.channels;
+            caps->udata.config.samplebits = i2s->rxconfig.samplebits;
+            break;
+        case AUDIO_DSP_SAMPLERATE:
+            caps->udata.config.samplerate = i2s->rxconfig.samplerate;
+            break;
+        case AUDIO_DSP_CHANNELS:
+            caps->udata.config.channels = i2s->rxconfig.channels;
+            break;
+        case AUDIO_DSP_SAMPLEBITS:
+            caps->udata.config.samplebits = i2s->rxconfig.samplebits;
+            break;
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+        break;
+    case AUDIO_TYPE_OUTPUT:
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+            caps->udata.config.samplerate = i2s->config.samplerate;
+            caps->udata.config.channels = i2s->config.channels;
+            caps->udata.config.samplebits = 16;
+            break;
+        case AUDIO_DSP_SAMPLERATE:
+            caps->udata.config.samplerate = i2s->config.samplerate;
+            break;
+        case AUDIO_DSP_CHANNELS:
+            caps->udata.config.channels = i2s->config.channels;
+            break;
+        case AUDIO_DSP_SAMPLEBITS:
+            caps->udata.config.samplebits = 16;
+            break;
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+        break;
+    }
+
+    return result;
+}
+
+static rt_err_t _i2s_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
+{
+    rt_err_t result = RT_EOK;
+    ki2s_t *i2s;
+    int stream = -1;
+
+    RT_ASSERT(audio != RT_NULL);
+    RT_ASSERT(caps != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    LOG_D("config mtype(%d) stype(%d)", caps->main_type, caps->sub_type);
+
+    switch (caps->main_type)
+    {
+    case AUDIO_TYPE_MIXER:
+        break;
+    case AUDIO_TYPE_INPUT:
+    {
+        stream = AUDIO_STREAM_RECORD;
+        if (!(i2s->caps & AUDIO_TYPE_INPUT))
+            return -RT_EIO;
+
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+        {
+            i2s->rxconfig.samplebits = caps->udata.config.samplebits;
+            i2s->rxconfig.samplerate = caps->udata.config.samplerate;
+            i2s_set_sample_rate(i2s->rxdevno, caps->udata.config.samplerate);
+        }
+        break;
+        case AUDIO_DSP_SAMPLERATE:
+        {
+            i2s->rxconfig.samplerate = caps->udata.config.samplerate;
+            i2s_set_sample_rate(i2s->rxdevno, caps->udata.config.samplerate);
+        }
+        break;
+        case AUDIO_DSP_CHANNELS:
+            break;
+        case AUDIO_DSP_SAMPLEBITS:
+            break;
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+    }
+    break;
+    case AUDIO_TYPE_OUTPUT:
+    {
+        rt_bool_t bNeedReset = RT_FALSE;
+
+        if (stream < 0)
+            stream = AUDIO_STREAM_REPLAY;
+
+        switch (caps->sub_type)
+        {
+        case AUDIO_DSP_PARAM:
+        {
+            i2s_tx_channel_config(i2s->devno, I2S_CHANNEL_1,
+                                  RESOLUTION_16_BIT, SCLK_CYCLES_32,
+                                  TRIGGER_LEVEL_4, RIGHT_JUSTIFYING_MODE);
+
+            i2s->config.channels = caps->udata.config.channels;
+            i2s->config.samplebits = caps->udata.config.samplebits;
+            i2s->config.samplerate = caps->udata.config.samplerate;
+            i2s_set_sample_rate(i2s->devno, caps->udata.config.samplerate);
+        }
+        break;
+        case AUDIO_DSP_SAMPLEBITS:
+        {
+            i2s->config.samplebits = caps->udata.config.samplebits;
+        }
+        break;
+        case AUDIO_DSP_CHANNELS:
+        {
+            i2s->config.channels = caps->udata.config.channels;
+        }
+        break;
+        case AUDIO_DSP_SAMPLERATE:
+        {
+            i2s->config.samplerate = caps->udata.config.samplerate;
+            i2s_set_sample_rate(i2s->devno, caps->udata.config.samplerate);
+        }
+        break;
+        default:
+            result = -RT_ERROR;
+            break;
+        }
+
+        if (bNeedReset)
+        {
+            return 0;
+        }
+    }
+    break;
+    default:
+        result = -RT_ERROR;
+        break;
+    }
+
+    return result;
+}
+
+static rt_err_t _i2s_init(struct rt_audio_device *audio)
+{
+    rt_err_t result = RT_EOK;
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    if (i2s->caps & AUDIO_TYPE_OUTPUT)
+    {
+        i2s_init(i2s->devno, I2S_TRANSMITTER, 0x0C);
+        i2s_tx_channel_config(i2s->devno, I2S_CHANNEL_1,
+                          RESOLUTION_16_BIT, SCLK_CYCLES_32,
+                          TRIGGER_LEVEL_4, RIGHT_JUSTIFYING_MODE);
+
+        i2s->config.channels = 2;
+        i2s->config.samplebits = 16;
+        i2s->config.samplerate = 8000;
+        i2s_set_sample_rate(i2s->devno, i2s->config.samplerate);
+    }
+
+    if (i2s->caps & AUDIO_TYPE_INPUT)
+    {
+        i2s->rxindex = 0;
+        i2s_init(i2s->rxdevno, I2S_RECEIVER, 0x3);
+        i2s_rx_channel_config(i2s->rxdevno, I2S_CHANNEL_0,
+                              RESOLUTION_16_BIT, SCLK_CYCLES_32,
+                              TRIGGER_LEVEL_4, STANDARD_MODE);
+
+        i2s->rxconfig.channels = 2;
+        i2s->rxconfig.samplebits = 16;
+        i2s->rxconfig.samplerate = 8000;
+        i2s_set_sample_rate(i2s->rxdevno, i2s->rxconfig.samplerate);
+    }
+
+    return result;
+}
+
+static rt_err_t _i2s_start(struct rt_audio_device *audio, int stream)
+{
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    switch (stream)
+    {
+    case AUDIO_STREAM_REPLAY:
+    {
+        if (!(i2s->caps & AUDIO_TYPE_OUTPUT))
+            return -RT_EIO;
+        if (i2s->txdma == DMAC_CHANNEL_MAX)
+        {
+            if (dmalock_sync_take(&i2s->txdma, 2000))
+            {
+                LOG_E("Fail to take DMA channel");
+                return -RT_EIO;
+            }
+        }
+        dmac_irq_register(i2s->txdma, dmacb, i2s, 1);
+        i2s_block_seten(i2s->devno, I2S_TRANSMITTER, 1);
+        ki2s_send(i2s, i2s->tx_fifo, 1024);
+
+        LOG_I("Start replay.[%X]", i2s);
+    }
+    break;
+    case AUDIO_STREAM_RECORD:
+    {
+        if (!(i2s->caps & AUDIO_TYPE_INPUT))
+            return -RT_EIO;
+        if (i2s->rxdma == DMAC_CHANNEL_MAX)
+        {
+            if (dmalock_sync_take(&i2s->rxdma, 2000))
+            {
+                LOG_E("Fail to take DMA channel");
+                return -RT_EIO;
+            }
+        }
+        dmac_set_irq(i2s->rxdma, rx_dmacb, i2s, 4);
+        i2s_block_seten(i2s->rxdevno, I2S_RECEIVER, 1);
+        i2s_receive_data_dma(i2s->rxdevno, (void*)i2s->rx_buf, KI2S_RX_BLKSZ, i2s->rxdma);
+
+        LOG_I("Start record.");
+    }
+    break;
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t _i2s_transmit(struct rt_audio_device *audio, const void *writeBuf, void *readBuf, rt_size_t size)
+{
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    ki2s_send(i2s, (void *)writeBuf, size);
+
+    return size;
+}
+
+static rt_err_t _i2s_stop(struct rt_audio_device *audio, int stream)
+{
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    switch (stream)
+    {
+    case AUDIO_STREAM_REPLAY:
+    {
+        if (!(i2s->caps & AUDIO_TYPE_OUTPUT))
+            return -RT_EIO;
+
+        i2s_block_seten(i2s->devno, I2S_TRANSMITTER, 0);
+
+        if (i2s->txdma != DMAC_CHANNEL_MAX)
+        {
+            dmalock_release(i2s->txdma);
+            i2s->txdma = DMAC_CHANNEL_MAX;
+        }
+        LOG_I("Stop replay.");
+    }
+    break;
+    case AUDIO_STREAM_RECORD:
+    {
+        if (!(i2s->caps & AUDIO_TYPE_INPUT))
+            return -RT_EIO;
+
+        i2s_block_seten(i2s->rxdevno, I2S_RECEIVER, 0);
+
+        if (i2s->rxdma != DMAC_CHANNEL_MAX)
+        {
+            dmalock_release(i2s->rxdma);
+            i2s->rxdma = DMAC_CHANNEL_MAX;
+        }
+        LOG_I("Stop record.");
+    }
+    break;
+    default:
+        return -RT_EINVAL;
+    }
+
+    return RT_EOK;
+}
+
+static void _i2s_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
+{
+    ki2s_t *i2s;
+
+    RT_ASSERT(audio != RT_NULL);
+    RT_ASSERT(info != RT_NULL);
+
+    i2s = (ki2s_t *)audio;
+
+    info->buffer = i2s->tx_fifo;
+    info->block_count = 2;
+    info->total_size = KI2S_TX_BLKSZ * info->block_count;
+    info->block_size = KI2S_TX_BLKSZ;
+}
+
+static const struct rt_audio_ops _ops =
+{
+    .getcaps = _i2s_getcaps,
+    .configure = _i2s_configure,
+
+    .init = _i2s_init,
+    .start = _i2s_start,
+    .stop = _i2s_stop,
+    .transmit = _i2s_transmit,
+    .buffer_info = _i2s_buffer_info
+};
+
+#ifdef BSP_USING_I2S0
+static ki2s_t _i2s0 =
+{
+    .name = "sound0",
+    .devno = I2S_DEVICE_0,
+    .txdma = DMAC_CHANNEL_MAX,
+    .caps = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER,
+};
+#endif
+
+#ifdef BSP_USING_I2S1
+static ki2s_t _i2s1 =
+{
+    .name = "sound1",
+    .rxdevno = I2S_DEVICE_1,
+    .rxdma = DMAC_CHANNEL_MAX,
+    .caps = AUDIO_TYPE_INPUT | AUDIO_TYPE_MIXER,
+};
+#endif
+
+#ifdef BSP_USING_I2S2
+static ki2s_t _i2s2 =
+{
+    .name = "sound2",
+    .devno = I2S_DEVICE_2,
+    .txdma = DMAC_CHANNEL_MAX,
+    .caps = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_MIXER,
+};
+#endif
+
+static int ki2s_meminit(ki2s_t *i2s)
+{
+    size_t len = 0;
+    uint8_t *ptr;
+
+    if (i2s->caps & AUDIO_TYPE_OUTPUT)
+        len += ((KI2S_TX_BLKSZ * 2) + (KI2S_TX_BLKSZ * sizeof(uint32_t) * 2));
+    if (i2s->caps & AUDIO_TYPE_INPUT)
+        len += (KI2S_RX_BLKSZ * sizeof(uint32_t) * 2);
+
+    ptr = (uint8_t*)rt_malloc(len);
+    if (!ptr)
+        return -1;
+
+    if (i2s->caps & AUDIO_TYPE_OUTPUT)
+    {
+        i2s->tx_fifo = ptr;
+        ptr += (KI2S_TX_BLKSZ * 2);
+        i2s->tx_buf = (uint16_t *)ptr;
+    }
+
+    if (i2s->caps & AUDIO_TYPE_INPUT)
+    {
+        i2s->rx_buf = (uint32_t*)ptr;
+    }
+
+    return 0;
+}
+
+int rt_hw_i2s_init(void)
+{
+    ki2s_t *i2s;
+
+#ifdef BSP_USING_I2S0
+    i2s = &_i2s0;
+
+    if (ki2s_meminit(i2s) != 0)
+    {
+        LOG_E("no mem");
+        return -1;
+    }
+
+    i2s->audio.ops = (struct rt_audio_ops *)&_ops;
+    rt_audio_register(&i2s->audio, i2s->name, RT_DEVICE_FLAG_WRONLY, i2s);
+#endif
+
+#ifdef BSP_USING_I2S1
+    i2s = &_i2s1;
+
+    if (ki2s_meminit(i2s) != 0)
+    {
+        LOG_E("no mem");
+        return -1;
+    }
+
+    i2s->audio.ops = (struct rt_audio_ops *)&_ops;
+    rt_audio_register(&i2s->audio, i2s->name, RT_DEVICE_FLAG_RDONLY, i2s);
+#endif
+
+#ifdef BSP_USING_I2S2
+    i2s = &_i2s2;
+
+    if (ki2s_meminit(i2s) != 0)
+    {
+        LOG_E("no mem");
+        return -1;
+    }
+
+    i2s->audio.ops = (struct rt_audio_ops *)&_ops;
+    rt_audio_register(&i2s->audio, i2s->name, RT_DEVICE_FLAG_RDWR, i2s);
+#endif
+
+    return 0;
+}
+INIT_DEVICE_EXPORT(rt_hw_i2s_init);

project_0/driver/drv_io_config.c

@@ -81,20 +81,62 @@ static struct io_config
     IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
     IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
 #endif
+
+#ifdef RT_USING_AUDIO
+#ifdef BSP_USING_I2S0
+    IOCONFIG(BSP_I2S0_OUT_D1_PIN, FUNC_I2S0_OUT_D1),
+    IOCONFIG(BSP_I2S0_WS_PIN, FUNC_I2S0_WS),
+    IOCONFIG(BSP_I2S0_SCLK_PIN, FUNC_I2S0_SCLK),
+#endif
+#ifdef BSP_USING_I2S1
+    IOCONFIG(BSP_I2S1_IN_D0_PIN, FUNC_I2S1_IN_D0),
+    IOCONFIG(BSP_I2S1_WS_PIN, FUNC_I2S1_WS),
+    IOCONFIG(BSP_I2S1_SCLK_PIN, FUNC_I2S1_SCLK),
+#endif
+#endif
+
+#ifdef BSP_USING_I2C0
+    IOCONFIG(BSP_I2C0_SCL_PIN, FUNC_I2C0_SCLK),
+    IOCONFIG(BSP_I2C0_SDA_PIN, FUNC_I2C0_SDA),
+#endif
+#ifdef BSP_USING_I2C1
+    IOCONFIG(BSP_I2C1_SCL_PIN, FUNC_I2C1_SCLK),
+    IOCONFIG(BSP_I2C1_SDA_PIN, FUNC_I2C1_SDA),
+#endif
+#ifdef BSP_USING_I2C2
+    IOCONFIG(BSP_I2C2_SCL_PIN, FUNC_I2C2_SCLK),
+    IOCONFIG(BSP_I2C2_SDA_PIN, FUNC_I2C2_SDA),
+#endif
+
+#ifdef BSP_PWM_CHN0_ENABLE
+    IOCONFIG(BSP_PWM_CHN0_PIN, FUNC_TIMER2_TOGGLE1),
+#endif
+#ifdef BSP_PWM_CHN1_ENABLE
+    IOCONFIG(BSP_PWM_CHN1_PIN, FUNC_TIMER2_TOGGLE2),
+#endif
+#ifdef BSP_PWM_CHN2_ENABLE
+    IOCONFIG(BSP_PWM_CHN2_PIN, FUNC_TIMER2_TOGGLE3),
+#endif
+#ifdef BSP_PWM_CHN3_ENABLE
+    IOCONFIG(BSP_PWM_CHN3_PIN, FUNC_TIMER2_TOGGLE4),
+#endif
+
 };
 
+
+
 static int print_io_config()
 {
     int i;
     rt_kprintf("IO Configuration Table\n");
-    rt_kprintf("┌───────┬────────────────────────┐\n");
-    rt_kprintf("│Pin    │Function                │\n");
-    rt_kprintf("├───────┼────────────────────────┤\n");
+    rt_kprintf("鈹屸攢鈹�鈹�鈹�鈹�鈹�鈹�鈹攢鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹怽n");
+    rt_kprintf("鈹侾in    鈹侳unction                鈹俓n");
+    rt_kprintf("鈹溾攢鈹�鈹�鈹�鈹�鈹�鈹�鈹尖攢鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹n");
     for(i = 0; i < sizeof io_config / sizeof io_config[0]; i++)
     {
-        rt_kprintf("│%-2d     │%-24.24s│\n", io_config[i].io_num, io_config[i].func_name);
+        rt_kprintf("鈹�%-2d     鈹�%-24.24s鈹俓n", io_config[i].io_num, io_config[i].func_name);
     }
-    rt_kprintf("└───────┴────────────────────────┘\n");
+    rt_kprintf("鈹斺攢鈹�鈹�鈹�鈹�鈹�鈹�鈹粹攢鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹�鈹榎n");
     return 0;
 }
 MSH_CMD_EXPORT_ALIAS(print_io_config, io, print io config);
@@ -104,16 +146,35 @@ int io_config_init(void)
     int count = sizeof(io_config) / sizeof(io_config[0]);
     int i;
 
+/* IO GroupA Power Supply Setting */
+#if defined(BSP_GROUPA_POWER_SUPPLY_3V3)
+    sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V33);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V33);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V33);
+#else
     sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
     sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
     sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
-#ifdef BSP_USING_UART2
-    // for IO-27/28
-    sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
 #endif
-#if  defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
-    // for IO-20~23
+
+/* IO GroupB Power Supply Setting */
+#if defined(BSP_GROUPB_POWER_SUPPLY_3V3)
     sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V33);
+#else
+    sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V18);
+#endif
+
+/* IO GroupC Power Supply Setting */
+#if defined(BSP_GROUPC_POWER_SUPPLY_3V3)
+    sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V33);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V33);
+#else
+    sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
+    sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
 #endif
 
     for(i = 0; i < count; i++)

project_0/driver/drv_pwm.c

@@ -0,0 +1,87 @@
+#include    <rtthread.h>
+#include    <rtdevice.h>
+#include    "pwm.h"
+
+#ifdef      BSP_USING_PWM
+
+typedef struct {
+    struct rt_device_pwm pwm;
+    pwm_device_number_t devno;
+    uint32_t chnmask;
+} kpwm_t;
+
+static rt_err_t _pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
+{
+    struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration*)arg;
+    kpwm_t *kpwm = (kpwm_t*)device;
+
+    if (!(kpwm->chnmask & (1<<cfg->channel))) {
+        rt_kprintf("[err] mchl:%x cchl:%x\n", kpwm->chnmask, cfg->channel);
+        return -RT_EIO;
+    }
+
+    switch (cmd)
+    {
+    case PWM_CMD_ENABLE:
+        pwm_set_enable(kpwm->devno, cfg->channel, 1);
+        break;
+    case PWM_CMD_DISABLE:
+        pwm_set_enable(kpwm->devno, cfg->channel, 0);
+        break;
+    case PWM_CMD_SET:
+        {
+        double freq, duty = 0;
+
+        freq = 1000000000/(double)cfg->period;
+        if (cfg->pulse)
+        {
+            duty = (double)100/((double)cfg->period/cfg->pulse);
+            duty = duty/100;
+        }
+
+        pwm_set_frequency(kpwm->devno, cfg->channel, freq, duty);
+        }
+        break;
+    case PWM_CMD_GET:
+        break;
+    default:
+        return -RT_EINVAL;
+    }
+    return RT_EOK;
+}
+
+static const struct rt_pwm_ops _ops =
+{
+    .control = _pwm_control,
+};
+
+int rt_hw_pwm_init(void)
+{
+    static kpwm_t _kpwm;
+    kpwm_t *kpwm;
+
+    kpwm = &_kpwm;
+    kpwm->devno = PWM_DEVICE_2;
+    kpwm->chnmask = 0;
+
+#ifdef BSP_PWM_CHN0_ENABLE
+    kpwm->chnmask |= (1<<PWM_CHANNEL_0);
+#endif
+#ifdef BSP_PWM_CHN1_ENABLE
+    kpwm->chnmask |= (1<<PWM_CHANNEL_1);
+#endif
+#ifdef BSP_PWM_CHN2_ENABLE
+    kpwm->chnmask |= (1<<PWM_CHANNEL_2);
+#endif
+#ifdef BSP_PWM_CHN3_ENABLE
+    kpwm->chnmask |= (1<<PWM_CHANNEL_3);
+#endif
+    
+    pwm_init(kpwm->devno);
+    rt_device_pwm_register(&kpwm->pwm, "pwm", &_ops, kpwm);
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_pwm_init);
+
+#endif
+/*pwm_output freq_max= 1mhz*/

project_0/driver/drv_rtc.c

@@ -0,0 +1,94 @@
+/* Copyright Canaan Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include    <rtthread.h>
+#include    <rtdevice.h>
+#include    "rtc.h"
+
+#ifdef      BSP_USING_ONCHIP_RTC
+#define     HW_RTC_TIME_INIT
+
+static struct rt_device rtc_dev;
+
+static rt_err_t rt_hw_rtc_control(rt_device_t dev, int cmd, void *args)
+{
+    time_t      *time;
+    struct tm   *time_new;
+    struct tm    time_s;
+
+    RT_ASSERT(dev != RT_NULL);
+
+    switch (cmd)
+    {
+    /* read time */
+    case RT_DEVICE_CTRL_RTC_GET_TIME:
+        time = (time_t *)args;
+
+        rtc_timer_get(&time_s.tm_year,
+                      &time_s.tm_mon,
+                      &time_s.tm_mday,
+                      &time_s.tm_hour,
+                      &time_s.tm_min,
+                      &time_s.tm_sec);
+
+        time_s.tm_year -= 1900;
+        time_s.tm_mon -= 1;
+        *time = mktime(&time_s);
+        break;
+
+    /* set time */
+    case RT_DEVICE_CTRL_RTC_SET_TIME:
+        time = (time_t *)args;
+        time_new = gmtime(time);
+
+        rtc_init();
+        rtc_timer_set(time_new->tm_year + 1900,
+                     time_new->tm_mon + 1,
+                     time_new->tm_mday,
+                     time_new->tm_hour,
+                     time_new->tm_min,
+                     time_new->tm_sec);
+        break;
+
+    default:
+        break;
+    }
+    return RT_EOK;
+}
+
+int rt_hw_rtc_init(void)
+{
+    #if defined(HW_RTC_TIME_INIT)
+    rtc_init();
+    rtc_timer_set(2021, 3, 15, 17, 40, 00);
+    #endif
+
+    /* register rtc device */
+    rtc_dev.type        = RT_Device_Class_RTC;
+    rtc_dev.init        = RT_NULL;
+    rtc_dev.open        = RT_NULL;
+    rtc_dev.close       = RT_NULL;
+    rtc_dev.read        = RT_NULL;
+    rtc_dev.write       = RT_NULL;
+    rtc_dev.control     = rt_hw_rtc_control;
+    rtc_dev.user_data   = RT_NULL;
+
+    rt_device_register(&rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR);
+
+    return RT_EOK;
+}
+INIT_DEVICE_EXPORT(rt_hw_rtc_init);
+
+#endif

project_0/driver/drv_wdt.c

@@ -0,0 +1,107 @@
+
+/* Copyright Canaan Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "wdt.h"
+
+#ifdef  BSP_USING_WDT
+
+static struct rt_watchdog_device wdt0;
+static struct rt_watchdog_device wdt1;
+
+static rt_err_t rt_wdt_init(struct rt_watchdog_device * wdt){
+    return (RT_EOK);
+}
+
+static rt_err_t wdt_control(struct rt_watchdog_device * wdt, int cmd, void * arg){
+    rt_uint32_t msecond;
+    volatile wdt_t * hw_wdt;
+    wdt_device_number_t num = (wdt_device_number_t)wdt->parent.user_data;
+
+    if(num >=WDT_DEVICE_MAX){
+        rt_kprintf("wdt number (%d) error\n", num);
+    }
+
+    switch(cmd){
+    case RT_DEVICE_CTRL_WDT_KEEPALIVE:
+        wdt_feed(num);
+        break;
+
+    case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
+        msecond = (*((rt_uint32_t *)arg)) * 1000;
+        rt_kprintf("wdt timeout (%d)\n",msecond);
+
+        if (msecond != 0){
+            wdt_init(num, msecond, RT_NULL, RT_NULL);
+            wdt_stop(num);
+        }
+        else{
+            rt_kprintf("wdt timeout value error\n");
+        }
+        break;
+
+    #if 0
+        /* get watchdog timeout */
+    case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
+        break;
+    #endif
+        /* watchdog start */
+    case RT_DEVICE_CTRL_WDT_START:
+        hw_wdt = (num == WDT_DEVICE_0) ? (volatile wdt_t *)WDT0_BASE_ADDR : (volatile wdt_t *)WDT1_BASE_ADDR;
+        hw_wdt->crr = WDT_CRR_MASK;
+        hw_wdt->cr |= WDT_CR_ENABLE;
+        break;
+        /* watchdog stop */
+    case RT_DEVICE_CTRL_WDT_STOP:
+        wdt_stop(num);
+        break;
+    default:
+        rt_kprintf("This command is not supported.");
+        return -RT_ERROR;
+    }
+    return RT_EOK;
+}
+
+int rt_hw_wdt_init(void){
+    struct rt_watchdog_ops *ops = rt_malloc(sizeof(struct rt_watchdog_ops));
+    if(ops == RT_NULL){
+        rt_kprintf("wdt0 device rt_malloc failed\n");
+        return -RT_ERROR;
+    }
+
+    ops->init = rt_wdt_init;
+    ops->control = wdt_control;
+
+    wdt0.ops = ops;
+
+    if (rt_hw_watchdog_register(&wdt0, "wdt0", RT_DEVICE_FLAG_DEACTIVATE, (void *) 0) != RT_EOK){
+        rt_kprintf("wdt0 device register failed\n");
+        return -RT_ERROR;
+    }
+
+    wdt1.ops = ops;
+
+    if (rt_hw_watchdog_register(&wdt1, "wdt1", RT_DEVICE_FLAG_DEACTIVATE, (void *) 1) != RT_EOK){
+        rt_kprintf("wdt1 device register failed\n");
+        return -RT_ERROR;
+    }
+    rt_kprintf(" wdt0/1 device register success");
+    return RT_EOK;
+}
+
+INIT_BOARD_EXPORT(rt_hw_wdt_init);
+#endif

project_0/applications/board_config/lcd.h → project_0/driver/lcd.h

@@ -2,7 +2,7 @@
 #define _LCD_H_
 
 #include <stdint.h>
-#include <board_config.h>
+#include <project_0/driver/lcd_bare/board_config.h>
 #ifndef BSP_USING_LCD
 /* clang-format off */
 #define LCD_X_MAX   (240)

project_0/applications/board_config/board_config.c → project_0/driver/lcd_bare/board_config.c

@@ -1,4 +1,4 @@
-#include <board_config.h>
+#include <project_0/driver/lcd_bare/board_config.h>
 
 void io_mux_init(void) {
 #if BOARD_LICHEEDAN || YB_DKA01

project_0/applications/board_config/ili9341.h → project_0/driver/lcd_bare/ili9341.h

@@ -15,7 +15,7 @@
 
 #ifndef _ILI9341_H_
 #define _ILI9341_H_
-#include <board_config.h>
+#include <project_0/driver/lcd_bare/board_config.h>
 #include <stdint.h>
 #if LCD_USING_ILI9341
 /* clang-format off */

project_0/applications/board_config/lcd_ili9341.c → project_0/driver/lcd_bare/lcd_ili9341.c

@@ -14,7 +14,7 @@
  */
 #include <string.h>
 #include <unistd.h>
-#include "lcd.h"
+#include "..\lcd.h"
 #if LCD_USING_ILI9341
 #include "ili9341.h"
 #include "font.h"

project_0/extmods/Kconfig

@@ -0,0 +1,31 @@
+menu "mpy-extmods"
+config PRJ_USING_EXTMODS_MISC
+    bool "Enable MPY extmods"
+    select PKG_USING_MICROPYTHON
+    select MICROPYTHON_USING_USEREXTMODS
+    default y
+
+    if PRJ_USING_EXTMODS_MISC
+        menuconfig EXTMODS_MISC_USING_K210
+            bool "Enable K210 extmods"
+            default y
+
+            if EXTMODS_MISC_USING_K210
+                config EXTMODS_K210_LCDCTL
+                    bool "Enable LCD Control"
+                    default y
+                config EXTMODS_K210_DVP
+                    bool "Enable DVP Camera"
+                    select BSP_USING_CAMERA
+                    default y
+                config EXTMODS_K210_I2S
+                    bool "Enable I2S module"
+                    default y
+            endif
+
+        config PRJ_USING_RT_AK_EXMODS
+            bool "Enable RT-AK MPY module"
+            default y	
+		
+    endif
+endmenu

project_0/extmods/k210/machine_i2s.c

@@ -0,0 +1,202 @@
+
+#ifdef EXTMODS_K210_I2S
+#include "i2s.h"
+#include "dmac.h"
+#include "rtdevice.h"
+#include <stdio.h>
+#include <string.h>
+
+#include "py/binary.h"
+#include "py/objarray.h"
+#include "py/qstr.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+#include "py/mphal.h"
+#define RX_FRAME_LEN 512
+
+typedef struct
+{
+    mp_obj_base_t base;
+    int devno;
+    int workmode;
+    int txdma;
+    int rxdma;
+    int bps;
+    int track_num;
+    int sample_rate;
+    int rxtx_mode;
+    uint32_t *rxbuf;
+    rt_device_t dev;
+} k210_i2s_obj_t;
+
+const mp_obj_type_t k210_i2s_type;
+
+STATIC void k210_i2s_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)self_in;
+
+    mp_printf(print, "I2S: device(%d)\n", i2s->devno);
+    mp_printf(print, "   align mode: %d\n", i2s->workmode);
+    mp_printf(print, "   sample rate: %d\n", i2s->sample_rate);
+    mp_printf(print, "   track num: %d\n", i2s->track_num);
+    mp_printf(print, "   bits per sample: %d\n", i2s->bps);
+}
+
+STATIC mp_obj_t k210_i2s_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args)
+{
+    char name[8];
+
+    mp_arg_check_num(n_args, n_kw, 2, MP_OBJ_FUN_ARGS_MAX, true);
+
+    mp_int_t devno = mp_obj_get_int(args[0]);
+    if (devno >= I2S_DEVICE_MAX)
+    {
+        mp_raise_ValueError("I2S:invalid device");
+    }
+    rt_sprintf(name, "sound%d", devno);
+
+    mp_int_t rxtxmode = mp_obj_get_int(args[1]);
+    if ((rxtxmode != I2S_TRANSMITTER) && (rxtxmode != I2S_RECEIVER))
+    {
+        mp_raise_ValueError("I2S:invalid rxtx_mode");
+    }
+
+    k210_i2s_obj_t *self = m_new_obj(k210_i2s_obj_t);
+
+    self->base.type = &k210_i2s_type;
+    self->devno = devno;
+    self->rxtx_mode = rxtxmode;
+    self->dev = rt_device_find(name);
+    if (!self->dev)
+    {
+        mp_raise_ValueError("I2S:dev not found");
+    }
+
+    return MP_OBJ_FROM_PTR(self);
+}
+
+STATIC mp_obj_t k210_i2s_init(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)pos_args[0];
+
+    if ((i2s->rxtx_mode == I2S_TRANSMITTER) && (rt_device_open(i2s->dev, RT_DEVICE_OFLAG_WRONLY) != 0))
+    {
+        mp_raise_OSError(-1);
+    }
+
+    if ((i2s->rxtx_mode == I2S_RECEIVER) && (rt_device_open(i2s->dev, RT_DEVICE_OFLAG_RDONLY) != 0))
+    {
+        mp_raise_OSError(-1);
+    }
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(k210_i2s_init_obj, 0, k210_i2s_init);
+
+STATIC mp_obj_t k210_i2s_deinit(mp_obj_t self_in)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)self_in;
+
+    rt_device_close(i2s->dev);
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(k210_i2s_deinit_obj, k210_i2s_deinit);
+
+STATIC mp_obj_t k210_i2s_set_param(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)pos_args[0];
+    struct rt_audio_caps caps;
+
+    enum
+    {
+        ARG_sample_rate,
+        ARG_bps,
+        ARG_track_num,
+    };
+    static const mp_arg_t allowed_args[] =
+        {
+            {MP_QSTR_sample_rate, MP_ARG_INT, {.u_int = 8000}},
+            {MP_QSTR_bps, MP_ARG_INT, {.u_int = -1}},
+            {MP_QSTR_track_num, MP_ARG_INT, {.u_int = -1}},
+        };
+    mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
+    mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
+
+    if (i2s->rxtx_mode == I2S_TRANSMITTER)
+        caps.main_type = AUDIO_TYPE_OUTPUT;
+    else
+        caps.main_type = AUDIO_TYPE_INPUT;
+    caps.sub_type = AUDIO_DSP_PARAM;
+
+    rt_device_control(i2s->dev, AUDIO_CTL_GETCAPS, &caps);
+
+    caps.udata.config.samplerate = args[ARG_sample_rate].u_int;
+    if (args[ARG_bps].u_int != -1)
+        caps.udata.config.samplebits = args[ARG_bps].u_int;
+    if (args[ARG_track_num].u_int != -1)
+        caps.udata.config.channels = args[ARG_track_num].u_int;
+
+    rt_device_control(i2s->dev, AUDIO_CTL_CONFIGURE, &caps);
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(k210_i2s_set_param_obj, 1, k210_i2s_set_param);
+
+STATIC mp_obj_t k210_i2s_play(mp_obj_t self_in, mp_obj_t pcm)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)self_in;
+
+    mp_buffer_info_t bufinfo;
+
+    mp_get_buffer_raise(pcm, &bufinfo, MP_BUFFER_READ);
+
+    rt_device_write(i2s->dev, 0, bufinfo.buf, bufinfo.len);
+
+    return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(k210_i2s_play_obj, k210_i2s_play);
+
+STATIC mp_obj_t k210_i2s_record(mp_obj_t self_in)
+{
+    k210_i2s_obj_t *i2s = (k210_i2s_obj_t *)self_in;
+
+    int16_t *buf = m_new(int16_t, RX_FRAME_LEN);
+    mp_obj_array_t *out = m_new_obj(mp_obj_array_t);
+
+    out->base.type = &mp_type_bytearray;
+    out->typecode = BYTEARRAY_TYPECODE;
+    out->free = 0;
+    out->len = RX_FRAME_LEN * sizeof(uint16_t);
+    out->items = (void*)buf;
+
+    rt_device_read(i2s->dev, 0, buf, out->len);
+
+    return out;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(k210_i2s_record_obj, k210_i2s_record);
+
+STATIC const mp_rom_map_elem_t k210_i2s_locals_dict_table[] = {
+    {MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&k210_i2s_deinit_obj)},
+    {MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&k210_i2s_init_obj)},
+    {MP_ROM_QSTR(MP_QSTR_set_param), MP_ROM_PTR(&k210_i2s_set_param_obj)},
+    {MP_ROM_QSTR(MP_QSTR_play), MP_ROM_PTR(&k210_i2s_play_obj)},
+    {MP_ROM_QSTR(MP_QSTR_record), MP_ROM_PTR(&k210_i2s_record_obj)},
+    {MP_ROM_QSTR(MP_QSTR_TRANSMITTER), MP_ROM_INT(I2S_TRANSMITTER)},
+    {MP_ROM_QSTR(MP_QSTR_RECEIVER), MP_ROM_INT(I2S_RECEIVER)},
+#if 0
+    {MP_ROM_QSTR(MP_QSTR_STANDARD_MODE), MP_ROM_INT(STANDARD_MODE)},
+    {MP_ROM_QSTR(MP_QSTR_RIGHT_JUSTIFYING_MODE), MP_ROM_INT(RIGHT_JUSTIFYING_MODE)},
+    {MP_ROM_QSTR(MP_QSTR_LEFT_JUSTIFYING_MODE), MP_ROM_INT(LEFT_JUSTIFYING_MODE)},
+#endif
+};
+STATIC MP_DEFINE_CONST_DICT(k210_i2s_dict, k210_i2s_locals_dict_table);
+
+const mp_obj_type_t k210_i2s_type = {
+    {&mp_type_type},
+    .name = MP_QSTR_I2S,
+    .print = k210_i2s_print,
+    .make_new = k210_i2s_make_new,
+    .locals_dict = (mp_obj_dict_t *)&k210_i2s_dict,
+};
+#endif