drv_sci.c 26 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-09-24 Vandoul first version
  9. * 2023-09-27 Vandoul add sci uart
  10. */
  11. #include "drv_sci.h"
  12. #ifdef BSP_USING_SCI
  13. //#define DRV_DEBUG
  14. #define DBG_TAG "drv.sci"
  15. #ifdef DRV_DEBUG
  16. #define DBG_LVL DBG_LOG
  17. #else
  18. #define DBG_LVL DBG_INFO
  19. #endif /* DRV_DEBUG */
  20. #include <rtdbg.h>
  21. #ifdef R_SCI_B_SPI_H
  22. #define R_SCI_SPI_Write R_SCI_B_SPI_Write
  23. #define R_SCI_SPI_Read R_SCI_B_SPI_Read
  24. #define R_SCI_SPI_WriteRead R_SCI_B_SPI_WriteRead
  25. #define R_SCI_SPI_Open R_SCI_B_SPI_Open
  26. #define R_SCI_SPI_Close R_SCI_B_SPI_Close
  27. #define R_SCI_SPI_CallbackSet R_SCI_B_SPI_CallbackSet
  28. #endif
  29. #ifdef R_SCI_B_UART_H
  30. #define R_SCI_UART_Read R_SCI_B_UART_Read
  31. #define R_SCI_UART_Open R_SCI_B_UART_Open
  32. #define R_SCI_UART_Close R_SCI_B_UART_Close
  33. #define R_SCI_UART_CallbackSet R_SCI_B_UART_CallbackSet
  34. #endif
  35. enum
  36. {
  37. #ifdef BSP_USING_SCI0
  38. RA_SCI_INDEX0,
  39. #endif
  40. #ifdef BSP_USING_SCI1
  41. RA_SCI_INDEX1,
  42. #endif
  43. #ifdef BSP_USING_SCI2
  44. RA_SCI_INDEX2,
  45. #endif
  46. #ifdef BSP_USING_SCI3
  47. RA_SCI_INDEX3,
  48. #endif
  49. #ifdef BSP_USING_SCI4
  50. RA_SCI_INDEX4,
  51. #endif
  52. #ifdef BSP_USING_SCI5
  53. RA_SCI_INDEX5,
  54. #endif
  55. #ifdef BSP_USING_SCI6
  56. RA_SCI_INDEX6,
  57. #endif
  58. #ifdef BSP_USING_SCI7
  59. RA_SCI_INDEX7,
  60. #endif
  61. #ifdef BSP_USING_SCI8
  62. RA_SCI_INDEX8,
  63. #endif
  64. #ifdef BSP_USING_SCI9
  65. RA_SCI_INDEX9,
  66. #endif
  67. RA_SCI_INDEX_MAX,
  68. };
  69. struct ra_sci_param
  70. {
  71. const char bus_name[RT_NAME_MAX];
  72. const void *sci_ctrl;
  73. const void *sci_cfg;
  74. const void *ops;
  75. };
  76. #ifdef RT_USING_I2C
  77. rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
  78. #endif
  79. #ifdef RT_USING_SPI
  80. rt_weak const struct rt_spi_ops sci_ops_spi;
  81. #endif
  82. #ifdef RT_USING_SERIAL
  83. rt_weak const struct rt_uart_ops sci_ops_uart;
  84. #endif
  85. struct ra_sci_object
  86. {
  87. union
  88. {
  89. #ifdef RT_USING_SPI
  90. struct
  91. {
  92. struct rt_spi_bus sbus;
  93. struct rt_spi_configuration *spi_cfg;
  94. };
  95. #endif
  96. #ifdef RT_USING_I2C
  97. struct
  98. {
  99. struct rt_i2c_bus_device ibus;
  100. };
  101. #endif
  102. #ifdef RT_USING_SERIAL
  103. struct
  104. {
  105. struct rt_serial_device ubus;
  106. };
  107. #endif
  108. };
  109. const struct ra_sci_param *param;
  110. struct rt_event event;
  111. };
  112. #define _TO_STR(_a) #_a
  113. #define CONCAT3STR(_a,_b,_c) _TO_STR(_a##_b##_c)
  114. #define RA_SCI_EVENT_ABORTED 1
  115. #define RA_SCI_EVENT_RX_COMPLETE 2
  116. #define RA_SCI_EVENT_TX_COMPLETE 4
  117. #define RA_SCI_EVENT_ERROR 8
  118. #define RA_SCI_EVENT_ALL 15
  119. /**
  120. * Bus name format: sci[x][y], where x=0~9 and y=s/i/u
  121. * Example:
  122. * - sci_spi: sci0s
  123. * - sci_i2c: sci0i
  124. * - sci_uart: sci0u
  125. */
  126. #define RA_SCI_HANDLE_ITEM(idx,type,id) {.bus_name=CONCAT3STR(sci,idx,id),.sci_ctrl=&g_sci##idx##_ctrl,.sci_cfg=&g_sci##idx##_cfg,.ops=&sci_ops_##type}
  127. const static struct ra_sci_param sci_param[] =
  128. {
  129. #ifdef BSP_USING_SCI0
  130. #ifdef BSP_USING_SCI0_SPI
  131. RA_SCI_HANDLE_ITEM(0, spi, s),
  132. #elif defined(BSP_USING_SCI0_I2C)
  133. RA_SCI_HANDLE_ITEM(0, i2c, i),
  134. #elif defined(BSP_USING_SCI0_UART)
  135. RA_SCI_HANDLE_ITEM(0, uart, u),
  136. #endif
  137. #endif
  138. #ifdef BSP_USING_SCI1
  139. #ifdef BSP_USING_SCI1_SPI
  140. RA_SCI_HANDLE_ITEM(1, spi, s),
  141. #elif defined(BSP_USING_SCI1_I2C)
  142. RA_SCI_HANDLE_ITEM(1, i2c, i),
  143. #elif defined(BSP_USING_SCI1_UART)
  144. RA_SCI_HANDLE_ITEM(1, uart, u),
  145. #endif
  146. #endif
  147. #ifdef BSP_USING_SCI2
  148. #ifdef BSP_USING_SCI2_SPI
  149. RA_SCI_HANDLE_ITEM(2, spi, s),
  150. #elif defined(BSP_USING_SCI2_I2C)
  151. RA_SCI_HANDLE_ITEM(2, i2c, i),
  152. #elif defined(BSP_USING_SCI2_UART)
  153. RA_SCI_HANDLE_ITEM(2, uart, u),
  154. #endif
  155. #endif
  156. #ifdef BSP_USING_SCI3
  157. #ifdef BSP_USING_SCI3_SPI
  158. RA_SCI_HANDLE_ITEM(3, spi, s),
  159. #elif defined(BSP_USING_SCI3_I2C)
  160. RA_SCI_HANDLE_ITEM(3, i2c, i),
  161. #elif defined(BSP_USING_SCI3_UART)
  162. RA_SCI_HANDLE_ITEM(3, uart, u),
  163. #endif
  164. #endif
  165. #ifdef BSP_USING_SCI4
  166. #ifdef BSP_USING_SCI4_SPI
  167. RA_SCI_HANDLE_ITEM(4, spi, s),
  168. #elif defined(BSP_USING_SCI4_I2C)
  169. RA_SCI_HANDLE_ITEM(4, i2c, i),
  170. #elif defined(BSP_USING_SCI4_UART)
  171. RA_SCI_HANDLE_ITEM(4, uart, u),
  172. #endif
  173. #endif
  174. #ifdef BSP_USING_SCI5
  175. #ifdef BSP_USING_SCI5_SPI
  176. RA_SCI_HANDLE_ITEM(5, spi, s),
  177. #elif defined(BSP_USING_SCI5_I2C)
  178. RA_SCI_HANDLE_ITEM(5, i2c, i),
  179. #elif defined(BSP_USING_SCI5_UART)
  180. RA_SCI_HANDLE_ITEM(5, uart, u),
  181. #endif
  182. #endif
  183. #ifdef BSP_USING_SCI6
  184. #ifdef BSP_USING_SCI6_SPI
  185. RA_SCI_HANDLE_ITEM(6, spi, s),
  186. #elif defined(BSP_USING_SCI6_I2C)
  187. RA_SCI_HANDLE_ITEM(6, i2c, i),
  188. #elif defined(BSP_USING_SCI6_UART)
  189. RA_SCI_HANDLE_ITEM(6, uart, u),
  190. #endif
  191. #endif
  192. #ifdef BSP_USING_SCI7
  193. #ifdef BSP_USING_SCI7_SPI
  194. RA_SCI_HANDLE_ITEM(7, spi, s),
  195. #elif defined(BSP_USING_SCI7_I2C)
  196. RA_SCI_HANDLE_ITEM(7, i2c, i),
  197. #elif defined(BSP_USING_SCI7_UART)
  198. RA_SCI_HANDLE_ITEM(7, uart, u),
  199. #endif
  200. #endif
  201. #ifdef BSP_USING_SCI8
  202. #ifdef BSP_USING_SCI8_SPI
  203. RA_SCI_HANDLE_ITEM(8, spi, s),
  204. #elif defined(BSP_USING_SCI8_I2C)
  205. RA_SCI_HANDLE_ITEM(8, i2c, i),
  206. #elif defined(BSP_USING_SCI8_UART)
  207. RA_SCI_HANDLE_ITEM(8, uart, u),
  208. #endif
  209. #endif
  210. #ifdef BSP_USING_SCI9
  211. #ifdef BSP_USING_SCI9_SPI
  212. RA_SCI_HANDLE_ITEM(9, spi, s),
  213. #elif defined(BSP_USING_SCI9_I2C)
  214. RA_SCI_HANDLE_ITEM(9, i2c, i),
  215. #elif defined(BSP_USING_SCI9_UART)
  216. RA_SCI_HANDLE_ITEM(9, uart, u),
  217. #endif
  218. #endif
  219. };
  220. static struct ra_sci_object sci_obj[RA_SCI_INDEX_MAX];
  221. rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
  222. {
  223. rt_uint32_t event = 0;
  224. if (RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
  225. {
  226. return -RT_ETIMEOUT;
  227. }
  228. if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
  229. {
  230. return RT_EOK;
  231. }
  232. return -RT_ERROR;
  233. }
  234. /**
  235. * @brief SCI UART
  236. * @defgroup SCI_UART
  237. * @{
  238. */
  239. #ifdef BSP_USING_SCIn_UART
  240. const static int uart_buff_size[][2] =
  241. {
  242. #ifdef BSP_USING_SCI0_UART
  243. {BSP_SCI0_UART_RX_BUFSIZE, BSP_SCI0_UART_TX_BUFSIZE},
  244. #endif
  245. #ifdef BSP_USING_SCI1_UART
  246. {BSP_SCI1_UART_RX_BUFSIZE, BSP_SCI1_UART_TX_BUFSIZE},
  247. #endif
  248. #ifdef BSP_USING_SCI2_UART
  249. {BSP_SCI2_UART_RX_BUFSIZE, BSP_SCI2_UART_TX_BUFSIZE},
  250. #endif
  251. #ifdef BSP_USING_SCI3_UART
  252. {BSP_SCI3_UART_RX_BUFSIZE, BSP_SCI3_UART_TX_BUFSIZE},
  253. #endif
  254. #ifdef BSP_USING_SCI4_UART
  255. {BSP_SCI4_UART_RX_BUFSIZE, BSP_SCI4_UART_TX_BUFSIZE},
  256. #endif
  257. #ifdef BSP_USING_SCI5_UART
  258. {BSP_SCI5_UART_RX_BUFSIZE, BSP_SCI5_UART_TX_BUFSIZE},
  259. #endif
  260. #ifdef BSP_USING_SCI6_UART
  261. {BSP_SCI6_UART_RX_BUFSIZE, BSP_SCI6_UART_TX_BUFSIZE},
  262. #endif
  263. #ifdef BSP_USING_SCI7_UART
  264. {BSP_SCI7_UART_RX_BUFSIZE, BSP_SCI7_UART_TX_BUFSIZE},
  265. #endif
  266. #ifdef BSP_USING_SCI8_UART
  267. {BSP_SCI8_UART_RX_BUFSIZE, BSP_SCI8_UART_TX_BUFSIZE},
  268. #endif
  269. #ifdef BSP_USING_SCI9_UART
  270. {BSP_SCI9_UART_RX_BUFSIZE, BSP_SCI9_UART_TX_BUFSIZE},
  271. #endif
  272. {0, 0},
  273. };
  274. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  275. {
  276. rt_interrupt_enter();
  277. if (NULL != p_args)
  278. {
  279. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  280. RT_ASSERT(obj != RT_NULL);
  281. if (UART_EVENT_RX_CHAR == p_args->event)
  282. {
  283. struct rt_serial_device *serial = &obj->ubus;
  284. struct rt_serial_rx_fifo *rx_fifo;
  285. rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
  286. RT_ASSERT(rx_fifo != RT_NULL);
  287. rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data);
  288. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  289. }
  290. }
  291. rt_interrupt_leave();
  292. }
  293. static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  294. {
  295. struct ra_sci_object *obj;
  296. const struct ra_sci_param *param;
  297. RT_ASSERT(serial != RT_NULL);
  298. RT_ASSERT(cfg != RT_NULL);
  299. fsp_err_t err = FSP_SUCCESS;
  300. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  301. param = obj->param;
  302. RT_ASSERT(param != RT_NULL);
  303. err = R_SCI_UART_Open((uart_ctrl_t *const)param->sci_ctrl, (uart_cfg_t *const)param->sci_cfg);
  304. if (FSP_SUCCESS != err)
  305. {
  306. return -RT_ERROR;
  307. }
  308. err = R_SCI_UART_CallbackSet((uart_ctrl_t *const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
  309. if (FSP_SUCCESS != err)
  310. {
  311. //LOG_W("R_SCI_UART_CallbackSet API failed,%d", err);
  312. }
  313. return RT_EOK;
  314. }
  315. static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  316. {
  317. return RT_EOK;
  318. }
  319. static int ra_uart_putc(struct rt_serial_device *serial, char c)
  320. {
  321. struct ra_sci_object *obj;
  322. const struct ra_sci_param *param;
  323. RT_ASSERT(serial != RT_NULL);
  324. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  325. param = obj->param;
  326. RT_ASSERT(param != RT_NULL);
  327. #ifdef SOC_SERIES_R7FA8M85
  328. sci_b_uart_instance_ctrl_t *p_ctrl = (sci_b_uart_instance_ctrl_t *)param->sci_ctrl;
  329. #else
  330. sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl;
  331. #endif
  332. p_ctrl->p_reg->TDR = c;
  333. #ifdef SOC_SERIES_R7FA8M85
  334. while ((p_ctrl->p_reg->CSR_b.TEND) == 0);
  335. #else
  336. while ((p_ctrl->p_reg->SSR_b.TEND) == 0);
  337. #endif
  338. return RT_EOK;
  339. }
  340. static int ra_uart_getc(struct rt_serial_device *serial)
  341. {
  342. return RT_EOK;
  343. }
  344. static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
  345. rt_uint8_t *buf,
  346. rt_size_t size,
  347. rt_uint32_t tx_flag)
  348. {
  349. RT_ASSERT(serial != RT_NULL);
  350. RT_ASSERT(buf != RT_NULL);
  351. return 0;
  352. }
  353. const struct rt_uart_ops sci_ops_uart =
  354. {
  355. .configure = ra_uart_configure,
  356. .control = ra_uart_control,
  357. .putc = ra_uart_putc,
  358. .getc = ra_uart_getc,
  359. .transmit = ra_uart_transmit,
  360. };
  361. #else
  362. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  363. {
  364. }
  365. #endif
  366. /**
  367. * @}
  368. */
  369. /**
  370. * @brief SCI I2C
  371. * @defgroup SCI_I2C
  372. * @{
  373. */
  374. #ifdef BSP_USING_SCIn_I2C
  375. void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
  376. {
  377. rt_interrupt_enter();
  378. if (NULL != p_args)
  379. {
  380. /* capture callback event for validating the i2c transfer event*/
  381. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  382. uint32_t event = 0;
  383. RT_ASSERT(obj != RT_NULL);
  384. switch (p_args->event)
  385. {
  386. case I2C_MASTER_EVENT_ABORTED:
  387. event |= RA_SCI_EVENT_ABORTED;
  388. break;
  389. case I2C_MASTER_EVENT_RX_COMPLETE:
  390. event |= RA_SCI_EVENT_RX_COMPLETE;
  391. break;
  392. case I2C_MASTER_EVENT_TX_COMPLETE:
  393. event |= RA_SCI_EVENT_TX_COMPLETE;
  394. break;
  395. }
  396. rt_event_send(&obj->event, event);
  397. LOG_D("event:%x", p_args->event);
  398. }
  399. rt_interrupt_leave();
  400. LOG_D("p_args:%p", p_args);
  401. }
  402. static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  403. struct rt_i2c_msg msgs[],
  404. rt_uint32_t num)
  405. {
  406. rt_size_t i;
  407. RT_ASSERT(bus != RT_NULL);
  408. struct ra_sci_object *obj = rt_container_of(bus, struct ra_sci_object, ibus);
  409. const struct ra_sci_param *param = obj->param;
  410. i2c_master_ctrl_t *master_ctrl = (i2c_master_ctrl_t *)param->sci_ctrl;
  411. int err = FSP_SUCCESS;
  412. bool restart = false;
  413. for (i = 0; i < num; i++)
  414. {
  415. struct rt_i2c_msg *msg = &msgs[i];
  416. if (msg->flags & RT_I2C_NO_STOP)
  417. {
  418. restart = true;
  419. }
  420. else
  421. {
  422. restart = false;
  423. }
  424. if (msg->flags & RT_I2C_ADDR_10BIT)
  425. {
  426. //LOG_E("10Bit not support");
  427. //break;
  428. #ifdef SOC_SERIES_R7FA8M85
  429. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  430. #else
  431. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  432. #endif
  433. }
  434. else
  435. {
  436. //master_ctrl->slave = msg->addr;
  437. #ifdef SOC_SERIES_R7FA8M85
  438. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  439. #else
  440. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  441. #endif
  442. }
  443. if (msg->flags & RT_I2C_RD)
  444. {
  445. #ifdef SOC_SERIES_R7FA8M85
  446. err = R_SCI_B_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  447. #else
  448. err = R_SCI_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  449. #endif
  450. }
  451. else
  452. {
  453. #ifdef SOC_SERIES_R7FA8M85
  454. err = R_SCI_B_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  455. #else
  456. err = R_SCI_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  457. #endif
  458. }
  459. if (FSP_SUCCESS == err)
  460. {
  461. /* handle error */
  462. err = ra_wait_complete(obj);
  463. if (RT_EOK != err)
  464. {
  465. //LOG_E("POWER_CTL reg I2C write failed,%d,%d", err, i);
  466. break;
  467. }
  468. }
  469. /* handle error */
  470. else
  471. {
  472. /* Write API returns itself is not successful */
  473. LOG_E("R_IIC_MASTER_Write/Read API failed,%d", i);
  474. break;
  475. }
  476. }
  477. return (rt_ssize_t)i;
  478. }
  479. const struct rt_i2c_bus_device_ops sci_ops_i2c =
  480. {
  481. .master_xfer = ra_i2c_mst_xfer,
  482. .slave_xfer = RT_NULL,
  483. .i2c_bus_control = RT_NULL
  484. };
  485. #endif
  486. /**
  487. * @}
  488. */
  489. /**
  490. * @brief SCI SPI
  491. * @defgroup SCI_SPI
  492. * @{
  493. */
  494. #ifdef BSP_USING_SCIn_SPI
  495. void sci_spi_irq_callback(spi_callback_args_t *p_args)
  496. {
  497. rt_interrupt_enter();
  498. if (NULL != p_args)
  499. {
  500. /* capture callback event for validating the i2c transfer event*/
  501. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  502. uint32_t event = 0;
  503. switch (p_args->event)
  504. {
  505. case SPI_EVENT_ERR_MODE_FAULT :
  506. case SPI_EVENT_ERR_READ_OVERFLOW:
  507. case SPI_EVENT_ERR_PARITY :
  508. case SPI_EVENT_ERR_OVERRUN :
  509. case SPI_EVENT_ERR_FRAMING :
  510. case SPI_EVENT_ERR_MODE_UNDERRUN:
  511. event |= RA_SCI_EVENT_ERROR;
  512. break;
  513. case SPI_EVENT_TRANSFER_ABORTED :
  514. event |= RA_SCI_EVENT_ABORTED;
  515. break;
  516. case SPI_EVENT_TRANSFER_COMPLETE:
  517. event |= RA_SCI_EVENT_TX_COMPLETE;
  518. break;
  519. }
  520. rt_event_send(&obj->event, event);
  521. LOG_D("event:%x", p_args->event);
  522. }
  523. rt_interrupt_leave();
  524. LOG_D("p_args:%p", p_args);
  525. }
  526. static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
  527. {
  528. spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
  529. if (data_width == 1)
  530. bit_width = SPI_BIT_WIDTH_8_BITS;
  531. else if (data_width == 2)
  532. bit_width = SPI_BIT_WIDTH_16_BITS;
  533. else if (data_width == 4)
  534. bit_width = SPI_BIT_WIDTH_32_BITS;
  535. return bit_width;
  536. }
  537. static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
  538. {
  539. RT_ASSERT(device != NULL);
  540. RT_ASSERT(send_buf != NULL);
  541. RT_ASSERT(len > 0);
  542. rt_err_t err = RT_EOK;
  543. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  544. const struct ra_sci_param *param = obj->param;
  545. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  546. /**< send msessage */
  547. err = R_SCI_SPI_Write((spi_ctrl_t *)param->sci_ctrl, send_buf, len, bit_width);
  548. if (RT_EOK != err)
  549. {
  550. LOG_E("%s write failed. %d", param->bus_name, err);
  551. return -RT_ERROR;
  552. }
  553. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  554. ra_wait_complete(obj);
  555. return len;
  556. }
  557. static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len)
  558. {
  559. RT_ASSERT(device != NULL);
  560. RT_ASSERT(recv_buf != NULL);
  561. RT_ASSERT(len > 0);
  562. rt_err_t err = RT_EOK;
  563. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  564. const struct ra_sci_param *param = obj->param;
  565. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  566. /**< receive message */
  567. err = R_SCI_SPI_Read((spi_ctrl_t *)param->sci_ctrl, recv_buf, len, bit_width);
  568. if (RT_EOK != err)
  569. {
  570. LOG_E("%s write failed. %d", param->bus_name, err);
  571. return -RT_ERROR;
  572. }
  573. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  574. ra_wait_complete(obj);
  575. return len;
  576. }
  577. static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message)
  578. {
  579. RT_ASSERT(device != NULL);
  580. RT_ASSERT(message != NULL);
  581. RT_ASSERT(message->length > 0);
  582. rt_err_t err = RT_EOK;
  583. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  584. const struct ra_sci_param *param = obj->param;
  585. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  586. /**< write and receive message */
  587. err = R_SCI_SPI_WriteRead((spi_ctrl_t *)param->sci_ctrl, message->send_buf, message->recv_buf, message->length, bit_width);
  588. if (RT_EOK != err)
  589. {
  590. LOG_E("%s write and read failed. %d", param->bus_name, err);
  591. return -RT_ERROR;
  592. }
  593. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  594. ra_wait_complete(obj);
  595. return message->length;
  596. }
  597. /**< init spi TODO : MSB does not support modification */
  598. static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
  599. struct rt_spi_configuration *configuration)
  600. {
  601. RT_ASSERT(device != NULL);
  602. RT_ASSERT(configuration != NULL);
  603. rt_err_t err = RT_EOK;
  604. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  605. const struct ra_sci_param *param = obj->param;
  606. const spi_cfg_t *cfg = (const spi_cfg_t *)param->sci_cfg;
  607. /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/
  608. rt_uint8_t data_width = configuration->data_width / 8;
  609. RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4);
  610. configuration->data_width = configuration->data_width / 8;
  611. obj->spi_cfg = configuration;
  612. #ifdef R_SCI_B_SPI_H
  613. sci_b_spi_extended_cfg_t spi_cfg = *(sci_b_spi_extended_cfg_t *)cfg->p_extend;
  614. #else
  615. sci_spi_extended_cfg_t *spi_cfg = (sci_spi_extended_cfg_t *)cfg->p_extend;
  616. #endif
  617. /**< Configure Select Line */
  618. rt_pin_write(device->cs_pin, PIN_HIGH);
  619. /**< config bitrate */
  620. #ifdef R_SCI_B_SPI_H
  621. R_SCI_B_SPI_CalculateBitrate(obj->spi_cfg->max_hz, SCI_B_SPI_SOURCE_CLOCK_PCLK, &spi_cfg.clk_div);
  622. #else
  623. R_SCI_SPI_CalculateBitrate(obj->spi_cfg->max_hz, &spi_cfg->clk_div, false);
  624. #endif
  625. /**< init */
  626. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  627. /* handle error */
  628. if (err == FSP_ERR_IN_USE)
  629. {
  630. R_SCI_SPI_Close((spi_ctrl_t *)param->sci_ctrl);
  631. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  632. }
  633. if (RT_EOK != err)
  634. {
  635. LOG_E("%s init failed. %d", param->bus_name, err);
  636. return -RT_ERROR;
  637. }
  638. err = R_SCI_SPI_CallbackSet((spi_ctrl_t *)param->sci_ctrl, sci_spi_irq_callback, obj, NULL);
  639. if (FSP_SUCCESS != err)
  640. {
  641. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  642. }
  643. return RT_EOK;
  644. }
  645. static rt_ssize_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  646. {
  647. RT_ASSERT(device != RT_NULL);
  648. RT_ASSERT(device->bus != RT_NULL);
  649. RT_ASSERT(message != RT_NULL);
  650. rt_err_t err = RT_EOK;
  651. if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  652. {
  653. if (device->config.mode & RT_SPI_CS_HIGH)
  654. rt_pin_write(device->cs_pin, PIN_HIGH);
  655. else
  656. rt_pin_write(device->cs_pin, PIN_LOW);
  657. }
  658. if (message->length > 0)
  659. {
  660. if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  661. {
  662. /**< receive message */
  663. err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length);
  664. }
  665. else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  666. {
  667. /**< send message */
  668. err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length);
  669. }
  670. else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  671. {
  672. /**< send and receive message */
  673. err = ra_write_read_message(device, message);
  674. }
  675. }
  676. if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  677. {
  678. if (device->config.mode & RT_SPI_CS_HIGH)
  679. rt_pin_write(device->cs_pin, PIN_LOW);
  680. else
  681. rt_pin_write(device->cs_pin, PIN_HIGH);
  682. }
  683. return err;
  684. }
  685. const struct rt_spi_ops sci_ops_spi =
  686. {
  687. .configure = ra_hw_spi_configure,
  688. .xfer = ra_spixfer,
  689. };
  690. #endif
  691. /**
  692. * @}
  693. */
  694. static int ra_hw_sci_init(void)
  695. {
  696. int bufsz_idx = 0;
  697. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  698. {
  699. struct ra_sci_object *obj = &sci_obj[idx];
  700. const struct ra_sci_param *param = &sci_param[idx];
  701. obj->param = param;
  702. rt_err_t err;
  703. #ifdef BSP_USING_SCIn_SPI
  704. if ((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
  705. {
  706. /**< register spi bus */
  707. err = rt_spi_bus_register(&obj->sbus, param->bus_name, param->ops);
  708. if (RT_EOK != err)
  709. {
  710. LOG_E("bus %s register failed. %d", param->bus_name, err);
  711. return -RT_ERROR;
  712. }
  713. }
  714. else
  715. #endif
  716. #ifdef BSP_USING_SCIn_I2C
  717. if ((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
  718. {
  719. obj->ibus.ops = param->ops;
  720. obj->ibus.priv = 0;
  721. /* opening IIC master module */
  722. #ifdef SOC_SERIES_R7FA8M85
  723. err = R_SCI_B_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  724. #else
  725. err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  726. #endif
  727. if (err != FSP_SUCCESS)
  728. {
  729. LOG_E("R_IIC_MASTER_Open API failed,%d", err);
  730. continue;
  731. }
  732. #ifdef SOC_SERIES_R7FA8M85
  733. err = R_SCI_B_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  734. #else
  735. err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  736. #endif
  737. /* handle error */
  738. if (FSP_SUCCESS != err)
  739. {
  740. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  741. continue;
  742. }
  743. err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
  744. if (RT_EOK != err)
  745. {
  746. LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
  747. continue;
  748. }
  749. }
  750. else
  751. #endif
  752. #ifdef BSP_USING_SCIn_UART
  753. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  754. {
  755. if (rt_device_find(param->bus_name) != RT_NULL)
  756. {
  757. continue;
  758. }
  759. struct rt_serial_device *serial = &obj->ubus;
  760. obj->ubus.ops = param->ops;
  761. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  762. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  763. bufsz_idx ++;
  764. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  765. if (RT_EOK != err)
  766. {
  767. LOG_E("uart %s register failed,%d", param->bus_name, err);
  768. continue;
  769. }
  770. }
  771. #endif
  772. {
  773. }
  774. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  775. {
  776. LOG_E("sci event init fail!");
  777. return -RT_ERROR;
  778. }
  779. }
  780. return RT_EOK;
  781. }
  782. INIT_BOARD_EXPORT(ra_hw_sci_init);
  783. #ifdef BSP_USING_SCIn_UART
  784. rt_weak int rt_hw_usart_init(void)
  785. {
  786. int bufsz_idx = 0;
  787. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  788. {
  789. struct ra_sci_object *obj = &sci_obj[idx];
  790. const struct ra_sci_param *param = &sci_param[idx];
  791. obj->param = param;
  792. rt_err_t err;
  793. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  794. {
  795. if (rt_device_find(param->bus_name) != RT_NULL)
  796. {
  797. continue;
  798. }
  799. struct rt_serial_device *serial = &obj->ubus;
  800. obj->ubus.ops = param->ops;
  801. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  802. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  803. bufsz_idx ++;
  804. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  805. if (RT_EOK != err)
  806. {
  807. continue;
  808. }
  809. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  810. {
  811. return -RT_ERROR;
  812. }
  813. }
  814. }
  815. return RT_EOK;
  816. }
  817. #endif
  818. /**
  819. * Attach the spi device to SPI bus, this function must be used after initialization.
  820. */
  821. #ifdef BSP_USING_SCIn_SPI
  822. rt_err_t rt_hw_sci_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  823. {
  824. RT_ASSERT(bus_name != RT_NULL);
  825. RT_ASSERT(device_name != RT_NULL);
  826. rt_err_t result;
  827. struct rt_spi_device *spi_device;
  828. /* attach the device to spi bus*/
  829. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  830. RT_ASSERT(spi_device != RT_NULL);
  831. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  832. if (result != RT_EOK)
  833. {
  834. LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
  835. }
  836. LOG_D("%s attach to %s done", device_name, bus_name);
  837. return result;
  838. }
  839. #endif
  840. #endif /* BSP_USING_SCI */