ruiching-lcd-mipi-4_3-480x800.dtsi 2.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. &i2c1 {
  2. status = "okay";
  3. pinctrl-names = "default";
  4. sitronix@55 {
  5. status = "okay";
  6. compatible = "sitronix_ts_i2c";
  7. reg = <0x55>;
  8. resolution_x = <480>;
  9. resolution_y = <800>;
  10. sitronix_rst_gpio = <&gpio0 162 GPIO_ACTIVE_HIGH>;
  11. sitronix_irq_gpio = <&gpio0 RK_PC0 IRQ_TYPE_EDGE_FALLING>;
  12. };
  13. };
  14. &backlight {
  15. pwms = <&pwm0_4ch_2 0 500000 0>;
  16. };
  17. &pwm0_4ch_2 {
  18. status = "okay";
  19. };
  20. &display_subsystem {
  21. status = "okay";
  22. };
  23. &dsi_panel {
  24. status = "okay";
  25. prepare-delay-ms = <20>;
  26. reset-delay-ms = <80>;
  27. init-delay-ms = <240>;
  28. panel-init-sequence = [
  29. 29 00 04 99 71 02 a2
  30. 29 00 04 99 71 02 a3
  31. 29 00 04 99 71 02 a4
  32. 15 00 02 a4 31
  33. 39 00 08 b0 22 57 1e 61 2f 57 61
  34. 39 00 03 b7 64 64
  35. 39 00 03 bf b4 b4
  36. 29 00 26 C8 00 00 0F 1C 34 00 60 03 A0 06 10 FE 06 74 03 21 C4 00 08 00 22 46 0F 8F 0A 32 F2 0C 42 0C F3 80 00 AB C0 03 C4
  37. 29 00 26 C9 00 00 0F 1C 34 00 60 03 A0 06 10 FE 06 74 03 21 C4 00 08 00 22 46 0F 8F 0A 32 F2 0C 42 0C F3 80 00 AB C0 03 C4
  38. 39 00 07 d7 10 0c 36 19 90 90
  39. 39 00 21 A3 51 03 80 CF 44 00 00 00 00 04 78 78 00 1A 00 45 05 00 00 00 00 46 00 00 02 20 52 00 05 00 00 FF
  40. 39 00 2d A6 02 00 24 55 35 00 38 00 78 78 00 24 55 36 00 37 00 78 78 02 AC 51 3A 00 00 00 78 78 03 AC 21 00 04 00 00 78 78 3e 00 06 00 00 00 00
  41. 39 00 31 A7 19 19 00 64 40 07 16 40 00 04 03 78 78 00 64 40 25 34 00 00 02 01 78 78 00 64 40 4B 5A 00 00 02 01 78 78 00 24 40 69 78 00 00 00 00 78 78 00 44
  42. 39 00 26 AC 08 0A 11 00 13 03 1B 18 06 1A 19 1B 1B 1B 18 1B 09 0B 10 02 12 01 1B 18 06 1A 19 1B 1B 1B 18 1B FF 67 FF 67 00
  43. 39 00 08 ad cc 40 46 11 04 78 78
  44. 39 00 0f e8 30 07 00 94 94 9c 00 e2 04 00 00 00 00 ef
  45. 39 00 22 E7 8B 3C 00 0C F0 5D 00 5D 00 5D 00 5D 00 FF 00 08 7B 00 00 C8 6A 5A 08 1A 3C 00 81 01 CC 01 7F F0 22
  46. 05 14 01 11
  47. 05 14 01 29
  48. 15 00 02 35 00
  49. ];
  50. };
  51. &dsi_timing0 {
  52. clock-frequency = <33300000>;
  53. hactive = <480>;
  54. vactive = <800>;
  55. hback-porch = <40>;
  56. hfront-porch = <40>;
  57. vback-porch = <10>;
  58. vfront-porch = <180>;
  59. hsync-len = <2>;
  60. vsync-len = <2>;
  61. };