update stack size to 1k

linkscripts/STM32F401CB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401CC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401CD/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401CE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401RB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401RC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401RD/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401RE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401VB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401VC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  64k /* 64K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401VD/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F401VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  96k /* 96K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F405OE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F405OG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F405RG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F405VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F405ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407IE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407IG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407ZE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F407ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410C8/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410CB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410R8/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410RB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410T8/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F410TB/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  32k /* 32K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411CC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411CE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411RC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411RE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411VC/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F411VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412CE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412CG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412RE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412RG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412ZE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F412ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  256k /* 256K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413CG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413CH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413MG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413MH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413RG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413RH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413VH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F413ZH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F415OG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F415RG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F415VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F415ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417IE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417IG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417ZE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F417ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F423CH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F423MH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F423RH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F423VH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F423ZH/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  320k /* 320K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427AG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427AI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427IG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427II/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427VI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F427ZI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429AG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429AI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429BE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429BG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429BI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429IE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429IG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429II/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429NE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429NG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429NI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429VE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429VI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429ZE/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F429ZI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437AI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437IG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437II/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437VG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437VI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437ZG/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :

linkscripts/STM32F437ZI/link.lds

@@ -9,7 +9,8 @@ MEMORY
     RAM (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram */
 }
 ENTRY(Reset_Handler)
-_system_stack_size = 0x1000;
+_system_stack_size = 0x400;
+
 SECTIONS
 {
     .text :