update to v0.1.6

drivers/baremetal/drv_clk.c

@@ -41,7 +41,7 @@ void system_clock_config(int target_freq_mhz)
     RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
     {
-       Error_Handler();
+        Error_Handler();
     }
     /** Initializes the CPU, AHB and APB busses clocks
      */

drivers/rtt/drv_clk.c

@@ -21,7 +21,7 @@
 
 void system_clock_config(int target_freq_mhz)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+    RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
     RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
 
     /** Initializes the CPU, AHB and APB busses clocks
@@ -40,7 +40,7 @@ void system_clock_config(int target_freq_mhz)
     RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
     if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
     {
-  		 Error_Handler();
+        Error_Handler();
     }
     /** Initializes the CPU, AHB and APB busses clocks
      */
@@ -52,9 +52,10 @@ void system_clock_config(int target_freq_mhz)
 
     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
     {
- 		  Error_Handler();
+        Error_Handler();
     }
 }
+
 int clock_information(void)
 {
     LOG_D("System Clock information");

drivers/rtt/drv_usart.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2020, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -8,6 +8,7 @@
  * 2018-10-30     SummerGift   first version
  * 2020-05-23     chenyaxing   modify stm32_uart_config
  */
+
 #include "string.h"
 #include "stdlib.h"
 #include "drv_common.h"