sdk-csp-stm32l4/RealThread_STM32L4.yaml

---
vendor: RealThread
dvendor: STMicroelectronics
name: STM32L4
version: 0.2.0
yaml_version: 1
type: Chip_Support_Packages
family_name: STM32
series:
  description: |-
    ST has built a new architecture to reach best-in-class ultra-low-power figures thanks to its high flexibility.
    STM32L4 MCUs have scored 176.7 in the standardized EEMBC ULPBench tests that compare the efficiency of ultra-low-power microcontrollers.
    Moreover, the STM32L4 series shatters performance limits in the ultra-low-power world.
    It delivers 100 DMIPS based on its ARM Cortex-M4 core with FPU and ST ART Accelerator at 80 MHz.

    STM32L4 microcontrollers offer dynamic voltage scaling to balance power consumption with processing demand, low-power peripherals (LP UART, LP timers) available in Stop mode, safety and security features, smart and numerous peripherals, advanced and low-power analog peripherals such as op amps, comparators, LCD, 12-bit DACs and 16-bit ADCs (hardware oversampling).
  series_name: STM32L4
  peripheral: {}
  sub_series:
  - sub_series_name: STM32L412
    cpu_info: []
    chips:
    - chip_name: STM32L412C8Tx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412C8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412C8Ux
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412C8Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412K8Tx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412K8Tx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412K8Ux
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412K8Ux\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412K8Ix
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412K8Ix\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412T8Yx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00010000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412T8Yx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412CBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412CBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412KBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412KBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412KBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412KBIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412KBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L412TBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L412TBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\RM0394.pdf
      title: STM32L41xxx STM32L42xxx STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx
        Reference Manual
    - file: documents\DS12469.pdf
      title: STM32L412xx Data Sheet
    svd:
      file: debug\svd\STM32L412.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L412xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l412xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l412xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00008000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00002000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L422
    cpu_info: []
    chips:
    - chip_name: STM32L422CBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L422CBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L422KBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422KBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L422KBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L422KBIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422KBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L422TBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00008000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L422TBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\RM0394.pdf
      title: STM32L41xxx STM32L42xxx STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx
        Reference Manual
    - file: documents\DS12470.pdf
      title: STM32L422xx Data Sheet
    svd:
      file: debug\svd\STM32L412.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L422xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l422xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l422xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00008000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00002000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L431
    cpu_info: []
    chips:
    - chip_name: STM32L431CCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431CCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431CCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431KCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431KCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431VCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431CBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431CBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431CBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431CBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431KBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L431RBIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L431RBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00257211.pdf
      title: STM32L431xx Data Sheet
    svd:
      file: debug\svd\STM32L4x1.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L431xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l431xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l431xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x0000C000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L432
    cpu_info: []
    chips:
    - chip_name: STM32L432KCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L432KCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L432KBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L432KBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00257205.pdf
      title: STM32L432KB STM3L432KC Data Sheet
    svd:
      file: debug\svd\STM32L4x2.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L432xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l432xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l432xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x0000C000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L433
    cpu_info: []
    chips:
    - chip_name: STM32L433CCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433CCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433CCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433VCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433CBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433CBUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CBUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433CBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433CBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433RBTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433RBTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433RBYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433RBYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L433RBIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00020000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L433RBIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00257192.pdf
      title: STM32L433xx Data Sheet
    svd:
      file: debug\svd\STM32L4x3.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L433xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l433xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l433xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x0000C000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L442
    cpu_info: []
    chips:
    - chip_name: STM32L442KCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L442KCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00257195.pdf
      title: STM32L442xx Data Sheet
    svd:
      file: debug\svd\STM32L4x2.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L442xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l442xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l442xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x0000C000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L443
    cpu_info: []
    chips:
    - chip_name: STM32L443CCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443CCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443CCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443CCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443CCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443RCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443RCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443RCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443RCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L443VCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x0000C000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L443VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00254865.pdf
      title: STM32L443xx Data Sheet
    svd:
      file: debug\svd\STM32L4x3.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L443xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l443xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l443xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x0000C000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L471
    cpu_info: []
    chips:
    - chip_name: STM32L471RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471RCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471RCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471RETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471JEYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471JEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471QEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471QEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471ZETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471ZETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471RGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471RGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471JGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471JGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L471ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L471ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00149427.pdf
      title: STM32L4x1 Reference Manual
    - file: documents\DM00149404.pdf
      title: STM32L471xx Data Sheet
    svd:
      file: debug\svd\STM32L4x1.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L471xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l471xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l471xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00018000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L475
    cpu_info: []
    chips:
    - chip_name: STM32L475RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475RETx
      peripheral: {}
      memory:
      - id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475JEYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475JEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475QEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475QEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475ZETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475ZETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475JGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475JGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L475ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L475ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    - file: documents\DM00172872.pdf
      title: STM32L475xx Data Sheet
    svd:
      file: debug\svd\STM32L4x5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L475xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l475xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l475xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00018000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L476
    cpu_info: []
    chips:
    - chip_name: STM32L476RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476RETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476JEYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476JEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476MEYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476MEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476QEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476QEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476ZETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476ZETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476JGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476JGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476MGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476MGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L476QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L476QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    - file: documents\DM00108832.pdf
      title: STM32L476xx Data Sheet
    svd:
      file: debug\svd\STM32L4x6.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L476xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l476xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l476xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00018000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L485
    cpu_info: []
    chips:
    - chip_name: STM32L485JCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L485JCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    svd:
      file: debug\svd\STM32L4x5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L485xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l485xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l485xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00018000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L486
    cpu_info: []
    chips:
    - chip_name: STM32L486RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L486RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L486JGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L486JGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L486VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L486VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L486QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L486QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L486ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00018000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L486ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    - file: documents\DM00108833.pdf
      title: STM32L486xx Data Sheet
    svd:
      file: debug\svd\STM32L4x6.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L486xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l486xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l486xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00018000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L451
    cpu_info: []
    chips:
    - chip_name: STM32L451RETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451REYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451REYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451REIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451REIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451CEUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451VEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451RCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451RCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451RCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451RCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451CCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L451VCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L451VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00340475.pdf
      title: STM32L451xx Data Sheet
    svd:
      file: debug\svd\STM32L4x1.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L451xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l451xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l451xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L452
    cpu_info: []
    chips:
    - chip_name: STM32L452RETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452REYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452REYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452REIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452REIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452CEUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452VEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452RCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452RCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452RCYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452RCYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452RCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452RCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452CCUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452CCUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452VCTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452VCTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L452VCIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00040000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L452VCIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00340549.pdf
      title: STM32L452xx Data Sheet
    svd:
      file: debug\svd\STM32L4x2.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L452xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l452xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l452xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L462
    cpu_info: []
    chips:
    - chip_name: STM32L462RETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462RETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L462REYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462REYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L462REIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462REIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L462CEUx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462CEUx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L462VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L462VEIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00020000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L462VEIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00151940.pdf
      title: STM32L43xxx STM32L44xxx STM32L45xxx STM32L46xxx Reference Manual
    - file: documents\DM00340637.pdf
      title: STM32L462CE STM32L462RE STM32L462VE Data Sheet
    svd:
      file: debug\svd\STM32L4x2.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L462xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l462xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l462xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00008000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L496
    cpu_info: []
    chips:
    - chip_name: STM32L496RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496VGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496VGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496ZGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496ZGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496AGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496AGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496VETx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496VETx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L496VEYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00080000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L496VEYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    - file: documents\DM00284211.pdf
      title: STM32L496xx Data Sheet
    svd:
      file: debug\svd\STM32L4x6.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L496xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l496xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l496xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00040000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00010000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4A6
    cpu_info: []
    chips:
    - chip_name: STM32L4A6RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6VGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6VGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6ZGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6ZGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4A6AGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x00040000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4A6AGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DM00083560.pdf
      title: STM32L4x5 STM32L4x6 Reference Manual
    - file: documents\DM00284211.pdf
      title: STM32L496xx Data Sheet
    svd:
      file: debug\svd\STM32L4x6.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4A6xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4a6xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4a6xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00040000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00010000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4R5
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4R5AGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5AGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5QGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5QGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5ZGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5ZGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5QIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5QIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5VITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5VITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5ZIYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5ZIYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R5AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R5AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    - file: documents\DS12023.pdf
      title: STM32L4R5xx STM32L4R7xx STM32L4R9 Data Sheet
    svd:
      file: debug\svd\STM32L4R5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4R5xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4r5xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4r5xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4R7
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4R7VITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R7VITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R7ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R7ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R7AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R7AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    - file: documents\DS12023.pdf
      title: STM32L4R5xx STM32L4R7xx STM32L4R9 Data Sheet
    svd:
      file: debug\svd\STM32L4R7.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4R7xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4r7xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4r7xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4R9
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4R9AGIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9AGIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZGJx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZGJx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZGYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZGYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9VITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9VITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZIJx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZIJx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4R9ZIYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4R9ZIYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    - file: documents\DS12023.pdf
      title: STM32L4R5xx STM32L4R7xx STM32L4R9 Data Sheet
    svd:
      file: debug\svd\STM32L4R9.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4R9xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4r9xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4r9xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4S5
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4S5AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S5AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S5QIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S5QIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S5VITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S5VITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S5ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S5ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S5ZIYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S5ZIYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DS12024.pdf
      title: STM32L4S5xx STM32L4S7xx STM32L4S9 Data Sheet
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    svd:
      file: debug\svd\STM32L4S5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4S5xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4s5xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4s5xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4S7
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4S7AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S7AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S7VITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S7VITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S7ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S7ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DS12024.pdf
      title: STM32L4S5xx STM32L4S7xx STM32L4S9 Data Sheet
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    svd:
      file: debug\svd\STM32L4S7.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4S7xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4s7xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4s7xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4S9
    cpu_info:
      max_clock: '120000000'
    chips:
    - chip_name: STM32L4S9AIIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S9AIIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S9ZJIx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S9ZJIx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S9ZITx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S9ZITx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4S9ZIYx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x00200000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x000A0000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4S9ZIYx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DS12024.pdf
      title: STM32L4S5xx STM32L4S7xx STM32L4S9 Data Sheet
    - file: documents\RM0432.pdf
      title: STM32L4Rxxx and STM32L4Sxxx Reference Manual
    svd:
      file: debug\svd\STM32L4S9.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4S9xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4s9xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4s9xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x000A0000'
      init: '0'
      default: '1'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4Q5
    cpu_info: []
    chips:
    - chip_name: STM32L4Q5CGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5CGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4Q5RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4Q5VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4Q5QGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5QGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4Q5ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4Q5AGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4Q5AGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DS12902.pdf
      title: STM32L4Q5xx Data Sheet
    svd:
      file: debug\svd\STM32L4Q5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4Q5xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4q5xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4q5xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    memory:
    - id: IRAM1
      start: '0x20000000'
      size: '0x00020000'
      init: '0'
      default: '1'
    - id: IRAM2
      start: '0x10000000'
      size: '0x00004000'
      init: '0'
      default: '0'
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  - sub_series_name: STM32L4P5
    cpu_info: []
    chips:
    - chip_name: STM32L4P5CGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5CGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4P5RGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5RGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4P5VGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5VGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4P5QGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5QGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4P5ZGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5ZGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    - chip_name: STM32L4P5AGTx
      peripheral: {}
      memory:
      - name: Main_Flash
        access: rx
        id: IROM1
        start: '0x08000000'
        size: '0x100000'
        default: '1'
      - name: SRAM
        access: rwx
        id: IRAM1
        start: '0x20000000'
        size: '0x20000'
        init: '0'
        default: '1'
      compiler:
        gcc:
          entry_point: entry
          link_script: linkscripts\STM32L4P5AGTx\link.lds
          marco: []
          files: []
        armcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
        iarcc:
          entry_point: none
          link_script: none
          marco: []
          files: []
    ui:
      uart:
        default_value: UART1
        prompt_message_en: select one uart as console output interface
        prompt_message_zh: 选择一个串口作为控制台信息输出接口
      tx_pin:
        default_value: PA9
        prompt_message_en: 'set the tx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9,
          PB6
      rx_pin:
        default_value: PA10
        prompt_message_en: 'set the rx pin name of the console device interface, the
          value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
        prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    docs:
    - file: documents\DS12903.pdf
      title: STM32L4P5xx Data Sheet
    svd:
      file: debug\svd\STM32L4P5.svd
    compiler:
      gcc:
        entry_point: none
        link_script: none
        marco:
        - STM32L4P5xx
        files:
        - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\gcc\startup_stm32l4p5xx.S
        - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4p5xx.h
        - libraries\CMSIS\DSP\Lib\GCC
      armcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
      iarcc:
        entry_point: none
        link_script: none
        marco: []
        files: []
    project_type:
      bare_metal:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          sysTick: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\baremetal
      rtt_nano:
        function_map:
          clk_init: none
          uart_init: none
          putc: none
          getc: none
          sysTick: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\nano
      rtt:
        function_map:
          rt_hw_board_init;: none
          rt_hw_serial_register: none
          rt_hw_pin_register: none
          heap_init: none
        marco:
        - SOC_FAMILY_STM32
        - SOC_SERIES_STM32L4
        - USE_HAL_DRIVER
        source_files:
        - drivers\rtt
  docs:
  - file: documents\dui0553a_cortex_m4_dgug.pdf
    title: Cortex-M4 Generic User Guide
  source_files:
    file:
    - libraries\STM32L4xx_HAL_Driver
    - libraries\CMSIS\Include
    - libraries\CMSIS\RTOS
    - libraries\CMSIS\Device\ST\STM32L4xx\Include\stm32l4xx.h
    - libraries\CMSIS\Device\ST\STM32L4xx\Include\system_stm32l4xx.h
    - libraries\CMSIS\Device\ST\STM32L4xx\Source\Templates\system_stm32l4xx.c
  cpu_info:
    max_clock: '80000000'
    core: Cortex-M4
    fpu: SP_FPU
    mpu: MPU
    endian: Little-endian
  ui:
    uart:
      default_value: UART1
      prompt_message_en: select one uart as console output interface
      prompt_message_zh: 选择一个串口作为控制台信息输出接口
    tx_pin:
      default_value: PA9
      prompt_message_en: 'set the tx pin name of the console device interface, the
        value should be with a format"P+[port name][pin number]",eg. PA9,PB6 '
      prompt_message_zh: 设置控制台设备的数据发送引脚的名称, 名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6
    rx_pin:
      default_value: PA10
      prompt_message_en: 'set the rx pin name of the console device interface, the
        value should be with a format"P+[port name][pin number]", eg. PA10, PB7 '
      prompt_message_zh: 设置控制台设备的数据发送引脚的名称，名称应该具有以下格式“P+[端口名称][端口编号]”, 比如：PA9, PB6