/********************************************************************* * * J-Link ARM Setup File - Generated by J-Flash ARM V3.31a * * Syntax: * * SetJTAGSpeed(Speed); : Sets the JTAG speed [kHz], (0 = Auto, 0xFFFF = Adaptive) * Delay(Delay); : Waits a given time [msec] * DisableMMU(); : Disables the MMU * DisableChecks(); : Disables mode check after read operations * EnableChecks(); : Enables mode check after read operations * Go(); : Starts the core * Halt(); : Halts the core * * Reset(Delay); : Resets the target (normal) * ResetWP(); : Resets the target (using watchpoint) * ResetDBGRQ(); : Resets the target (using DBGRQ) * ResetBP0(Delay); : Resets the target (using breakpoint @ addr 0) * ResetADI(); : Resets the target (using ADI software reset) * * Read8 (Addr); : Reads a 8/16/32 bit value, * Read16(Addr); : Addr = address to read (as hex value) * Read32(Addr); : * * Verify8 (Addr, Data); : Verifies a 8/16/32 bit value, * Verify16(Addr, Data); : Addr = address to verify (as hex value) * Verify32(Addr, Data); : Data = data to verify (as hex value) * * Write8 (Addr, Data); : Writes a 8/16/32 bit value, * Write16(Addr, Data); : Addr = address to write (as hex value) * Write32(Addr, Data); : Data = data to write (as hex value) * * WriteVerify8 (Addr, Data); : Writes and verifies a 8/16/32 bit value, * WriteVerify16(Addr, Data); : Addr = address to write (as hex value) * WriteVerify32(Addr, Data); : Data = data to write (as hex value) * * WriteRegister(Reg, Data); : Writes a register * WriteJTAG_IR(Cmd); : Writes the JTAG instruction register * WriteJTAG_DR(nBits, Data); : Writes the JTAG data register * * VarAND(Data); : VAR = VAR AND Data * VarOR (Data); : VAR = VAR OR Data * VarXOR(Data); : VAR = VAR XOR Data * VarBEQ(Index); : Execute branch * * VarWrite8 (Addr); : Writes the value of VAR as 8/16/32 bit value, * VarWrite16(Addr); : Addr = address to write (as hex value) * VarWrite32(Addr); : * ********************************************************************** */ SetJTAGSpeed(30); Reset(0); DisableChecks(); Write32(0xFFFFFFE0, 0x00004007); // Disable illegal address reset Write32(0xFFFFFE04, 0x000000B0); // MFBALR0 (1MB ROM) Write32(0xFFFFFE00, 0x00000040); // MFBAHR0 (ROM @ 0x400000) Write32(0xFFFFFE08, 0x00000000); // MFBAHR1 Write32(0xFFFFFE0C, 0x00000000); // MFBALR1 Write32(0xFFFFFE10, 0x00000000); // MFBAHR2 (RAM @ 0x0) Write32(0xFFFFFE14, 0x00000070); // MFBALR2 (64KB RAM) Write32(0xFFFFFE18, 0x00000000); // MFBAHR3 Write32(0xFFFFFE1C, 0x00000000); // MFBALR3 Write32(0xFFFFFE20, 0x00000080); // MFBAHR4 (HET RAM @ 0x800000 Write32(0xFFFFFE24, 0x00000010); // MFBALR4 (1KB HET RAM) Write32(0xFFFFFE04, 0x000001B0); // Activate mapping Write32(0xFFFFF724, 0x80000000); Read32(0x0040FFE0); Read32(0x0040FFE4); Read32(0x0040FFE8); Read32(0x0040FFEC); Write32(0xFFFFFFDC, 0x00000000); EnableChecks(); SetJTAGSpeed(8000);