ONSemiconductor_RSL10.JLinkScript 5.6 KB

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  1. /* ----------------------------------------------------------------------------
  2. * Copyright (c) 2017 Semiconductor Components Industries, LLC (d/b/a
  3. * ON Semiconductor), All Rights Reserved
  4. *
  5. * This code is the property of ON Semiconductor and may not be redistributed
  6. * in any form without prior written permission from ON Semiconductor.
  7. * The terms of use and warranty for this code are covered by contractual
  8. * agreements between ON Semiconductor and the licensee.
  9. *
  10. * This is Reusable Code.
  11. *
  12. * ----------------------------------------------------------------------------
  13. * ONSemiconductor_RSL10.JLinkScript
  14. * - RSL10 JLink Script
  15. *
  16. * Provides a custom reset function for RSL10
  17. * ----------------------------------------------------------------------------
  18. * $Revision: 1.7 $
  19. * $Date: 2017/06/19 16:15:11 $
  20. * ------------------------------------------------------------------------- */
  21. /* Registers */
  22. __constant U32 FP_CTRL_ADDR = 0xE0002000;
  23. __constant U32 FP_COMP0_ADDR = 0xE0002008;
  24. __constant U32 AIRCR_ADDR = 0xE000ED0C;
  25. __constant U32 NVR1_ENTRY_ADDR = 0x00800000;
  26. __constant U32 FLASH_ENTRY_ADDR = 0x00100004;
  27. /* Constants */
  28. __constant U32 FP_CTRL_EN = 0x00000003; /* Enable flash patch unit */
  29. __constant U32 FCOMP_EN_BP_LOWER = (1 << 30) | (1 << 0); /* Bitband to set BP on lower halfword of addr and enable BP */
  30. /* Global variables */
  31. U32 fp_ctrl_old; /* Used to restore previous fp_ctrl value */
  32. U32 fp_comp0_old; /* Used to restore previous fp_comp0 value */
  33. U32 entry_point; /* Stores application's entry point and is set by ResetCatchSet */
  34. /*******************************************************************
  35. * Set a breakpoint when a valid application's entry point is found.
  36. * If NVR1 has no valid entry point, read it from Flash.
  37. *******************************************************************/
  38. void ResetCatchSet()
  39. {
  40. /* Get user's application entry point from NVR1 */
  41. entry_point = JLINK_MEM_ReadU32(NVR1_ENTRY_ADDR);
  42. if (entry_point == 0xFFFFFFFF) /* If entry point is not set in NVR1 */
  43. {
  44. entry_point = JLINK_MEM_ReadU32(FLASH_ENTRY_ADDR); /* Get entry point from FLASH */
  45. }
  46. /* Set a hardware breakpoint on application's entry point (set flash patch unit manually)
  47. * If reset address points to 0xFFFFFFFF, the device is empty and CPU will be halted after 100ms. */
  48. fp_ctrl_old = JLINK_MEM_ReadU32(FP_CTRL_ADDR); /* Remember flash patch unit settings */
  49. fp_comp0_old = JLINK_MEM_ReadU32(FP_COMP0_ADDR); /* Remember settings for comparator 0 */
  50. if (entry_point != 0xFFFFFFFF)
  51. {
  52. JLINK_MEM_WriteU32(FP_CTRL_ADDR, FP_CTRL_EN); /* Enable flash patch unit */
  53. JLINK_MEM_WriteU32(FP_COMP0_ADDR, entry_point | FCOMP_EN_BP_LOWER); /* Set BP on lower halfword of addr. Enable BP */
  54. }
  55. }
  56. /*******************************************************************
  57. * Restore previous FPB settings for the flash patch control
  58. * and comparator0 registers
  59. *******************************************************************/
  60. void ResetCatchClear()
  61. {
  62. JLINK_MEM_WriteU32(FP_COMP0_ADDR, fp_comp0_old);
  63. JLINK_MEM_WriteU32(FP_CTRL_ADDR, fp_ctrl_old);
  64. }
  65. /*******************************************************************
  66. * Execute a software reset via AIRCR.
  67. * If aircr_value=0x05FA0001, execute core-only reset (VECTRESET)
  68. * If aircr_value=0x05FA0004, execute system-wide reset (SYSRESETREQ)
  69. * After reset, the CPU is expected to halt at the breakpoint set by
  70. * ResetCatchSet. If no program is loaded or a timeout occurs,
  71. * CPU is manually halted.
  72. *******************************************************************/
  73. int SoftwareReset(U32 aircr_value)
  74. {
  75. int end_time, is_halted, timeout;
  76. /* Request reset via AIRCR */
  77. JLINK_MEM_WriteU32(AIRCR_ADDR, aircr_value);
  78. SYS_Sleep(100); /* Boot loader runs after reset */
  79. if (entry_point == 0xFFFFFFFF)
  80. {
  81. Report("No application found. Manually halting CPU.");
  82. JLINK_TARGET_Halt();
  83. }
  84. else
  85. {
  86. /* Wait until CPU is halted or timeout occurs */
  87. end_time = JLINK_GetTime() + 1000;
  88. do {
  89. is_halted = JLINK_TARGET_IsHalted();
  90. timeout = end_time < JLINK_GetTime()
  91. } while ( is_halted==0 && timeout==0 );
  92. if(is_halted == -1)
  93. {
  94. Report("Error while checking CPU state after reset.");
  95. return -1;
  96. }
  97. if (timeout)
  98. {
  99. Report("Timeout while waiting for CPU to halt after reset. Manually halting CPU.");
  100. JLINK_TARGET_Halt();
  101. }
  102. }
  103. return 0;
  104. }
  105. /*******************************************************************
  106. * Override default J-Link reset strategy.
  107. * CPU is halted by a breakpoint at application's entry point.
  108. * When no valid entry point is found, CPU is manually halted after reset.
  109. * Support reset types 0 and 1.
  110. *******************************************************************/
  111. int ResetTarget(void)
  112. {
  113. int r,reset_type;
  114. ResetCatchSet(); /* Set a breakpoint at application's entry point */
  115. reset_type = MAIN_ResetType;
  116. Report1("Executing RSL10 reset type: ",reset_type);
  117. if(MAIN_ResetType == 0)
  118. {
  119. r = SoftwareReset(0x05FA0004); /* Software System-wide reset (SYSRESETREQ via AIRCR) */
  120. }
  121. else if(MAIN_ResetType == 1)
  122. {
  123. r = SoftwareReset(0x05FA0001); /* Processor reset (VECTRESET via AIRCR) */
  124. }
  125. else
  126. {
  127. Report1("Unsupported RSL10 Reset Type: ",reset_type);
  128. r = -1;
  129. }
  130. ResetCatchClear(); /* Restore previous settings of FPB unit */
  131. return r;
  132. }