yaxing.chen
d961342a72
update jlink to 6.80d
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5 years ago | |
|---|---|---|
| .. | ||
| Readme.txt | 5 years ago | |
| ST_STM32L476G_Disco_QSPI.elf | 5 years ago | |
| ST_STM32L496G_Disco_QSPI.elf | 5 years ago | |
| ST_STM32L4R9I_Disco_QSPI.elf | 5 years ago | |
Readme.txt
The flash algorithm ST_STM32L476G_Disco_QSPI.elf assumes that the QSPI flash uses the pin layout below (same as on the ST ST_STM32L476G discovery board):
QUADSPI_BK1_IO0 PE12
QUADSPI_BK1_IO1 PE13
QUADSPI_BK1_IO2 PE14
QUADSPI_BK1_IO3 PE15
QUADSPI_CLK PE10
QUADSPI_BK1_NCS PE11
The flash algorithm ST_STM32L496G_Disco_QSPI.elf assumes that the QSPI flash uses the pin layout below (same as on the ST ST_STM32L496G discovery board):
QUADSPI_BK1_IO0 PB1
QUADSPI_BK1_IO1 PB0
QUADSPI_BK1_IO2 PA7
QUADSPI_BK1_IO3 PA6
QUADSPI_CLK PA3
QUADSPI_BK1_NCS PB11
The flash algorithm ST_STM32L4R9I_Disco_QSPI.elf assumes that the QSPI flash uses the pin layout below (same as on the ST ST_STM32L4R9I discovery board):
QUADSPI_BK1_IO0 PI11
QUADSPI_BK1_IO1 PI10
QUADSPI_BK1_IO2 PI9
QUADSPI_BK1_IO3 PH8
QUADSPI_CLK PI6
QUADSPI_BK1_NCS PG12
QUADSPI_BK1_IO0 PE12
QUADSPI_BK1_IO1 PE13
QUADSPI_BK1_IO2 PE14
QUADSPI_BK1_IO3 PE15
QUADSPI_CLK PE10
QUADSPI_BK1_NCS PE11
The flash algorithm ST_STM32L496G_Disco_QSPI.elf assumes that the QSPI flash uses the pin layout below (same as on the ST ST_STM32L496G discovery board):
QUADSPI_BK1_IO0 PB1
QUADSPI_BK1_IO1 PB0
QUADSPI_BK1_IO2 PA7
QUADSPI_BK1_IO3 PA6
QUADSPI_CLK PA3
QUADSPI_BK1_NCS PB11
The flash algorithm ST_STM32L4R9I_Disco_QSPI.elf assumes that the QSPI flash uses the pin layout below (same as on the ST ST_STM32L4R9I discovery board):
QUADSPI_BK1_IO0 PI11
QUADSPI_BK1_IO1 PI10
QUADSPI_BK1_IO2 PI9
QUADSPI_BK1_IO3 PH8
QUADSPI_CLK PI6
QUADSPI_BK1_NCS PG12