MB9EF126.JLinkScript 33 KB

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  1. /*****************************************************************************/
  2. /* (C) Fujitsu Semiconductor Europe GmbH (FSEU) */
  3. /* */
  4. /* The following software deliverable is intended for and must only be */
  5. /* used for reference and in an evaluation laboratory environment. */
  6. /* It is provided on an as-is basis without charge and is subject to */
  7. /* alterations. */
  8. /* It is the user's obligation to fully test the software in its */
  9. /* environment and to ensure proper functionality, qualification and */
  10. /* compliance with component specifications. */
  11. /* */
  12. /* In the event the software deliverable includes the use of open */
  13. /* source components, the provisions of the governing open source */
  14. /* license agreement shall apply with respect to such software */
  15. /* deliverable. */
  16. /* FSEU does not warrant that the deliverables do not infringe any */
  17. /* third party intellectual property right (IPR). In the event that */
  18. /* the deliverables infringe a third party IPR it is the sole */
  19. /* responsibility of the customer to obtain necessary licenses to */
  20. /* continue the usage of the deliverable. */
  21. /* */
  22. /* To the maximum extent permitted by applicable law FSEU disclaims all */
  23. /* warranties, whether express or implied, in particular, but not */
  24. /* limited to, warranties of merchantability and fitness for a */
  25. /* particular purpose for which the deliverable is not designated. */
  26. /* */
  27. /* To the maximum extent permitted by applicable law, FSEU's liability */
  28. /* is restricted to intentional misconduct and gross negligence. */
  29. /* FSEU is not liable for consequential damages. */
  30. /* */
  31. /* (V1.5) */
  32. /*****************************************************************************/
  33. /** \file Default.JLinkScript
  34. **
  35. **
  36. ** History:
  37. ** - 2012-09-07 1.00 ZWu Initial version for Fujitsu MB9EF126
  38. **
  39. *****************************************************************************/
  40. /*****************************************************************************
  41. * For further information refer to the following documents:
  42. *
  43. * - "ARM Debug Interface v5 Architecture Specification"
  44. * ARM: IHI0031A_ARM_debug_interface_v5.pdf
  45. * - "Cortex-R4 and Cortex-R4F (Revision r1p3) Technical Reference Manual"
  46. * ARM: DDI0363E_cortexr4_r1p3_trm.pdf
  47. * - "J-Link / J-Trace User Guide"
  48. * SEGGER: UM08001_JLink.pdf
  49. *
  50. *****************************************************************************/
  51. // ###################################################################
  52. // H E L P E R F U N C T I O N S
  53. // ###################################################################
  54. /*********************************************************************
  55. *
  56. * _SelDP
  57. *
  58. * Selects the Debug Port register set as the DR scan chain
  59. */
  60. void _SelDP(void)
  61. {
  62. JTAG_StoreIR(0xa); // Updates Instruction Register scan chain
  63. JTAG_StoreClocks(1); // Transition from "Update-IR" to "Run-Test/Idle" state of Debug TAP
  64. }
  65. /*********************************************************************
  66. *
  67. * _SelAP
  68. *
  69. * Selects the Access Port register set as the DR scan chain
  70. */
  71. void _SelAP(void)
  72. {
  73. JTAG_StoreIR(0xb); // Updates Instruction Register scan chain
  74. JTAG_StoreClocks(1); // Transition from "Update-IR" to "Run-Test/Idle" state of Debug TAP
  75. }
  76. /*********************************************************************
  77. *
  78. * _StoreTriggerReadAPDPReg
  79. *
  80. * Function description
  81. * Triggers a read of an AP or DP register. Depends on the previous command (DPACC / APACC)
  82. */
  83. int _StoreTriggerReadAPDPReg(unsigned int RegIndex) {
  84. U32 v;
  85. int BitPos;
  86. //
  87. // Write 35 bits (32 bits data, 2 bits addr, 1 bit RnW)
  88. //
  89. v = 1; // 1 indicates read access
  90. v |= (RegIndex << 1);
  91. JLINK_JTAG_StartDR();
  92. BitPos = JLINK_JTAG_WriteDRCont(v, 3);
  93. v = 0;
  94. JLINK_JTAG_WriteDREnd(v, 32);
  95. JTAG_StoreClocks(8);
  96. return BitPos;
  97. }
  98. /*********************************************************************
  99. *
  100. * _StoreWriteAPDPReg
  101. *
  102. * Function description
  103. * Writes an AP or DP register. Depends on the previous command (DPACC / APACC)
  104. */
  105. int _StoreWriteAPDPReg(unsigned int RegIndex, U32 Data) {
  106. U32 v;
  107. int BitPos;
  108. //
  109. // Write 35 bits (32 bits data, 2 bits addr, 1 bit RnW)
  110. //
  111. v = 0; // 0 indicates write access
  112. v |= (RegIndex << 1);
  113. JLINK_JTAG_StartDR();
  114. BitPos = JLINK_JTAG_WriteDRCont(v, 3);
  115. v = Data;
  116. JLINK_JTAG_WriteDREnd(v, 32);
  117. JTAG_StoreClocks(8);
  118. return BitPos;
  119. }
  120. /*********************************************************************
  121. *
  122. * _GetReadData
  123. *
  124. * Returns the actual 32-bit read data from the specified register.
  125. * In order to get the wanted read data, a further action must be done
  126. * after the actual read access to shift the read data out of the scan
  127. * chain. This is done by reading the RDBUFF register in the DP which
  128. * is intended for this use case (a read to this register returns 0 and
  129. * has no side effects on the system)
  130. *
  131. * Parameter:
  132. * - u32RegIndex: 0-3 (selects which of the 4 registers shall be read)
  133. * - cSelectApOnReturn: If 0, DP is selected when function returns
  134. * otherwise AP will be selected. Since no
  135. * global variables are supported by JLinkScript
  136. * the state cannot be restored in another way...
  137. *
  138. * Return value:
  139. * - u32Data: Read data
  140. */
  141. unsigned int _GetReadData(unsigned int u32RegIndex, char cSelectApOnReturn)
  142. {
  143. unsigned int u32Data;
  144. unsigned int u32BitPosData;
  145. // Trigger read to move wanted data in the DR scan chain
  146. _StoreTriggerReadAPDPReg(u32RegIndex);
  147. // Trigger read from RDBUFF register to shift out the wanted read data
  148. _SelDP();
  149. u32BitPosData = _StoreTriggerReadAPDPReg(3);
  150. u32Data = JTAG_GetU32(u32BitPosData + 3);
  151. if (cSelectApOnReturn != 0)
  152. {
  153. _SelAP();
  154. }
  155. return u32Data;
  156. }
  157. /*********************************************************************
  158. *
  159. * _WriteViaAhb
  160. *
  161. * Writes to the MCU via the AHB-AP
  162. *
  163. * Parameter:
  164. * - u32Address: Address for write action (as required by AHB master)
  165. * - u32Data: Data that shall be written
  166. */
  167. void _WriteViaAhb(unsigned int u32Address, unsigned int u32Data)
  168. {
  169. _SelDP();
  170. _StoreWriteAPDPReg(2, 0x00000000); // Bank 0x0 of AHB-AP (0x00) selected
  171. _SelAP();
  172. _StoreWriteAPDPReg(1, u32Address); // Set TAR register of AP
  173. _StoreWriteAPDPReg(3, u32Data); // Write via DRW register of AP
  174. }
  175. /*********************************************************************
  176. *
  177. * _ReadViaAhb
  178. *
  179. * Reads from the MCU via the AHB-AP
  180. *
  181. * Parameter:
  182. * - u32Address: Address for read action (as required by AHB master)
  183. *
  184. * Return value:
  185. * - u32Data: Data that has been read
  186. */
  187. unsigned int _ReadViaAhb(unsigned int u32Address)
  188. {
  189. unsigned int u32Data;
  190. _SelDP();
  191. _StoreWriteAPDPReg(2, 0x00000000); // Bank 0x0 of AHB-AP (0x00) selected
  192. _SelAP();
  193. _StoreWriteAPDPReg(1, u32Address); // Set TAR register of AP
  194. u32Data = _GetReadData(3, 0); // Read via DRW register of AP
  195. return u32Data;
  196. }
  197. /*********************************************************************
  198. *
  199. * _WriteViaApb
  200. *
  201. * Writes to the MCU via the APB-AP
  202. *
  203. * Parameter:
  204. * - u32Address: Address for write action (as required by APB master)
  205. * - u32Data: Data that shall be written
  206. */
  207. void _WriteViaApb(unsigned int u32Address, unsigned int u32Data)
  208. {
  209. _SelDP();
  210. _StoreWriteAPDPReg(2, 0x01000000); // Bank 0x0 of APB-AP (0x01) selected
  211. _SelAP();
  212. _StoreWriteAPDPReg(1, u32Address); // Set TAR register of AP
  213. _StoreWriteAPDPReg(3, u32Data); // Write via DRW register of AP
  214. }
  215. /*********************************************************************
  216. *
  217. * _ReadViaApb
  218. *
  219. * Reads from the MCU via the APB-AP
  220. *
  221. * Parameter:
  222. * - u32Address: Address for read action (as required by APB master)
  223. *
  224. * Return value:
  225. * - u32Data: Data that has been read
  226. */
  227. unsigned int _ReadViaApb(unsigned int u32Address)
  228. {
  229. unsigned int u32Data;
  230. _SelDP();
  231. _StoreWriteAPDPReg(2, 0x01000000); // Bank 0x0 of APB-AP (0x01) selected
  232. _SelAP();
  233. _StoreWriteAPDPReg(1, u32Address); // Set TAR register of AP
  234. u32Data = _GetReadData(3, 0); // Read via DRW register of AP
  235. return u32Data;
  236. }
  237. /*********************************************************************
  238. *
  239. * _GetAndClearStickyError
  240. *
  241. * Checks if an error occurred after the last invocation of this function
  242. * This means the function can be called after several read/write actions
  243. * to check if this group of actions has been processed successfully
  244. *
  245. * Return value:
  246. * - cStickyErrorFlag: 0 if no sticky error has occurred otherwise 1
  247. */
  248. char _GetAndClearStickyError(void)
  249. {
  250. unsigned int u32Data;
  251. char cStickyErrorFlag;
  252. _SelDP();
  253. u32Data = _GetReadData(1, 0);
  254. // Clear only Sticky Error Flag ('1' clears sticky flags)
  255. _StoreWriteAPDPReg(1, ((u32Data & 0xffffffcd) | 0x20));
  256. if((u32Data & 0x20) == 0)
  257. {
  258. cStickyErrorFlag = 0;
  259. }
  260. else
  261. {
  262. cStickyErrorFlag = 1;
  263. }
  264. return cStickyErrorFlag;
  265. }
  266. // ###################################################################
  267. // U S E R F U N C T I O N S
  268. // ###################################################################
  269. /*********************************************************************
  270. *
  271. * ResetJtag
  272. *
  273. * Resets the JTAG (and hence debug logic) for the specified time (ms)
  274. * by asserting nTRST pin
  275. *
  276. * Parameter:
  277. * - u32ResetDuration: Time in [ms] the reset signal is asserted
  278. */
  279. void ResetJtag(unsigned int u32ResetDuration)
  280. {
  281. JTAG_TRSTPin = 0;
  282. SYS_Sleep(u32ResetDuration);
  283. JTAG_TRSTPin = 1;
  284. Report("--- FSEU script --- JTAG reset");
  285. }
  286. /*********************************************************************
  287. *
  288. * ResetMcu
  289. *
  290. * Resets the MCU for the specified time (ms) via JTAG connector pin 15
  291. *
  292. * Parameter:
  293. * - u32ResetDuration: Time in [ms] the reset signal is asserted
  294. */
  295. void ResetMcu(unsigned int u32ResetDuration)
  296. {
  297. JTAG_ResetPin = 0;
  298. SYS_Sleep(u32ResetDuration);
  299. JTAG_ResetPin = 1;
  300. Report("--- FSEU script --- MCU reset");
  301. }
  302. /*********************************************************************
  303. *
  304. * ResetAllAndSetDebuggerConnectedFlag
  305. *
  306. * Resets the MCU via JTAG connector pin 15 and the JTAG via nTRST pin
  307. * Outputs >= 16 TCK clock cycles so that SYSC_JTAGDETECT_DBGCON is set.
  308. * It is used by the BootROM as the criteria for enabling the debugger
  309. * wait time before branching to application (if not disabled by Flash
  310. * marker setting in Boot Description Record)
  311. * SYSC_JTAGDETECT_DBGCON will only be reset by JTAG nTRST and not by
  312. * any MCU hard reset. Therefore, this clocking is only required once
  313. * during initialisation.
  314. *
  315. * TMS signal is 0 while JTAG_WriteClocks() outputs clock cycles
  316. * As the Debug TAP state machine is reset by nTRST assertion, this
  317. * also ensures that the Debug TAP state machine transitions to and
  318. * stays in "Run-Test/Idle" state. Other functions in this file
  319. * require that the Debug TAP state machine is in "Run-Test/Idle"
  320. * before calling them
  321. *
  322. *
  323. * RSTx --_________________________________ ... ________________---
  324. * nTRST ----__----------------------------- ... -------------------
  325. * TCK --------|_|-|_|-|_|-|_|-|_|-|_|-|_| ... -|_|-|_|-----------
  326. * TMS ___________________________________________________________
  327. */
  328. void ResetAllAndSetDebuggerConnectedFlag()
  329. {
  330. JTAG_ResetPin = 0;
  331. JTAG_TRSTPin = 0;
  332. SYS_Sleep(1);
  333. JTAG_TRSTPin = 1;
  334. JTAG_WriteClocks(20);
  335. JTAG_ResetPin = 1;
  336. Report("--- FSEU script --- MCU & JTAG reset, SYSC_JTAGDETECT_DBGCON should be set now");
  337. }
  338. /*********************************************************************
  339. *
  340. * GetId
  341. *
  342. * Selects and reads the Debug TAP IDCODE scan chain
  343. */
  344. void GetId(void)
  345. {
  346. unsigned int u32BitPos;
  347. unsigned int u32Value;
  348. // Select the IDCODE register for the DR scan chain
  349. JTAG_StoreIR(0x0E);
  350. JTAG_StoreClocks(1);
  351. // Read ID
  352. u32Value = 0;
  353. u32BitPos = JTAG_StoreDR(u32Value, 32);
  354. JTAG_WriteClocks(1);
  355. u32Value = JTAG_GetU32(u32BitPos);
  356. if(u32Value == 0x4ba00477)
  357. {
  358. Report("--- FSEU script --- OK: ARM JTAG-DP detected (JTAG IDCODE: 0x4ba00477)");
  359. }
  360. else
  361. {
  362. // Report1("--- FSEU script --- ERROR: JTAG IDCODE unknown -> ",u32Value);
  363. }
  364. }
  365. /*********************************************************************
  366. *
  367. * PowerUpDebugPort
  368. *
  369. * Sets the "power request bits" (CSYSPWRUPREQ, CDBGPWRUPREQ) in the
  370. * DP CTRL/STAT register and waits for their acknowledgement.
  371. *
  372. * Return value:
  373. * - cError: 0 if power-up was successful otherwise 1
  374. */
  375. char PowerUpDebugPort(void)
  376. {
  377. char cBreak;
  378. char cError;
  379. unsigned int u32ReadData;
  380. unsigned int u32TimeOut;
  381. // Set CxxxPWRUPREQ bits and also clear sticky error flags, enable overrun detection
  382. _SelDP();
  383. _StoreWriteAPDPReg(1, 0x50000033);
  384. u32TimeOut = 100;
  385. cBreak = 0;
  386. while(cBreak == 0)
  387. {
  388. u32TimeOut -= 1;
  389. u32ReadData = _GetReadData(1, 0);
  390. // Check if CxxxPWRUPREQ and CxxxPWRUPACK bits are set
  391. if ((u32ReadData >> 28) == 0xf)
  392. {
  393. cBreak = 1;
  394. cError = 0;
  395. Report("--- FSEU script --- OK: Debug port powered up");
  396. }
  397. else if (u32TimeOut == 0)
  398. {
  399. cBreak = 1;
  400. cError = 1;
  401. Report("--- FSEU script --- ERROR: Could not power up debug port (time-out reached)!");
  402. }
  403. }
  404. return cError;
  405. }
  406. /*********************************************************************
  407. *
  408. * InitAccessPorts
  409. *
  410. * Initializes APB and AHB Access Port registers to their default value.
  411. * These registers may be in an unknown state because they are not
  412. * reset by an MCU hard reset. But the functions in here may rely on a
  413. * defined state...
  414. */
  415. void InitAccessPorts(void)
  416. {
  417. // AHB Access Port
  418. // ---------------
  419. _SelDP();
  420. // Write DP APSEL register: Bank 0x0 of AHB-AP (AP-ID: 0x00) selected
  421. _StoreWriteAPDPReg(2, 0x00000000);
  422. _SelAP();
  423. _StoreWriteAPDPReg(0, 0x43000002); // Write CSW register of AHB-AP
  424. // APB Access Port
  425. // ---------------
  426. _SelDP();
  427. // Write DP APSEL register: Bank 0x0 of APB-AP (AP-ID: 0x01) selected
  428. _StoreWriteAPDPReg(2, 0x01000000);
  429. _SelAP();
  430. _StoreWriteAPDPReg(0, 0x80000002); // Write CSW register of APB-AP
  431. }
  432. /*********************************************************************
  433. *
  434. * ReportStat2Value
  435. *
  436. * Reports the current value of SCCFG_STAT2 register
  437. *
  438. * Return value:
  439. * - cError: 0 if SCCFG_STAT2 could be read successful otherwise 1
  440. */
  441. char ReportStat2Value(void)
  442. {
  443. unsigned int u32SccfgStat2AddressApb;
  444. unsigned int u32SccfgStat2Value;
  445. char cError;
  446. cError = 0;
  447. // Addresses as required for access via APB-AP
  448. u32SccfgStat2AddressApb = 0x0000f180;
  449. _GetAndClearStickyError();
  450. u32SccfgStat2Value = _ReadViaApb(u32SccfgStat2AddressApb);
  451. if(_GetAndClearStickyError() == 1)
  452. {
  453. cError = 1;
  454. Report("--- FSEU script --- ERROR: Reading SCCFG_STAT2 caused the StickyError flag to be set!");
  455. }
  456. else
  457. {
  458. // Report1("--- FSEU script --- SCCFG_STAT2 = ", u32SccfgStat2Value);
  459. }
  460. return cError;
  461. }
  462. /*********************************************************************
  463. *
  464. * ReportGpreg1Value
  465. *
  466. * Reports the current value of SCCFG_GPREG1 register which contains
  467. * further BootROM status information (if not overwritten by user
  468. * application)
  469. *
  470. * Return value:
  471. * - cError: 0 if SCCFG_GPREG1 could be read successful otherwise 1
  472. */
  473. char ReportGpreg1Value(void)
  474. {
  475. unsigned int u32SccfgGpreg1AddressApb;
  476. unsigned int u32SccfgGpreg1Value;
  477. char cError;
  478. cError = 0;
  479. // Addresses as required for access via APB-AP
  480. u32SccfgGpreg1AddressApb = 0x0000f1ac;
  481. _GetAndClearStickyError();
  482. u32SccfgGpreg1Value = _ReadViaApb(u32SccfgGpreg1AddressApb);
  483. if(_GetAndClearStickyError() == 1)
  484. {
  485. cError = 1;
  486. Report("--- FSEU script --- ERROR: Reading SCCFG_GPREG1 caused the StickyError flag to be set!");
  487. }
  488. else
  489. {
  490. // Report1("--- FSEU script --- SCCFG_GPREG1 = ", u32SccfgGpreg1Value);
  491. }
  492. return cError;
  493. }
  494. /*********************************************************************
  495. *
  496. * UnlockDevice
  497. *
  498. * If the MCU is secured, the passed security key will be entered
  499. * in the Security Checker module to unlock the MCU.
  500. * Otherwise this step is skipped
  501. *
  502. * Note: Security key can be entered at any time, the result of key
  503. * entering will be available after SCCFG_STAT2_DBGRDY is set.
  504. *
  505. * Parameter:
  506. * - u32KeyBytes0_3: Part of the key for register SCCFG_SECKEY0
  507. * - u32KeyBytes4_7: Part of the key for register SCCFG_SECKEY1
  508. * - u32KeyBytes8_11: Part of the key for register SCCFG_SECKEY2
  509. * - u32KeyBytes12_15: Part of the key for register SCCFG_SECKEY3
  510. *
  511. * Return value:
  512. * - cError: 0 if unlocking was successful otherwise 1
  513. */
  514. char UnlockDevice(unsigned int u32KeyBytes0_3, unsigned int u32KeyBytes4_7, unsigned int u32KeyBytes8_11, unsigned int u32KeyBytes12_15)
  515. {
  516. char cError;
  517. unsigned int u32SccfgStat2Value;
  518. unsigned int u32SccfgStat2AddressApb;
  519. unsigned int u32SccfgUnlckAddressApb;
  520. unsigned int u32SccfgSeckey0AddressApb;
  521. unsigned int u32RegisterUnlockKey;
  522. unsigned int u32RegisterLockKey;
  523. unsigned int u32SccfgGpreg1AddressApb;
  524. unsigned int u32SccfgGpreg1Value;
  525. cError = 0;
  526. // Addresses as required for access via APB-AP
  527. u32SccfgStat2AddressApb = 0x0000f180;
  528. u32SccfgSeckey0AddressApb = 0x0000f190;
  529. u32SccfgUnlckAddressApb = 0x0000f1a4;
  530. u32SccfgGpreg1AddressApb = 0x0000f1ac;
  531. // Security Checker Register Unlock/Lock Keys
  532. u32RegisterUnlockKey = 0x5ecacce5;
  533. u32RegisterLockKey = 0xa135331a;
  534. ReportStat2Value();
  535. _GetAndClearStickyError();
  536. // Check if security is enabled at all
  537. u32SccfgStat2Value = _ReadViaApb(u32SccfgStat2AddressApb);
  538. if((u32SccfgStat2Value & 0x1) == 0)
  539. {
  540. cError = 0;
  541. Report("--- FSEU script --- OK: MCU is unsecured");
  542. }
  543. else
  544. {
  545. // Unlock SCCFG registers
  546. _WriteViaApb(u32SccfgUnlckAddressApb, u32RegisterUnlockKey);
  547. // Enter security key
  548. _WriteViaApb(u32SccfgSeckey0AddressApb , u32KeyBytes0_3);
  549. _WriteViaApb(u32SccfgSeckey0AddressApb + 0x4, u32KeyBytes4_7);
  550. _WriteViaApb(u32SccfgSeckey0AddressApb + 0x8, u32KeyBytes8_11);
  551. _WriteViaApb(u32SccfgSeckey0AddressApb + 0xc, u32KeyBytes12_15);
  552. // Lock SCCFG registers again
  553. _WriteViaApb(u32SccfgUnlckAddressApb, u32RegisterLockKey);
  554. // Read SCCFG_STAT2 and SCCFG_GPREG1 to check for success
  555. u32SccfgStat2Value = _ReadViaApb(u32SccfgStat2AddressApb);
  556. u32SccfgGpreg1Value = _ReadViaApb(u32SccfgGpreg1AddressApb);
  557. if(_GetAndClearStickyError() != 0)
  558. {
  559. cError = 1;
  560. Report("--- FSEU script --- ERROR: Trying to unlock the MCU caused the StickyError flag to be set!");
  561. }
  562. else if((u32SccfgStat2Value & 0xff) == 0x03)
  563. {
  564. cError = 1;
  565. Report("--- FSEU script --- ERROR: Invalid security key entered!");
  566. }
  567. else if((u32SccfgStat2Value & 0xff) == 0x01) // This SCCFG_STAT2 value is ambiguous...
  568. {
  569. // SCCFG_GPREG1 contains further BootROM status information (if not overwritten by user application)
  570. // Check if both primary and secondary configurations of Main Security Description Record are invalid
  571. if((u32SccfgGpreg1Value & 0x70000000) == 0x50000000)
  572. {
  573. cError = 1;
  574. Report("--- FSEU script --- ERROR: Invalid Main Security Description Record!");
  575. }
  576. else
  577. {
  578. cError = 0;
  579. Report("--- FSEU script --- OK: Correct security key entered, MCU unlocked");
  580. }
  581. }
  582. else // is probably never reached
  583. {
  584. cError = 1;
  585. Report("--- FSEU script --- ERROR: Device still secured");
  586. }
  587. ReportStat2Value();
  588. ReportGpreg1Value();
  589. }
  590. return cError;
  591. }
  592. /*********************************************************************
  593. *
  594. * WaitForDebugReady
  595. *
  596. * Waits until the BootROM has set the DBGRDY bit in SCCFG_STAT2
  597. * that indicates the point of time when security has been evaluated
  598. * (if a key has already been entered) or for an unsecured device it
  599. * indicates that all busses (APB, AHB) can now be fully accessed.
  600. *
  601. * Return value:
  602. * - cError: 0 if SCCFG_STAT2_DBGRDY could be read and is set
  603. * otherwise 1
  604. */
  605. char WaitForDebugReady(void)
  606. {
  607. unsigned int u32TimeOut;
  608. unsigned int u32SccfgStat2AddressApb;
  609. unsigned int u32SccfgStat2Value;
  610. char cError;
  611. char cBreak;
  612. cError = 0;
  613. // Addresses as required for access via APB-AP
  614. u32SccfgStat2AddressApb = 0x0000f180;
  615. u32TimeOut = 10000;
  616. cBreak = 0;
  617. while(cBreak == 0)
  618. {
  619. u32TimeOut -= 1;
  620. u32SccfgStat2Value = _ReadViaApb(u32SccfgStat2AddressApb);
  621. if(_GetAndClearStickyError() == 1)
  622. {
  623. cBreak = 1;
  624. cError = 1;
  625. Report("--- FSEU script --- ERROR: Reading SCCFG_STAT2 caused the StickyError flag to be set!");
  626. }
  627. else if ((u32SccfgStat2Value & 0x100) != 0) // Check for SCCFG_STAT2_DBGRDY
  628. {
  629. cBreak = 1;
  630. cError = 0;
  631. Report("--- FSEU script --- OK: SCCFG_STAT2_DBGRDY is set, whole MCU can now be accessed (if unsecured))");
  632. }
  633. else if (u32TimeOut == 0)
  634. {
  635. cBreak = 1;
  636. cError = 1;
  637. Report("--- FSEU script --- ERROR: Canceled waiting for SCCFG_STAT2_DBGRDY (time-out reached)!");
  638. }
  639. }
  640. return cError;
  641. }
  642. /*********************************************************************
  643. *
  644. * HaltCore
  645. *
  646. * Sets a request to halt the core (enter debug state) by setting
  647. * core debug register DRCR bit 0 and checks if halted by reading
  648. * the corresponding status register
  649. *
  650. * Return value:
  651. * - cError: 0 if Core Halt Request was successful otherwise 1
  652. */
  653. char HaltCore(void)
  654. {
  655. char cError;
  656. char cBreak;
  657. unsigned int u32TimeOut;
  658. unsigned int u32ReadData;
  659. unsigned int u32LockAccessRegisterAddressApb;
  660. unsigned int u32DebugRunControlRegisterAddressApb;
  661. unsigned int u32DebugStatusControlRegisterAddressApb;
  662. unsigned int u32UnlockKey;
  663. unsigned int u32LockKey;
  664. cError = 0;
  665. // Addresses as required for access via APB-AP
  666. u32LockAccessRegisterAddressApb = 0x00001fb0;
  667. u32DebugRunControlRegisterAddressApb = 0x00001090;
  668. u32DebugStatusControlRegisterAddressApb = 0x00001088;
  669. // Core Debug Register Unlock Key
  670. u32UnlockKey = 0xc5acce55;
  671. u32LockKey = 0x00000000;
  672. _GetAndClearStickyError();
  673. // Unlock debug registers
  674. _WriteViaApb(u32LockAccessRegisterAddressApb, u32UnlockKey);
  675. // Set Halt Request
  676. _WriteViaApb(u32DebugRunControlRegisterAddressApb, 0x00000001);
  677. // Lock debug registers again
  678. _WriteViaApb(u32LockAccessRegisterAddressApb, u32LockKey);
  679. if(_GetAndClearStickyError() != 0)
  680. {
  681. cError = 1;
  682. Report("--- FSEU script --- ERROR: Trying to halt the Core caused the StickyError flag to be set!");
  683. }
  684. // Only proceed if previous step was successful
  685. if(cError == 0)
  686. {
  687. _GetAndClearStickyError();
  688. // Wait until Core halted
  689. u32TimeOut = 100;
  690. cBreak = 0;
  691. while(cBreak == 0)
  692. {
  693. u32TimeOut -= 1;
  694. u32ReadData = _ReadViaApb(u32DebugStatusControlRegisterAddressApb);
  695. if(_GetAndClearStickyError() == 1)
  696. {
  697. cBreak = 1;
  698. cError = 1;
  699. Report("--- FSEU script --- ERROR: Reading Debug Status & Control register caused the StickyError flag to be set!");
  700. }
  701. else if ((u32ReadData & 0x1) != 0) // Check if core is halted
  702. {
  703. cBreak = 1;
  704. cError = 0;
  705. Report("--- FSEU script --- OK: Core is halted now");
  706. }
  707. else if (u32TimeOut == 0)
  708. {
  709. cBreak = 1;
  710. cError = 1;
  711. Report("--- FSEU script --- ERROR: Core could not be halted (time-out reached)!");
  712. }
  713. }
  714. }
  715. return cError;
  716. }
  717. /*********************************************************************
  718. *
  719. * DisableWatchdog
  720. *
  721. * Disables Watchdog permanently (WDG_CFG_WD_EN_RUN = 0 and
  722. * WDG_CFG_WD_EN_PSS = 0) or only in debug state (WDG_CFG_DEBUG_EN = 1)
  723. * depending on the specified parameter.
  724. * Afterwards the Watchdog configuration is locked (WDG_CFG_LOCK = 1)
  725. *
  726. * Parameter:
  727. * - cOnlyInDebugState: 0: Disable WDG permanently
  728. * 1 (or other): Disable WDG only in debug (break) state
  729. *
  730. * Return value:
  731. * - cError: 0 if WDG configuration was successful otherwise 1
  732. */
  733. char DisableWatchdog(char cOnlyInDebugState)
  734. {
  735. char cError;
  736. unsigned int u32RegisterProtectionKey;
  737. unsigned int u32WdgCfgBeforeConfiguration;
  738. unsigned int u32WdgCfgAfterConfiguration;
  739. unsigned int u32WdgProtAddressAhb;
  740. unsigned int u32WdgCfgAddressAhb;
  741. unsigned int u32WdgCfgRegisterValue;
  742. cError = 0;
  743. // WDG register addresses (AHB)
  744. u32WdgProtAddressAhb = 0xb0608000;
  745. u32WdgCfgAddressAhb = 0xb0608048;
  746. // WDG register protection key
  747. u32RegisterProtectionKey = 0xedacce55;
  748. // Read - modify - write WDG_CFG register
  749. _GetAndClearStickyError();
  750. u32WdgCfgBeforeConfiguration = _ReadViaAhb(u32WdgCfgAddressAhb);
  751. if(0 == cOnlyInDebugState)
  752. { // Clear WD_EN_RUN, WD_EN_PSS Set LOCK
  753. u32WdgCfgRegisterValue = (u32WdgCfgBeforeConfiguration & 0xfffffffc) | 0x01000000;
  754. }
  755. else
  756. { // Set LOCK and DEBUG_EN
  757. u32WdgCfgRegisterValue = u32WdgCfgBeforeConfiguration | 0x01000008;
  758. }
  759. _WriteViaAhb(u32WdgProtAddressAhb, u32RegisterProtectionKey);
  760. _WriteViaAhb(u32WdgCfgAddressAhb, u32WdgCfgRegisterValue);
  761. u32WdgCfgAfterConfiguration = _ReadViaAhb(u32WdgCfgAddressAhb);
  762. if(_GetAndClearStickyError() != 0)
  763. {
  764. cError = 1;
  765. Report("--- FSEU script --- ERROR: Accessing Watchdog registers caused the StickyError flag to be set!");
  766. }
  767. else if(u32WdgCfgAfterConfiguration != u32WdgCfgRegisterValue)
  768. {
  769. cError = 1;
  770. Report("--- FSEU script --- ERROR: Watchdog configuration could not be changed!");
  771. }
  772. else
  773. {
  774. cError = 0;
  775. Report("--- FSEU script --- OK: Watchdog configured");
  776. }
  777. // Debug
  778. // Report1("WDG_CFG before change: ", u32WdgCfgBeforeConfiguration);
  779. // Report1("WDG_CFG after change: ", u32WdgCfgAfterConfiguration);
  780. return cError;
  781. }
  782. /*********************************************************************
  783. *
  784. * SetSysRamWaitCycles
  785. *
  786. * Write SYSRAM read/wait cycles to 0 (for debugging from SYSRAM) to
  787. * prevent changing of wait cycles during code execution from SYSRAM
  788. *
  789. * Return value:
  790. * - cError: 0 if it was successful otherwise 1
  791. */
  792. char SetSysRamWaitCycles(void)
  793. {
  794. char cError;
  795. unsigned int u32RegisterUnlockKey;
  796. unsigned int u32RegisterLockKey;
  797. unsigned int u32SrcfgCfg0AfterConfiguration;
  798. unsigned int u32SrcfgCfg0AddressAhb;
  799. unsigned int u32SrcfgKeyAddressAhb;
  800. cError = 0;
  801. // SRCFG register addresses (AHB)
  802. u32SrcfgCfg0AddressAhb = 0xb0d00000;
  803. u32SrcfgKeyAddressAhb = 0xb0d0000c;
  804. // SRCFG register lock/unlock key
  805. u32RegisterUnlockKey = 0x5ecc551f;
  806. u32RegisterLockKey = 0x551fb10c;
  807. _GetAndClearStickyError();
  808. _WriteViaAhb(u32SrcfgKeyAddressAhb, u32RegisterUnlockKey); // Unlock SRCFG registers
  809. _WriteViaAhb(u32SrcfgCfg0AddressAhb, 0x00000000); // Set 0 to RDWAIT and WRWAIT in SRCFG
  810. _WriteViaAhb(u32SrcfgKeyAddressAhb, u32RegisterLockKey); // Lock SRCFG registers again
  811. u32SrcfgCfg0AfterConfiguration = _ReadViaAhb(u32SrcfgCfg0AddressAhb); // Read back
  812. if(_GetAndClearStickyError() != 0)
  813. {
  814. cError = 1;
  815. Report("--- FSEU script --- ERROR: Trying to change System RAM wait cycles caused the StickyError flag to be set!");
  816. }
  817. else if((u32SrcfgCfg0AfterConfiguration & 0x03030000) == 0)
  818. {
  819. cError = 0;
  820. Report("--- FSEU script --- OK: System RAM wait cycles changed");
  821. }
  822. else
  823. {
  824. cError = 1;
  825. Report("--- FSEU script --- ERROR: System RAM wait cycles could not be changed!");
  826. }
  827. // Debug
  828. // Report1("SRCFG_CFG0 after change: ", u32SrcfgCfg0AfterConfiguration);
  829. return cError;
  830. }
  831. /*********************************************************************
  832. *
  833. * ExecuteInitSequence
  834. *
  835. * Executes the functions in the correct order that are required after
  836. * every reset.
  837. */
  838. void ExecuteInitSequence(void)
  839. {
  840. GetId();
  841. WaitForDebugReady();
  842. // Pass the security key here if the MCU is secured, otherwise key values are "don't care"
  843. UnlockDevice(0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff);
  844. HaltCore();
  845. DisableWatchdog(0);
  846. SetSysRamWaitCycles(); // only required if "debug_sysram" build configuration is selected
  847. }
  848. // ###################################################################
  849. // S E G G E R C A L L B A C K F U N C T I O N S
  850. // ###################################################################
  851. /*********************************************************************
  852. *
  853. * ResetTarget
  854. *
  855. * Standard/Pre-defined SEGGER function that replaces
  856. * the reset functionality of the DLL/J-Link.
  857. */
  858. void ResetTarget(void)
  859. {
  860. Report("--- FSEU script --- ResetTarget() from JLinkScript is executed");
  861. ResetMcu(1);
  862. // Adaption to customer hardware may be required
  863. SYS_Sleep(300); // Mandatory only for starterkit SK-MB9EF120-001, can be removed if used with other FSEU starterkits
  864. ExecuteInitSequence();
  865. }
  866. /*********************************************************************
  867. *
  868. * InitTarget
  869. *
  870. * Standard/Pre-defined SEGGER function that replaces the auto-detection
  871. * capability of J-Link and allows to setup custom initialisation commands
  872. */
  873. void InitTarget(void)
  874. {
  875. //--------------------------------------------------------------------------------------------------
  876. JTAG_Speed = 1000;
  877. JTAG_DRPre = 0; // Number of devices closer to TDO than the device J-Link talks to
  878. JTAG_DRPost = 0; // Number of devices closer to TDI than the device J-Link talks to
  879. JTAG_IRPre = 0; // Total IRLen of all devices which are closer to TDO than the device J-Link talks to
  880. JTAG_IRPost = 0; // Total IRLen of all devices which are closer to TDI than the device J-Link talks to
  881. JTAG_IRLen = 4; // IRLen of Cortex-R4
  882. CPU = CORTEX_R4; // It is a Cortex-R4 core
  883. JTAG_AllowTAPReset = 1; // En-/Disables auto-JTAG-detection of J-Link. Has to be disabled for
  884. // devices which need some special init which is lost at a TAP reset.
  885. // Allowed values
  886. // - 0: Auto-detection is enabled.
  887. // - 1: Auto-detection is disabled.
  888. //--------------------------------------------------------------------------------------------------
  889. Report("--- FSEU script --- InitTarget() from JLinkScript is executed");
  890. //--------------------------------------------------------------------------------------------------
  891. // Following function is the correct reset flow, but it cannot be executed yet together with IAR
  892. // because pressing the reset button in IAR IDE will call both callbacks InitTarget() and ResetTarget()
  893. // which is a wrong behaviour and will be fixed by Segger in future J-Link driver version.
  894. // Problem occurs because InitTarget() would then assert a JTAG reset that destroys all debug settings
  895. //
  896. // ResetAllAndSetDebuggerConnectedFlag();
  897. //
  898. // Temporary workaround:
  899. JTAG_WriteClocks(20);
  900. ResetMcu(1);
  901. //--------------------------------------------------------------------------------------------------
  902. // Adaption to customer hardware may be required
  903. SYS_Sleep(300); // Mandatory only for starterkit SK-MB9EF120-001, can be removed if used with other FSEU starterkits
  904. PowerUpDebugPort();
  905. InitAccessPorts();
  906. ExecuteInitSequence();
  907. }