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- echo Setting up the environment for debugging gdb.\n
- set complaints 1
- set output-radix 16
- set input-radix 16
- set endian big
- dir .
- set prompt (netsilicon-gdb)
- # This connects to a target via netsiliconLibRemote
- # listening for commands on this PC's tcp port 2331
- target remote localhost:2331
- monitor speed 30
- # Set netSiliconLibRemote to write short/long values
- # in big-endian
- monitor endian big
- # Set GDB in big-endian
- set endian big
- # Reset the chip to get to a known state.
- monitor reset
- # NET50 INITIALIZATION VALUES
- # Set SCR for Big endian, full speed, 128 cycle Bus monitor
- monitor long 0xffb00000 = 0x4004a000
- # Set up port A to enable SDRAM fix on BGA Rev A development
- # board.
- monitor long 0xffb00020 = 0x00100000
- # Set up port C to enable SDRAM fix on Rev D development
- # board.
- monitor long 0xffb00028 = 0x00400000
- # Disable all interrupts
- monitor long 0xffb00030 = 0x00000000
- monitor long 0xffc00034 = 0x00000f04
- monitor long 0xffc00030 = 0x00000001
- # The debugger script must clear the valid bit in CS0BAR.
- # The ncc_init() routine looks at this bit to determine
- # whether the unit is running under control of a debugger.
- monitor long 0xffc00010 = 0x00000000
- # Setup DRAM refresh circuit
- monitor long 0xffc00000 = 0x0dc00000
- # Configure CS1 for 16 Megs of SDRAM
- monitor long 0xffc00024 = 0xf3000070
- monitor long 0xffc00020 = 0x0000022d
- # Disable CS2
- monitor long 0xffc00030 = 0x00000000
- monitor long 0xffc00034 = 0x00000000
- # Set PLL for 44 MHz
- monitor long 0xffb00008 = 0x09000e1e
- # Set the processor mode
- monitor reg cpsr = 0xd3
- # Setup GDB FOR FASTER DOWNLOADS
- set remote memory-write-packet-size 1024
- set remote memory-write-packet-size fixed
- monitor speed auto
- load image.elf
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