STM32_Prog_DB_0x436.xml 24 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x436</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32L15xxD/STM32L162xD</Name>
  9. <Series>STM32L1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD"/>
  14. <!-- Bootloader Interface -->
  15. <Interface name="Bootloader"/>
  16. </Configurations>
  17. <!-- Peripherals -->
  18. <Peripherals>
  19. <!-- Embedded SRAM -->
  20. <Peripheral>
  21. <Name>Embedded SRAM</Name>
  22. <Type>Storage</Type>
  23. <Description/>
  24. <ErasedValue>0x00</ErasedValue>
  25. <Access>RWE</Access>
  26. <!-- 48 KB -->
  27. <Configuration>
  28. <Parameters address="0x20000000" name="SRAM" size="0xC000"/>
  29. <Description/>
  30. <Organization>Single</Organization>
  31. <Bank name="Bank 1">
  32. <Field>
  33. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0xC000"/>
  34. </Field>
  35. </Bank>
  36. </Configuration>
  37. </Peripheral>
  38. <!-- Embedded Flash -->
  39. <Peripheral>
  40. <Name>Embedded Flash</Name>
  41. <Type>Storage</Type>
  42. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  43. <ErasedValue>0x00</ErasedValue>
  44. <Access>RWE</Access>
  45. <FlashSize address="0x1FF800CC" default="0x20000"/>
  46. <!-- 384KB dual Bank -->
  47. <Configuration>
  48. <Parameters address="0x08000000" name=" 384 Kbytes Embedded Flash" size="0x20000"/>
  49. <Description/>
  50. <Organization>Dual</Organization>
  51. <Allignement>0x4</Allignement>
  52. <Bank name="Bank 1">
  53. <Field>
  54. <Parameters address="0x08000000" name="sector0" occurence="0x300" size="0x100"/>
  55. </Field>
  56. </Bank>
  57. <Bank name="Bank 2">
  58. <Field>
  59. <Parameters address="0x08030000" name="sector768" occurence="0x300" size="0x100"/>
  60. </Field>
  61. </Bank>
  62. <Bank name="EEPROM1">
  63. <Field>
  64. <Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x1800"/>
  65. </Field>
  66. </Bank>
  67. <Bank name="EEPROM2">
  68. <Field>
  69. <Parameters address="0x08081800" name="sector65282" occurence="0x1" size="0x1800"/>
  70. </Field>
  71. </Bank>
  72. </Configuration>
  73. </Peripheral>
  74. <!-- Data EEPROM -->
  75. <Peripheral>
  76. <Name>Data EEPROM</Name>
  77. <Type>Storage</Type>
  78. <Description>The Data EEPROM memory block. It contains user data.</Description>
  79. <ErasedValue>0x00</ErasedValue>
  80. <Access>RWE</Access>
  81. <!-- 12KB dual Bank -->
  82. <Configuration>
  83. <Parameters address="0x08080000" name=" 12 Kbytes Data EEPROM" size="0x3000"/>
  84. <Description/>
  85. <Organization>Dual</Organization>
  86. <Allignement>0x4</Allignement>
  87. <Bank name="Bank 1">
  88. <Field>
  89. <Parameters address="0x08080000" name="EEPROM1" occurence="0x1" size="0x1800"/>
  90. </Field>
  91. </Bank>
  92. <Bank name="Bank 2">
  93. <Field>
  94. <Parameters address="0x08081800" name="EEPROM2" occurence="0x1" size="0x1800"/>
  95. </Field>
  96. </Bank>
  97. </Configuration>
  98. </Peripheral>
  99. <!-- Mirror Option Bytes -->
  100. <Peripheral>
  101. <Name>MirrorOptionBytes</Name>
  102. <Type>Storage</Type>
  103. <Description>Mirror Option Bytes contains the extra area.</Description>
  104. <ErasedValue>0xFF</ErasedValue>
  105. <Access>RW</Access>
  106. <!-- 32 Bytes single bank -->
  107. <Configuration>
  108. <Parameters address="0x1FF80000" name=" 32 Bytes Data MirrorOptionBytes" size="0x20"/>
  109. <Description/>
  110. <Organization>Single</Organization>
  111. <Allignement>0x4</Allignement>
  112. <Bank name="MirrorOptionBytes">
  113. <Field>
  114. <Parameters address="0x1FF80000" name="MirrorOptionBytes" occurence="0x1" size="0x20"/>
  115. </Field>
  116. </Bank>
  117. </Configuration>
  118. </Peripheral>
  119. <!-- Option Bytes -->
  120. <Peripheral>
  121. <Name>Option Bytes</Name>
  122. <Type>Configuration</Type>
  123. <Description/>
  124. <Access>RW</Access>
  125. <Bank interface="JTAG_SWD">
  126. <Parameters address="0x40023C1C" name="Bank 1" size="0x88"/>
  127. <Category>
  128. <Name>Read Out Protection</Name>
  129. <Field>
  130. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  131. <AssignedBits>
  132. <Bit>
  133. <Name>RDP</Name>
  134. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  135. <BitOffset>0x0</BitOffset>
  136. <BitWidth>0x8</BitWidth>
  137. <Access>R</Access>
  138. <Values>
  139. <Val value="0xAA">Level 0, no protection</Val>
  140. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  141. <Val value="0xCC">Level 2, chip protection</Val>
  142. </Values>
  143. </Bit>
  144. </AssignedBits>
  145. </Field>
  146. </Category>
  147. <Category>
  148. <Name>BOR Level</Name>
  149. <Field>
  150. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  151. <AssignedBits>
  152. <Bit>
  153. <Name>BOR_LEV</Name>
  154. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  155. <BitOffset>0x10</BitOffset>
  156. <BitWidth>0x4</BitWidth>
  157. <Access>R</Access>
  158. <Values>
  159. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  160. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  161. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  162. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  163. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  164. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  165. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  166. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  167. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  168. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  169. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  170. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  171. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  172. </Values>
  173. </Bit>
  174. </AssignedBits>
  175. </Field>
  176. </Category>
  177. <Category>
  178. <Name>User Configuration</Name>
  179. <Field>
  180. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  181. <AssignedBits>
  182. <Bit>
  183. <Name>IWDG_SW</Name>
  184. <Description/>
  185. <BitOffset>0x14</BitOffset>
  186. <BitWidth>0x1</BitWidth>
  187. <Access>R</Access>
  188. <Values>
  189. <Val value="0x0">Hardware independant watchdog</Val>
  190. <Val value="0x1">Software independant watchdog</Val>
  191. </Values>
  192. </Bit>
  193. <Bit>
  194. <Name>nRST_STOP</Name>
  195. <Description/>
  196. <BitOffset>0x15</BitOffset>
  197. <BitWidth>0x1</BitWidth>
  198. <Access>R</Access>
  199. <Values>
  200. <Val value="0x0">Reset generated when entering Stop mode</Val>
  201. <Val value="0x1">No reset generated</Val>
  202. </Values>
  203. </Bit>
  204. <Bit>
  205. <Name>nRST_STDBY</Name>
  206. <Description/>
  207. <BitOffset>0x16</BitOffset>
  208. <BitWidth>0x1</BitWidth>
  209. <Access>R</Access>
  210. <Values>
  211. <Val value="0x0">Reset generated when entering Standby mode</Val>
  212. <Val value="0x1">No reset generated</Val>
  213. </Values>
  214. </Bit>
  215. <Bit>
  216. <Name>nBFB2</Name>
  217. <Description/>
  218. <BitOffset>0x17</BitOffset>
  219. <BitWidth>0x1</BitWidth>
  220. <Access>R</Access>
  221. <Values>
  222. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  223. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  224. </Values>
  225. </Bit>
  226. </AssignedBits>
  227. </Field>
  228. </Category>
  229. <Category>
  230. <Name>Write Protection</Name>
  231. <Field>
  232. <Parameters address="0x40023C20" name="FLASH_WRPR1" size="0x4"/>
  233. <AssignedBits>
  234. <Bit>
  235. <Name>WRP0</Name>
  236. <Description/>
  237. <BitOffset>0x0</BitOffset>
  238. <BitWidth>0x20</BitWidth>
  239. <Access>R</Access>
  240. <Values ByBit="true">
  241. <Val value="0x0">Write protection not active</Val>
  242. <Val value="0x1">Write protection active</Val>
  243. </Values>
  244. </Bit>
  245. </AssignedBits>
  246. </Field>
  247. <Field>
  248. <Parameters address="0x40023C80" name="FLASH_WRPR2" size="0x4"/>
  249. <AssignedBits>
  250. <Bit>
  251. <Name>WRP32</Name>
  252. <Description/>
  253. <BitOffset>0x0</BitOffset>
  254. <BitWidth>0x20</BitWidth>
  255. <Access>R</Access>
  256. <Values ByBit="true">
  257. <Val value="0x0">Write protection not active</Val>
  258. <Val value="0x1">Write protection active</Val>
  259. </Values>
  260. </Bit>
  261. </AssignedBits>
  262. </Field>
  263. <Field>
  264. <Parameters address="0x40023C84" name="FLASH_WRPR3" size="0x4"/>
  265. <AssignedBits>
  266. <Bit>
  267. <Name>WRP64</Name>
  268. <Description/>
  269. <BitOffset>0x0</BitOffset>
  270. <BitWidth>0x20</BitWidth>
  271. <Access>R</Access>
  272. <Values ByBit="true">
  273. <Val value="0x0">Write protection not active</Val>
  274. <Val value="0x1">Write protection active</Val>
  275. </Values>
  276. </Bit>
  277. </AssignedBits>
  278. </Field>
  279. </Category>
  280. </Bank>
  281. <Bank interface="JTAG_SWD">
  282. <Parameters address="0x1FF80000" name="Bank 2" size="0x20"/>
  283. <Category>
  284. <Name>Read Out Protection</Name>
  285. <Field>
  286. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  287. <AssignedBits>
  288. <Bit>
  289. <Name>RDP</Name>
  290. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  291. <BitOffset>0x0</BitOffset>
  292. <BitWidth>0x8</BitWidth>
  293. <Access>W</Access>
  294. <Values>
  295. <Val value="0xAA">Level 0, no protection</Val>
  296. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  297. <Val value="0xCC">Level 2, chip protection</Val>
  298. </Values>
  299. </Bit>
  300. </AssignedBits>
  301. </Field>
  302. </Category>
  303. <Category>
  304. <Name>BOR Level</Name>
  305. <Field>
  306. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  307. <AssignedBits>
  308. <Bit>
  309. <Name>BOR_LEV</Name>
  310. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  311. <BitOffset>0x0</BitOffset>
  312. <BitWidth>0x4</BitWidth>
  313. <Access>W</Access>
  314. <Values>
  315. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  316. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  317. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  318. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  319. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  320. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  321. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  322. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  323. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  324. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  325. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  326. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  327. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  328. </Values>
  329. </Bit>
  330. </AssignedBits>
  331. </Field>
  332. </Category>
  333. <Category>
  334. <Name>User Configuration</Name>
  335. <Field>
  336. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  337. <AssignedBits>
  338. <Bit>
  339. <Name>IWDG_SW</Name>
  340. <Description/>
  341. <BitOffset>0x4</BitOffset>
  342. <BitWidth>0x1</BitWidth>
  343. <Access>W</Access>
  344. <Values>
  345. <Val value="0x0">Hardware independant watchdog</Val>
  346. <Val value="0x1">Software independant watchdog</Val>
  347. </Values>
  348. </Bit>
  349. <Bit>
  350. <Name>nRST_STOP</Name>
  351. <Description/>
  352. <BitOffset>0x5</BitOffset>
  353. <BitWidth>0x1</BitWidth>
  354. <Access>W</Access>
  355. <Values>
  356. <Val value="0x0">Reset generated when entering Stop mode</Val>
  357. <Val value="0x1">No reset generated</Val>
  358. </Values>
  359. </Bit>
  360. <Bit>
  361. <Name>nRST_STDBY</Name>
  362. <Description/>
  363. <BitOffset>0x6</BitOffset>
  364. <BitWidth>0x1</BitWidth>
  365. <Access>W</Access>
  366. <Values>
  367. <Val value="0x0">Reset generated when entering Standby mode</Val>
  368. <Val value="0x1">No reset generated</Val>
  369. </Values>
  370. </Bit>
  371. <Bit>
  372. <Name>nBFB2</Name>
  373. <Description/>
  374. <BitOffset>0x7</BitOffset>
  375. <BitWidth>0x1</BitWidth>
  376. <Access>W</Access>
  377. <Values>
  378. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  379. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  380. </Values>
  381. </Bit>
  382. </AssignedBits>
  383. </Field>
  384. </Category>
  385. <Category>
  386. <Name>Write Protection</Name>
  387. <Field>
  388. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  389. <AssignedBits>
  390. <Bit>
  391. <Name>WRP0</Name>
  392. <Description/>
  393. <BitOffset>0x0</BitOffset>
  394. <BitWidth>0x10</BitWidth>
  395. <Access>W</Access>
  396. <Values ByBit="true">
  397. <Val value="0x0">Write protection not active</Val>
  398. <Val value="0x1">Write protection active</Val>
  399. </Values>
  400. </Bit>
  401. </AssignedBits>
  402. </Field>
  403. <Field>
  404. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  405. <AssignedBits>
  406. <Bit>
  407. <Name>WRP16</Name>
  408. <Description/>
  409. <BitOffset>0x0</BitOffset>
  410. <BitWidth>0x10</BitWidth>
  411. <Access>W</Access>
  412. <Values ByBit="true">
  413. <Val value="0x0">Write protection not active</Val>
  414. <Val value="0x1">Write protection active</Val>
  415. </Values>
  416. </Bit>
  417. </AssignedBits>
  418. </Field>
  419. <Field>
  420. <Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
  421. <AssignedBits>
  422. <Bit>
  423. <Name>WRP32</Name>
  424. <Description/>
  425. <BitOffset>0x0</BitOffset>
  426. <BitWidth>0x10</BitWidth>
  427. <Access>W</Access>
  428. <Values ByBit="true">
  429. <Val value="0x0">Write protection not active</Val>
  430. <Val value="0x1">Write protection active</Val>
  431. </Values>
  432. </Bit>
  433. </AssignedBits>
  434. </Field>
  435. <Field>
  436. <Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
  437. <AssignedBits>
  438. <Bit>
  439. <Name>WRP48</Name>
  440. <Description/>
  441. <BitOffset>0x0</BitOffset>
  442. <BitWidth>0x10</BitWidth>
  443. <Access>W</Access>
  444. <Values ByBit="true">
  445. <Val value="0x0">Write protection not active</Val>
  446. <Val value="0x1">Write protection active</Val>
  447. </Values>
  448. </Bit>
  449. </AssignedBits>
  450. </Field>
  451. <Field>
  452. <Parameters address="0x1FF80018" name="WRP3" size="0x8"/>
  453. <AssignedBits>
  454. <Bit>
  455. <Name>WRP64</Name>
  456. <Description/>
  457. <BitOffset>0x0</BitOffset>
  458. <BitWidth>0x10</BitWidth>
  459. <Access>W</Access>
  460. <Values ByBit="true">
  461. <Val value="0x0">Write protection not active</Val>
  462. <Val value="0x1">Write protection active</Val>
  463. </Values>
  464. </Bit>
  465. </AssignedBits>
  466. </Field>
  467. <Field>
  468. <Parameters address="0x1FF8001C" name="WRP3" size="0x8"/>
  469. <AssignedBits>
  470. <Bit>
  471. <Name>WRP80</Name>
  472. <Description/>
  473. <BitOffset>0x0</BitOffset>
  474. <BitWidth>0x10</BitWidth>
  475. <Access>W</Access>
  476. <Values ByBit="true">
  477. <Val value="0x0">Write protection not active</Val>
  478. <Val value="0x1">Write protection active</Val>
  479. </Values>
  480. </Bit>
  481. </AssignedBits>
  482. </Field>
  483. </Category>
  484. </Bank>
  485. <Bank interface="Bootloader">
  486. <Parameters address="0x1FF80000" name="Bank 1" size="0x20"/>
  487. <Category>
  488. <Name>Read Out Protection</Name>
  489. <Field>
  490. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  491. <AssignedBits>
  492. <Bit>
  493. <Name>RDP</Name>
  494. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  495. <BitOffset>0x0</BitOffset>
  496. <BitWidth>0x8</BitWidth>
  497. <Access>RW</Access>
  498. <Values>
  499. <Val value="0xAA">Level 0, no protection</Val>
  500. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  501. <Val value="0xCC">Level 2, chip protection</Val>
  502. </Values>
  503. </Bit>
  504. </AssignedBits>
  505. </Field>
  506. </Category>
  507. <Category>
  508. <Name>BOR Level</Name>
  509. <Field>
  510. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  511. <AssignedBits>
  512. <Bit>
  513. <Name>BOR_LEV</Name>
  514. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  515. <BitOffset>0x0</BitOffset>
  516. <BitWidth>0x4</BitWidth>
  517. <Access>RW</Access>
  518. <Values>
  519. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  520. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  521. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  522. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  523. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  524. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  525. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  526. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  527. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  528. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  529. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  530. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  531. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  532. </Values>
  533. </Bit>
  534. </AssignedBits>
  535. </Field>
  536. </Category>
  537. <Category>
  538. <Name>User Configuration</Name>
  539. <Field>
  540. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  541. <AssignedBits>
  542. <Bit>
  543. <Name>IWDG_SW</Name>
  544. <Description/>
  545. <BitOffset>0x4</BitOffset>
  546. <BitWidth>0x1</BitWidth>
  547. <Access>RW</Access>
  548. <Values>
  549. <Val value="0x0">Hardware independant watchdog</Val>
  550. <Val value="0x1">Software independant watchdog</Val>
  551. </Values>
  552. </Bit>
  553. <Bit>
  554. <Name>nRST_STOP</Name>
  555. <Description/>
  556. <BitOffset>0x5</BitOffset>
  557. <BitWidth>0x1</BitWidth>
  558. <Access>RW</Access>
  559. <Values>
  560. <Val value="0x0">Reset generated when entering Stop mode</Val>
  561. <Val value="0x1">No reset generated</Val>
  562. </Values>
  563. </Bit>
  564. <Bit>
  565. <Name>nRST_STDBY</Name>
  566. <Description/>
  567. <BitOffset>0x6</BitOffset>
  568. <BitWidth>0x1</BitWidth>
  569. <Access>RW</Access>
  570. <Values>
  571. <Val value="0x0">Reset generated when entering Standby mode</Val>
  572. <Val value="0x1">No reset generated</Val>
  573. </Values>
  574. </Bit>
  575. <Bit>
  576. <Name>nBFB2</Name>
  577. <Description/>
  578. <BitOffset>0x7</BitOffset>
  579. <BitWidth>0x1</BitWidth>
  580. <Access>RW</Access>
  581. <Values>
  582. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  583. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  584. </Values>
  585. </Bit>
  586. </AssignedBits>
  587. </Field>
  588. </Category>
  589. <Category>
  590. <Name>Write Protection</Name>
  591. <Field>
  592. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  593. <AssignedBits>
  594. <Bit>
  595. <Name>WRP0</Name>
  596. <Description/>
  597. <BitOffset>0x0</BitOffset>
  598. <BitWidth>0x10</BitWidth>
  599. <Access>RW</Access>
  600. <Values ByBit="true">
  601. <Val value="0x0">Write protection not active</Val>
  602. <Val value="0x1">Write protection active</Val>
  603. </Values>
  604. </Bit>
  605. </AssignedBits>
  606. </Field>
  607. <Field>
  608. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  609. <AssignedBits>
  610. <Bit>
  611. <Name>WRP16</Name>
  612. <Description/>
  613. <BitOffset>0x0</BitOffset>
  614. <BitWidth>0x10</BitWidth>
  615. <Access>RW</Access>
  616. <Values ByBit="true">
  617. <Val value="0x0">Write protection not active</Val>
  618. <Val value="0x1">Write protection active</Val>
  619. </Values>
  620. </Bit>
  621. </AssignedBits>
  622. </Field>
  623. <Field>
  624. <Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
  625. <AssignedBits>
  626. <Bit>
  627. <Name>WRP32</Name>
  628. <Description/>
  629. <BitOffset>0x0</BitOffset>
  630. <BitWidth>0x10</BitWidth>
  631. <Access>RW</Access>
  632. <Values ByBit="true">
  633. <Val value="0x0">Write protection not active</Val>
  634. <Val value="0x1">Write protection active</Val>
  635. </Values>
  636. </Bit>
  637. </AssignedBits>
  638. </Field>
  639. <Field>
  640. <Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
  641. <AssignedBits>
  642. <Bit>
  643. <Name>WRP48</Name>
  644. <Description/>
  645. <BitOffset>0x0</BitOffset>
  646. <BitWidth>0x10</BitWidth>
  647. <Access>RW</Access>
  648. <Values ByBit="true">
  649. <Val value="0x0">Write protection not active</Val>
  650. <Val value="0x1">Write protection active</Val>
  651. </Values>
  652. </Bit>
  653. </AssignedBits>
  654. </Field>
  655. <Field>
  656. <Parameters address="0x1FF80018" name="WRP3" size="0x8"/>
  657. <AssignedBits>
  658. <Bit>
  659. <Name>WRP64</Name>
  660. <Description/>
  661. <BitOffset>0x0</BitOffset>
  662. <BitWidth>0x10</BitWidth>
  663. <Access>RW</Access>
  664. <Values ByBit="true">
  665. <Val value="0x0">Write protection not active</Val>
  666. <Val value="0x1">Write protection active</Val>
  667. </Values>
  668. </Bit>
  669. </AssignedBits>
  670. </Field>
  671. <Field>
  672. <Parameters address="0x1FF8001C" name="WRP3" size="0x8"/>
  673. <AssignedBits>
  674. <Bit>
  675. <Name>WRP80</Name>
  676. <Description/>
  677. <BitOffset>0x0</BitOffset>
  678. <BitWidth>0x10</BitWidth>
  679. <Access>RW</Access>
  680. <Values ByBit="true">
  681. <Val value="0x0">Write protection not active</Val>
  682. <Val value="0x1">Write protection active</Val>
  683. </Values>
  684. </Bit>
  685. </AssignedBits>
  686. </Field>
  687. </Category>
  688. </Bank>
  689. </Peripheral>
  690. </Peripherals>
  691. </Device>
  692. </Root>