STM32_Prog_DB_0x437.xml 22 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x437</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32L15xxE/STM32L162xE</Name>
  9. <Series>STM32L1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD"/>
  14. <!-- Bootloader Interface -->
  15. <Interface name="Bootloader"/>
  16. </Configurations>
  17. <!-- Peripherals -->
  18. <Peripherals>
  19. <!-- Embedded SRAM -->
  20. <Peripheral>
  21. <Name>Embedded SRAM</Name>
  22. <Type>Storage</Type>
  23. <Description/>
  24. <ErasedValue>0x00</ErasedValue>
  25. <Access>RWE</Access>
  26. <!-- 80 KB -->
  27. <Configuration>
  28. <Parameters address="0x20000000" name="SRAM" size="0x14000"/>
  29. <Description/>
  30. <Organization>Single</Organization>
  31. <Bank name="Bank 1">
  32. <Field>
  33. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x14000"/>
  34. </Field>
  35. </Bank>
  36. </Configuration>
  37. </Peripheral>
  38. <!-- Embedded Flash -->
  39. <Peripheral>
  40. <Name>Embedded Flash</Name>
  41. <Type>Storage</Type>
  42. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  43. <ErasedValue>0x00</ErasedValue>
  44. <Access>RWE</Access>
  45. <FlashSize address="0x1FF800CC" default="0x80000"/>
  46. <!-- 512KB dual Bank -->
  47. <Configuration>
  48. <Parameters address="0x08000000" name=" 512 Kbytes Embedded Flash" size="0x80000"/>
  49. <Description/>
  50. <Organization>Dual</Organization>
  51. <Allignement>0x4</Allignement>
  52. <Bank name="Bank 1">
  53. <Field>
  54. <Parameters address="0x08000000" name="sector0" occurence="0x400" size="0x100"/>
  55. </Field>
  56. </Bank>
  57. <Bank name="Bank 2">
  58. <Field>
  59. <Parameters address="0x08040000" name="sector1024" occurence="0x400" size="0x100"/>
  60. </Field>
  61. </Bank>
  62. <Bank name="EEPROM1">
  63. <Field>
  64. <Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x2000"/>
  65. </Field>
  66. </Bank>
  67. <Bank name="EEPROM2">
  68. <Field>
  69. <Parameters address="0x08082000" name="sector65282" occurence="0x1" size="0x2000"/>
  70. </Field>
  71. </Bank>
  72. </Configuration>
  73. </Peripheral>
  74. <!-- Data EEPROM -->
  75. <Peripheral>
  76. <Name>Data EEPROM</Name>
  77. <Type>Storage</Type>
  78. <Description>The Data EEPROM memory block. It contains user data.</Description>
  79. <ErasedValue>0x00</ErasedValue>
  80. <Access>RWE</Access>
  81. <!-- 16KB dual Bank -->
  82. <Configuration>
  83. <Parameters address="0x08080000" name=" 16 Kbytes Data EEPROM" size="0x4000"/>
  84. <Description/>
  85. <Organization>Dual</Organization>
  86. <Allignement>0x4</Allignement>
  87. <Bank name="Bank 1">
  88. <Field>
  89. <Parameters address="0x08080000" name="EEPROM1" occurence="0x1" size="0x2000"/>
  90. </Field>
  91. </Bank>
  92. <Bank name="Bank 2">
  93. <Field>
  94. <Parameters address="0x08082000" name="EEPROM2" occurence="0x1" size="0x2000"/>
  95. </Field>
  96. </Bank>
  97. </Configuration>
  98. </Peripheral>
  99. <!-- Mirror Option Bytes -->
  100. <Peripheral>
  101. <Name>MirrorOptionBytes</Name>
  102. <Type>Storage</Type>
  103. <Description>Mirror Option Bytes contains the extra area.</Description>
  104. <ErasedValue>0xFF</ErasedValue>
  105. <Access>RW</Access>
  106. <!-- 136 Bytes single bank -->
  107. <Configuration>
  108. <Parameters address="0x1FF80000" name=" 136 Bytes Data MirrorOptionBytes" size="0x88"/>
  109. <Description/>
  110. <Organization>Single</Organization>
  111. <Allignement>0x4</Allignement>
  112. <Bank name="MirrorOptionBytes">
  113. <Field>
  114. <Parameters address="0x1FF80000" name="MirrorOptionBytes" occurence="0x1" size="0x88"/>
  115. </Field>
  116. </Bank>
  117. </Configuration>
  118. </Peripheral>
  119. <!-- Option Bytes -->
  120. <Peripheral>
  121. <Name>Option Bytes</Name>
  122. <Type>Configuration</Type>
  123. <Description/>
  124. <Access>RW</Access>
  125. <Bank interface="JTAG_SWD">
  126. <Parameters address="0x40023C1C" name="Bank 1" size="0x88"/>
  127. <Category>
  128. <Name>Read Out Protection</Name>
  129. <Field>
  130. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  131. <AssignedBits>
  132. <Bit>
  133. <Name>RDP</Name>
  134. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  135. <BitOffset>0x0</BitOffset>
  136. <BitWidth>0x8</BitWidth>
  137. <Access>R</Access>
  138. <Values>
  139. <Val value="0xAA">Level 0, no protection</Val>
  140. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  141. <Val value="0xCC">Level 2, chip protection</Val>
  142. </Values>
  143. </Bit>
  144. </AssignedBits>
  145. </Field>
  146. </Category>
  147. <Category>
  148. <Name>BOR Level</Name>
  149. <Field>
  150. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  151. <AssignedBits>
  152. <Bit>
  153. <Name>BOR_LEV</Name>
  154. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  155. <BitOffset>0x10</BitOffset>
  156. <BitWidth>0x4</BitWidth>
  157. <Access>R</Access>
  158. <Values>
  159. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  160. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  161. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  162. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  163. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  164. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  165. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  166. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  167. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  168. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  169. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  170. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  171. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  172. </Values>
  173. </Bit>
  174. </AssignedBits>
  175. </Field>
  176. </Category>
  177. <Category>
  178. <Name>User Configuration</Name>
  179. <Field>
  180. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  181. <AssignedBits>
  182. <Bit>
  183. <Name>IWDG_SW</Name>
  184. <Description/>
  185. <BitOffset>0x14</BitOffset>
  186. <BitWidth>0x1</BitWidth>
  187. <Access>R</Access>
  188. <Values>
  189. <Val value="0x0">Hardware independant watchdog</Val>
  190. <Val value="0x1">Software independant watchdog</Val>
  191. </Values>
  192. </Bit>
  193. <Bit>
  194. <Name>nRST_STOP</Name>
  195. <Description/>
  196. <BitOffset>0x15</BitOffset>
  197. <BitWidth>0x1</BitWidth>
  198. <Access>R</Access>
  199. <Values>
  200. <Val value="0x0">Reset generated when entering Stop mode</Val>
  201. <Val value="0x1">No reset generated</Val>
  202. </Values>
  203. </Bit>
  204. <Bit>
  205. <Name>nRST_STDBY</Name>
  206. <Description/>
  207. <BitOffset>0x16</BitOffset>
  208. <BitWidth>0x1</BitWidth>
  209. <Access>R</Access>
  210. <Values>
  211. <Val value="0x0">Reset generated when entering Standby mode</Val>
  212. <Val value="0x1">No reset generated</Val>
  213. </Values>
  214. </Bit>
  215. <Bit>
  216. <Name>nBFB2</Name>
  217. <Description/>
  218. <BitOffset>0x17</BitOffset>
  219. <BitWidth>0x1</BitWidth>
  220. <Access>R</Access>
  221. <Values>
  222. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  223. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  224. </Values>
  225. </Bit>
  226. </AssignedBits>
  227. </Field>
  228. </Category>
  229. <Category>
  230. <Name>Write Protection</Name>
  231. <Field>
  232. <Parameters address="0x40023C20" name="FLASH_WRPR1" size="0x4"/>
  233. <AssignedBits>
  234. <Bit>
  235. <Name>WRP0</Name>
  236. <Description/>
  237. <BitOffset>0x0</BitOffset>
  238. <BitWidth>0x20</BitWidth>
  239. <Access>R</Access>
  240. <Values ByBit="true">
  241. <Val value="0x0">Write protection not active</Val>
  242. <Val value="0x1">Write protection active</Val>
  243. </Values>
  244. </Bit>
  245. </AssignedBits>
  246. </Field>
  247. <Field>
  248. <Parameters address="0x40023C80" name="FLASH_WRPR2" size="0x4"/>
  249. <AssignedBits>
  250. <Bit>
  251. <Name>WRP32</Name>
  252. <Description/>
  253. <BitOffset>0x0</BitOffset>
  254. <BitWidth>0x20</BitWidth>
  255. <Access>R</Access>
  256. <Values ByBit="true">
  257. <Val value="0x0">Write protection not active</Val>
  258. <Val value="0x1">Write protection active</Val>
  259. </Values>
  260. </Bit>
  261. </AssignedBits>
  262. </Field>
  263. <Field>
  264. <Parameters address="0x40023C84" name="FLASH_WRPR3" size="0x4"/>
  265. <AssignedBits>
  266. <Bit>
  267. <Name>WRP64</Name>
  268. <Description/>
  269. <BitOffset>0x0</BitOffset>
  270. <BitWidth>0x20</BitWidth>
  271. <Access>R</Access>
  272. <Values ByBit="true">
  273. <Val value="0x0">Write protection not active</Val>
  274. <Val value="0x1">Write protection active</Val>
  275. </Values>
  276. </Bit>
  277. </AssignedBits>
  278. </Field>
  279. <Field>
  280. <Parameters address="0x40023C88" name="FLASH_WRPR4" size="0x4"/>
  281. <AssignedBits>
  282. <Bit>
  283. <Name>WRP96</Name>
  284. <Description/>
  285. <BitOffset>0x0</BitOffset>
  286. <BitWidth>0x20</BitWidth>
  287. <Access>R</Access>
  288. <Values ByBit="true">
  289. <Val value="0x0">Write protection not active</Val>
  290. <Val value="0x1">Write protection active</Val>
  291. </Values>
  292. </Bit>
  293. </AssignedBits>
  294. </Field>
  295. </Category>
  296. </Bank>
  297. <Bank interface="JTAG_SWD">
  298. <Parameters address="0x1FF80000" name="Bank 2" size="0x88"/>
  299. <Category>
  300. <Name>Read Out Protection</Name>
  301. <Field>
  302. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  303. <AssignedBits>
  304. <Bit>
  305. <Name>RDP</Name>
  306. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  307. <BitOffset>0x0</BitOffset>
  308. <BitWidth>0x8</BitWidth>
  309. <Access>W</Access>
  310. <Values>
  311. <Val value="0xAA">Level 0, no protection</Val>
  312. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  313. <Val value="0xCC">Level 2, chip protection</Val>
  314. </Values>
  315. </Bit>
  316. </AssignedBits>
  317. </Field>
  318. </Category>
  319. <Category>
  320. <Name>BOR Level</Name>
  321. <Field>
  322. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  323. <AssignedBits>
  324. <Bit>
  325. <Name>BOR_LEV</Name>
  326. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  327. <BitOffset>0x0</BitOffset>
  328. <BitWidth>0x4</BitWidth>
  329. <Access>W</Access>
  330. <Values>
  331. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  332. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  333. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  334. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  335. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  336. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  337. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  338. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  339. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  340. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  341. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  342. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  343. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  344. </Values>
  345. </Bit>
  346. </AssignedBits>
  347. </Field>
  348. </Category>
  349. <Category>
  350. <Name>User Configuration</Name>
  351. <Field>
  352. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  353. <AssignedBits>
  354. <Bit>
  355. <Name>IWDG_SW</Name>
  356. <Description/>
  357. <BitOffset>0x4</BitOffset>
  358. <BitWidth>0x1</BitWidth>
  359. <Access>W</Access>
  360. <Values>
  361. <Val value="0x0">Hardware independant watchdog</Val>
  362. <Val value="0x1">Software independant watchdog</Val>
  363. </Values>
  364. </Bit>
  365. <Bit>
  366. <Name>nRST_STOP</Name>
  367. <Description/>
  368. <BitOffset>0x5</BitOffset>
  369. <BitWidth>0x1</BitWidth>
  370. <Access>W</Access>
  371. <Values>
  372. <Val value="0x0">Reset generated when entering Stop mode</Val>
  373. <Val value="0x1">No reset generated</Val>
  374. </Values>
  375. </Bit>
  376. <Bit>
  377. <Name>nRST_STDBY</Name>
  378. <Description/>
  379. <BitOffset>0x6</BitOffset>
  380. <BitWidth>0x1</BitWidth>
  381. <Access>W</Access>
  382. <Values>
  383. <Val value="0x0">Reset generated when entering Standby mode</Val>
  384. <Val value="0x1">No reset generated</Val>
  385. </Values>
  386. </Bit>
  387. <Bit>
  388. <Name>nBFB2</Name>
  389. <Description/>
  390. <BitOffset>0x7</BitOffset>
  391. <BitWidth>0x1</BitWidth>
  392. <Access>W</Access>
  393. <Values>
  394. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  395. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  396. </Values>
  397. </Bit>
  398. </AssignedBits>
  399. </Field>
  400. </Category>
  401. </Bank>
  402. <Bank interface="Bootloader">
  403. <Parameters address="0x1FF80000" name="Bank 1" size="0x20"/>
  404. <Category>
  405. <Name>Read Out Protection</Name>
  406. <Field>
  407. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  408. <AssignedBits>
  409. <Bit>
  410. <Name>RDP</Name>
  411. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  412. <BitOffset>0x0</BitOffset>
  413. <BitWidth>0x8</BitWidth>
  414. <Access>RW</Access>
  415. <Values>
  416. <Val value="0xAA">Level 0, no protection</Val>
  417. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  418. <Val value="0xCC">Level 2, chip protection</Val>
  419. </Values>
  420. </Bit>
  421. </AssignedBits>
  422. </Field>
  423. </Category>
  424. <Category>
  425. <Name>BOR Level</Name>
  426. <Field>
  427. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  428. <AssignedBits>
  429. <Bit>
  430. <Name>BOR_LEV</Name>
  431. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  432. <BitOffset>0x0</BitOffset>
  433. <BitWidth>0x4</BitWidth>
  434. <Access>RW</Access>
  435. <Values>
  436. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  437. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  438. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  439. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  440. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  441. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  442. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  443. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  444. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  445. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  446. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  447. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  448. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  449. </Values>
  450. </Bit>
  451. </AssignedBits>
  452. </Field>
  453. </Category>
  454. <Category>
  455. <Name>User Configuration</Name>
  456. <Field>
  457. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  458. <AssignedBits>
  459. <Bit>
  460. <Name>IWDG_SW</Name>
  461. <Description/>
  462. <BitOffset>0x4</BitOffset>
  463. <BitWidth>0x1</BitWidth>
  464. <Access>RW</Access>
  465. <Values>
  466. <Val value="0x0">Hardware independant watchdog</Val>
  467. <Val value="0x1">Software independant watchdog</Val>
  468. </Values>
  469. </Bit>
  470. <Bit>
  471. <Name>nRST_STOP</Name>
  472. <Description/>
  473. <BitOffset>0x5</BitOffset>
  474. <BitWidth>0x1</BitWidth>
  475. <Access>RW</Access>
  476. <Values>
  477. <Val value="0x0">Reset generated when entering Stop mode</Val>
  478. <Val value="0x1">No reset generated</Val>
  479. </Values>
  480. </Bit>
  481. <Bit>
  482. <Name>nRST_STDBY</Name>
  483. <Description/>
  484. <BitOffset>0x6</BitOffset>
  485. <BitWidth>0x1</BitWidth>
  486. <Access>RW</Access>
  487. <Values>
  488. <Val value="0x0">Reset generated when entering Standby mode</Val>
  489. <Val value="0x1">No reset generated</Val>
  490. </Values>
  491. </Bit>
  492. <Bit>
  493. <Name>nBFB2</Name>
  494. <Description/>
  495. <BitOffset>0x7</BitOffset>
  496. <BitWidth>0x1</BitWidth>
  497. <Access>RW</Access>
  498. <Values>
  499. <Val value="0x0">If boot from Flash then boot from bank 2</Val>
  500. <Val value="0x1">If boot from Flash then boot from bank 1</Val>
  501. </Values>
  502. </Bit>
  503. </AssignedBits>
  504. </Field>
  505. </Category>
  506. <Category>
  507. <Name>Write Protection</Name>
  508. <Field>
  509. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  510. <AssignedBits>
  511. <Bit>
  512. <Name>WRP0</Name>
  513. <Description/>
  514. <BitOffset>0x0</BitOffset>
  515. <BitWidth>0x10</BitWidth>
  516. <Access>RW</Access>
  517. <Values ByBit="true">
  518. <Val value="0x0">Write protection not active</Val>
  519. <Val value="0x1">Write protection active</Val>
  520. </Values>
  521. </Bit>
  522. </AssignedBits>
  523. </Field>
  524. <Field>
  525. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  526. <AssignedBits>
  527. <Bit>
  528. <Name>WRP16</Name>
  529. <Description/>
  530. <BitOffset>0x0</BitOffset>
  531. <BitWidth>0x10</BitWidth>
  532. <Access>RW</Access>
  533. <Values ByBit="true">
  534. <Val value="0x0">Write protection not active</Val>
  535. <Val value="0x1">Write protection active</Val>
  536. </Values>
  537. </Bit>
  538. </AssignedBits>
  539. </Field>
  540. <Field>
  541. <Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
  542. <AssignedBits>
  543. <Bit>
  544. <Name>WRP32</Name>
  545. <Description/>
  546. <BitOffset>0x0</BitOffset>
  547. <BitWidth>0x10</BitWidth>
  548. <Access>RW</Access>
  549. <Values ByBit="true">
  550. <Val value="0x0">Write protection not active</Val>
  551. <Val value="0x1">Write protection active</Val>
  552. </Values>
  553. </Bit>
  554. </AssignedBits>
  555. </Field>
  556. <Field>
  557. <Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
  558. <AssignedBits>
  559. <Bit>
  560. <Name>WRP48</Name>
  561. <Description/>
  562. <BitOffset>0x0</BitOffset>
  563. <BitWidth>0x10</BitWidth>
  564. <Access>RW</Access>
  565. <Values ByBit="true">
  566. <Val value="0x0">Write protection not active</Val>
  567. <Val value="0x1">Write protection active</Val>
  568. </Values>
  569. </Bit>
  570. </AssignedBits>
  571. </Field>
  572. <Field>
  573. <Parameters address="0x1FF80018" name="WRP3" size="0x8"/>
  574. <AssignedBits>
  575. <Bit>
  576. <Name>WRP64</Name>
  577. <Description/>
  578. <BitOffset>0x0</BitOffset>
  579. <BitWidth>0x10</BitWidth>
  580. <Access>RW</Access>
  581. <Values ByBit="true">
  582. <Val value="0x0">Write protection not active</Val>
  583. <Val value="0x1">Write protection active</Val>
  584. </Values>
  585. </Bit>
  586. </AssignedBits>
  587. </Field>
  588. <Field>
  589. <Parameters address="0x1FF8001C" name="WRP3" size="0x8"/>
  590. <AssignedBits>
  591. <Bit>
  592. <Name>WRP80</Name>
  593. <Description/>
  594. <BitOffset>0x0</BitOffset>
  595. <BitWidth>0x10</BitWidth>
  596. <Access>RW</Access>
  597. <Values ByBit="true">
  598. <Val value="0x0">Write protection not active</Val>
  599. <Val value="0x1">Write protection active</Val>
  600. </Values>
  601. </Bit>
  602. </AssignedBits>
  603. </Field>
  604. </Category>
  605. </Bank>
  606. <Bank interface="Bootloader">
  607. <Parameters address="0x1FF80080" name="Bank 2" size="0x8"/>
  608. <Category>
  609. <Name>Write Protection</Name>
  610. <Field>
  611. <Parameters address="0x1FF80080" name="WRP4" size="0x8"/>
  612. <AssignedBits>
  613. <Bit>
  614. <Name>WRP96</Name>
  615. <Description/>
  616. <BitOffset>0x0</BitOffset>
  617. <BitWidth>0x10</BitWidth>
  618. <Access>RW</Access>
  619. <Values ByBit="true">
  620. <Val value="0x0">Write protection not active</Val>
  621. <Val value="0x1">Write protection active</Val>
  622. </Values>
  623. </Bit>
  624. </AssignedBits>
  625. </Field>
  626. <Field>
  627. <Parameters address="0x1FF80084" name="WRP4" size="0x8"/>
  628. <AssignedBits>
  629. <Bit>
  630. <Name>WRP112</Name>
  631. <Description/>
  632. <BitOffset>0x0</BitOffset>
  633. <BitWidth>0x10</BitWidth>
  634. <Access>RW</Access>
  635. <Values ByBit="true">
  636. <Val value="0x0">Write protection not active</Val>
  637. <Val value="0x1">Write protection active</Val>
  638. </Values>
  639. </Bit>
  640. </AssignedBits>
  641. </Field>
  642. </Category>
  643. </Bank>
  644. </Peripheral>
  645. </Peripherals>
  646. </Device>
  647. </Root>