sdk-debuger-stlink/tools/Data_Base/STM32_Prog_DB_0x449.xml

<?xml version="1.0" encoding="UTF-8"?>
<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
<Device>
		<DeviceID>0x449</DeviceID>
		<Vendor>STMicroelectronics</Vendor>
		<Type>MCU</Type>
		<CPU>Cortex-M7</CPU>
		<Name>STM32F74x/STM32F75x</Name>
		<Series>STM32F7</Series>
		<Description>ARM 32-bit Cortex-M7 based device</Description>
		<Configurations>
			<!-- JTAG_SWD Interface -->
			<Interface name="JTAG_SWD">
				<Configuration number="0x0"> <!-- ROM Die -->
					<RomLess>
						<ReadRegister address="0x1FF0F442" mask="0x40" value="0x00"/>
					</RomLess>
				</Configuration>
				<Configuration number="0x0"> <!-- ROM Die -->
					<RomLess>
						<ReadRegister address="0x1FF0F442" mask="0xFFFFFFFF" value="0xFFFFFFFF"/>
					</RomLess>
				</Configuration>
				<Configuration number="0x1"> <!-- RomLess Die -->
					<RomLess>
						<ReadRegister address="0x1FF0F442" mask="0x40" value="0x40"/>
					</RomLess>
				</Configuration>
			</Interface>
			<!-- Bootloader Interface -->
			<Interface name="Bootloader">
				<Configuration number="0x0"> <!-- ROM Die -->
					<RomLess>
						<ReadRegister address="0x0x08000000" mask="0x00" value="0x00"/>
					</RomLess>
				</Configuration>
			</Interface>	
		</Configurations>
		<!-- Peripherals -->
		<Peripherals>
			<!-- Embedded SRAM -->
			<Peripheral>
				<Name>Embedded SRAM</Name>
				<Type>Storage</Type>
				<Description/>
				<ErasedValue>0x00</ErasedValue>
				<Access>RWE</Access>
				<!-- 320 KB -->
				<Configuration>
					<Parameters address="0x20000000" name="SRAM" size="0x50000"/>
					<Description/>
					<Organization>Single</Organization>
					<Bank name="Bank 1">
						<Field>
							<Parameters address="0x20000000" name="SRAM1" occurence="0x1" size="0x50000"/>
						</Field>
					</Bank>
				</Configuration>
			</Peripheral>
			<!-- Embedded Flash -->
			<Peripheral>
				<Name>Embedded Flash</Name>
				<Type>Storage</Type>
				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
				<ErasedValue>0xFF</ErasedValue>
				<Access>RWE</Access>
				<FlashSize address="0x1FF0F442" default="0x100000"/>
				<!-- 1MB single Bank -->
				<Configuration config="0">
					<Parameters address="0x08000000" name=" 1 Mbytes Embedded Flash" size="0x100000"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x10</Allignement>
					<Bank name="Bank 1">
						<Field>
							<Parameters address="0x08000000" name="sector0" occurence="0x4" size="0x8000"/>
						</Field>
						<Field>
							<Parameters address="0x08020000" name="sector4" occurence="0x1" size="0x20000"/>
						</Field>
						<Field>
							<Parameters address="0x08040000" name="sector5" occurence="0x3" size="0x40000"/>
						</Field>
					</Bank>
				</Configuration>
				<Configuration config="1">
					<Parameters address="0x08000000" name=" 64 KByte Embedded Flash" size="0x10000"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x10</Allignement>
					<Bank name="Bank 1">
						<Field>
							<Parameters address="0x08000000" name="sector0" occurence="0x2" size="0x8000"/>
						</Field>
					</Bank>
				</Configuration>
			</Peripheral>
			<!-- ITCM Flash-->
			<Peripheral>
				<Name>ITCM Flash</Name>
				<Type>Storage</Type>
				<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
				<ErasedValue>0xFF</ErasedValue>
				<Access>RWE</Access>
				<!-- 1MB single Bank -->
				<Configuration config="0">
					<Parameters address="0x00200000" name=" 1 Mbytes Embedded Flash" size="0x100000"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x10</Allignement>
					<Bank name="Bank 1">
						<Field>
							<Parameters address="0x00200000" name="sector0" occurence="0x4" size="0x8000"/>
						</Field>
						<Field>
							<Parameters address="0x00220000" name="sector4" occurence="0x1" size="0x20000"/>
						</Field>
						<Field>
							<Parameters address="0x00240000" name="sector5" occurence="0x3" size="0x40000"/>
						</Field>
					</Bank>
				</Configuration>
				<Configuration config="1">
					<Parameters address="0x00200000" name=" 64 KByte Embedded Flash" size="0x10000"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x10</Allignement>
					<Bank name="Bank 1">
						<Field>
							<Parameters address="0x00200000" name="sector0" occurence="0x2" size="0x8000"/>
						</Field>
					</Bank>
				</Configuration>
			</Peripheral>
			<!-- OTP -->
			<Peripheral>
				<Name>OTP</Name>
				<Type>Storage</Type>
				<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
				<ErasedValue>0xFF</ErasedValue>
				<Access>RW</Access>
				<!-- 1 KBytes single bank -->
				<Configuration>
					<Parameters address="0x1FF0F000" name=" 1 KBytes Data OTP" size="0x200"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x4</Allignement>
					<Bank name="OTP">
						<Field>
							<Parameters address="0x1FF0F000" name="OTP" occurence="0x1" size="0x200"/>
						</Field>
					</Bank>
				</Configuration>
			</Peripheral>
			<!-- Mirror Option Bytes -->
			<Peripheral>
				<Name>MirrorOptionBytes</Name>
				<Type>Storage</Type>
				<Description>Mirror Option Bytes contains the extra area.</Description>
				<ErasedValue>0xFF</ErasedValue>
				<Access>RW</Access>
				<!-- 44 Bytes single bank -->
				<Configuration>
					<Parameters address="0x1FFF0000" name=" 44 Bytes Data MirrorOptionBytes" size="0x2C"/>
					<Description/>
					<Organization>Single</Organization>
					<Allignement>0x4</Allignement>
					<Bank name="MirrorOptionBytes">
						<Field>
							<Parameters address="0x1FFF0000" name="MirrorOptionBytes" occurence="0x1" size="0x2C"/>
						</Field>
					</Bank>
				</Configuration>
			</Peripheral>
			<!-- Option Bytes -->
			<Peripheral>
				<Name>Option Bytes</Name>
				<Type>Configuration</Type>
				<Description/>
				<Access>RW</Access>
				<Bank interface="JTAG_SWD">
					<Parameters address="0x40023C14" name="Bank 1" size="0x8"/>
					<Category>
						<Name>Read Out Protection</Name>
						<Field>
							<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>RDP</Name>
									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
									<BitOffset>0x8</BitOffset>
									<BitWidth>0x8</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0xAA">Level 0, no protection</Val>
										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
										<Val value="0xCC">Level 2, chip protection</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>BOR Level</Name>
						<Field>
							<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>BOR_LEV</Name>
									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
									<BitOffset>0x2</BitOffset>
									<BitWidth>0x2</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">BOR Level 3 (VBOR3), brownout threshold level 3</Val>
										<Val value="0x1">BOR Level 2 (VBOR2), brownout threshold level 2</Val>
										<Val value="0x2">BOR Level 1 (VBOR1), brownout threshold level 1</Val>
										<Val value="0x3">BOR off, POR/PDR reset threshold level is applied</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>User Configuration</Name>
						<Field>
							<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>IWDG_STOP</Name>
									<Description/>
									<BitOffset>0x1F</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
										<Val value="0x1">IWDG counter active in stop mode</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>IWDG_STDBY</Name>
									<Description/>
									<BitOffset>0x1E</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
										<Val value="0x1">IWDG counter active in standby mode</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>WWDG_SW</Name>
									<Description/>
									<BitOffset>0x4</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Hardware window watchdog</Val>
										<Val value="0x1">Software window watchdog</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>IWDG_SW</Name>
									<Description/>
									<BitOffset>0x5</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Hardware independant watchdog</Val>
										<Val value="0x1">Software independant watchdog</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>nRST_STOP</Name>
									<Description/>
									<BitOffset>0x6</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Reset generated when entering Stop mode</Val>
										<Val value="0x1">No reset generated</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>nRST_STDBY</Name>
									<Description/>
									<BitOffset>0x7</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Reset generated when entering Standby mode</Val>
										<Val value="0x1">No reset generated</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>Boot address Option Bytes</Name>
						<Field>
							<Parameters address="0x40023C18" name="FLASH_OPTCR1" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>BOOT_ADD0</Name>
									<Description>Define the boot address when BOOT0=0</Description>
									<BitOffset>0x0</BitOffset>
									<BitWidth>0x10</BitWidth>
									<Access>RW</Access>
									<Equation multiplier="0x4000" offset="0x0"/>
								</Bit>
								<Bit>
									<Name>BOOT_ADD1</Name>
									<Description>Define the boot address when BOOT0=1</Description>
									<BitOffset>0x10</BitOffset>
									<BitWidth>0x10</BitWidth>
									<Access>RW</Access>
									<Equation multiplier="0x4000" offset="0x0"/>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>Write Protection</Name>
						<Field>
							<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit config="0">
									<Name>nWRP0</Name>
									<Description/>
									<BitOffset>0x10</BitOffset>
									<BitWidth>0x8</BitWidth>
									<Access>RW</Access>
									<Values ByBit="true">
										<Val value="0x0">Write protection active on this sector</Val>
										<Val value="0x1">Write protection not active on this sector</Val>
									</Values>
								</Bit>
								<Bit config="1">
									<Name>nWRP0</Name>
									<Description/>
									<BitOffset>0x10</BitOffset>
									<BitWidth>0x2</BitWidth>
									<Access>RW</Access>
									<Values ByBit="true">
										<Val value="0x0">Write protection active on this sector</Val>
										<Val value="0x1">Write protection not active on this sector</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
				</Bank>
				<Bank interface="Bootloader">
					<Parameters address="0x1FFF0000" name="Bank 1" size="0x2C"/>
					<Category>
						<Name>Read Out Protection</Name>
						<Field>
							<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>RDP</Name>
									<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
									<BitOffset>0x8</BitOffset>
									<BitWidth>0x8</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0xAA">Level 0, no protection</Val>
										<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
										<Val value="0xCC">Level 2, chip protection</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>BOR Level</Name>
						<Field>
							<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>BOR_LEV</Name>
									<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
									<BitOffset>0x2</BitOffset>
									<BitWidth>0x2</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">BOR Level 3 (VBOR3), brownout threshold level 3</Val>
										<Val value="0x1">BOR Level 2 (VBOR2), brownout threshold level 2</Val>
										<Val value="0x2">BOR Level 1 (VBOR1), brownout threshold level 1</Val>
										<Val value="0x3">BOR off, POR/PDR reset threshold level is applied</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>User Configuration</Name>
						<Field>
							<Parameters address="0x1FFF0008" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>IWDG_STOP</Name>
									<Description/>
									<BitOffset>0xF</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Freeze IWDG counter in stop mode</Val>
										<Val value="0x1">IWDG counter active in stop mode</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>IWDG_STDBY</Name>
									<Description/>
									<BitOffset>0xE</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Freeze IWDG counter in standby mode</Val>
										<Val value="0x1">IWDG counter active in standby mode</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
						<Field>
							<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>WWDG_SW</Name>
									<Description/>
									<BitOffset>0x4</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Hardware window watchdog</Val>
										<Val value="0x1">Software window watchdog</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>IWDG_SW</Name>
									<Description/>
									<BitOffset>0x5</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Hardware independant watchdog</Val>
										<Val value="0x1">Software independant watchdog</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>nRST_STOP</Name>
									<Description/>
									<BitOffset>0x6</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Reset generated when entering Stop mode</Val>
										<Val value="0x1">No reset generated</Val>
									</Values>
								</Bit>
								<Bit>
									<Name>nRST_STDBY</Name>
									<Description/>
									<BitOffset>0x7</BitOffset>
									<BitWidth>0x1</BitWidth>
									<Access>RW</Access>
									<Values>
										<Val value="0x0">Reset generated when entering Standby mode</Val>
										<Val value="0x1">No reset generated</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>Boot address Option Bytes</Name>
						<Field>
							<Parameters address="0x1FFF0010" name="FLASH_OPTCR1" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>BOOT_ADD0</Name>
									<Description>Define the boot address when BOOT0=0</Description>
									<BitOffset>0x0</BitOffset>
									<BitWidth>0x10</BitWidth>
									<Access>RW</Access>
									<Equation multiplier="0x4000" offset="0x0"/>
								</Bit>
							</AssignedBits>
						</Field>
						<Field>
							<Parameters address="0x1FFF0018" name="FLASH_OPTCR1" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>BOOT_ADD1</Name>
									<Description>Define the boot address when BOOT0=1</Description>
									<BitOffset>0x0</BitOffset>
									<BitWidth>0x10</BitWidth>
									<Access>RW</Access>
									<Equation multiplier="0x4000" offset="0x0"/>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
					<Category>
						<Name>Write Protection</Name>
						<Field>
							<Parameters address="0x1FFF0008" name="FLASH_OPTCR1" size="0x4"/>
							<AssignedBits>
								<Bit>
									<Name>nWRP0</Name>
									<Description/>
									<BitOffset>0x0</BitOffset>
									<BitWidth>0x8</BitWidth>
									<Access>RW</Access>
									<Values ByBit="true">
										<Val value="0x0">Write protection active on this sector</Val>
										<Val value="0x1">Write protection not active on this sector</Val>
									</Values>
								</Bit>
							</AssignedBits>
						</Field>
					</Category>
				</Bank>
			</Peripheral>
		</Peripherals>
	</Device>
</Root>