STM32_Prog_DB_0x416.xml 18 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x416</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32L100x8/STM32L100xB/STM32L15xx6/STM32L15xx8/STM32L15xxB</Name>
  9. <Series>STM32L1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD"/>
  14. <!-- Bootloader Interface -->
  15. <Interface name="Bootloader"/>
  16. </Configurations>
  17. <!-- Peripherals -->
  18. <Peripherals>
  19. <!-- Embedded SRAM -->
  20. <Peripheral>
  21. <Name>Embedded SRAM</Name>
  22. <Type>Storage</Type>
  23. <Description/>
  24. <ErasedValue>0x00</ErasedValue>
  25. <Access>RWE</Access>
  26. <!-- 10-16 KB -->
  27. <Configuration>
  28. <Parameters address="0x20000000" name="SRAM" size="0x2800"/>
  29. <Description/>
  30. <Organization>Single</Organization>
  31. <Bank name="Bank 1">
  32. <Field>
  33. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x2800"/>
  34. </Field>
  35. </Bank>
  36. </Configuration>
  37. </Peripheral>
  38. <!-- Embedded Flash -->
  39. <Peripheral>
  40. <Name>Embedded Flash</Name>
  41. <Type>Storage</Type>
  42. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  43. <ErasedValue>0x00</ErasedValue>
  44. <Access>RWE</Access>
  45. <FlashSize address="0x1FF8004C" default="0x20000"/>
  46. <!-- 128KB single Bank -->
  47. <Configuration>
  48. <Parameters address="0x08000000" name=" 128 Kbytes Embedded Flash" size="0x20000"/>
  49. <Description/>
  50. <Organization>Single</Organization>
  51. <Allignement>0x4</Allignement>
  52. <Bank name="Bank 1">
  53. <Field>
  54. <Parameters address="0x08000000" name="sector0" occurence="0x200" size="0x100"/>
  55. </Field>
  56. </Bank>
  57. <Bank name="EEPROM1">
  58. <Field>
  59. <Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x1000"/>
  60. </Field>
  61. </Bank>
  62. </Configuration>
  63. </Peripheral>
  64. <!-- Data EEPROM -->
  65. <Peripheral>
  66. <Name>Data EEPROM</Name>
  67. <Type>Storage</Type>
  68. <Description>The Data EEPROM memory block. It contains user data.</Description>
  69. <ErasedValue>0x00</ErasedValue>
  70. <Access>RWE</Access>
  71. <!-- 1KB single Bank -->
  72. <Configuration>
  73. <Parameters address="0x08080000" name=" 4096 bytes Data EEPROM" size="0x1000"/>
  74. <Description/>
  75. <Organization>Single</Organization>
  76. <Allignement>0x4</Allignement>
  77. <Bank name="Bank 1">
  78. <Field>
  79. <Parameters address="0x08080000" name="EEPROM1" occurence="0x1" size="0x1000"/>
  80. </Field>
  81. </Bank>
  82. </Configuration>
  83. </Peripheral>
  84. <!-- Mirror Option Bytes -->
  85. <Peripheral>
  86. <Name>MirrorOptionBytes</Name>
  87. <Type>Storage</Type>
  88. <Description>Mirror Option Bytes contains the extra area.</Description>
  89. <ErasedValue>0xFF</ErasedValue>
  90. <Access>RW</Access>
  91. <!-- 16 Bytes single bank -->
  92. <Configuration>
  93. <Parameters address="0x1FF80000" name=" 16 Bytes Data MirrorOptionBytes" size="0x10"/>
  94. <Description/>
  95. <Organization>Single</Organization>
  96. <Allignement>0x4</Allignement>
  97. <Bank name="MirrorOptionBytes">
  98. <Field>
  99. <Parameters address="0x1FF80000" name="MirrorOptionBytes" occurence="0x1" size="0x10"/>
  100. </Field>
  101. </Bank>
  102. </Configuration>
  103. </Peripheral>
  104. <!-- Option Bytes -->
  105. <Peripheral>
  106. <Name>Option Bytes</Name>
  107. <Type>Configuration</Type>
  108. <Description/>
  109. <Access>RW</Access>
  110. <Bank interface="JTAG_SWD">
  111. <Parameters address="0x40023C1C" name="Bank 1" size="0x88"/>
  112. <Category>
  113. <Name>Read Out Protection</Name>
  114. <Field>
  115. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  116. <AssignedBits>
  117. <Bit>
  118. <Name>RDP</Name>
  119. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  120. <BitOffset>0x0</BitOffset>
  121. <BitWidth>0x8</BitWidth>
  122. <Access>R</Access>
  123. <Values>
  124. <Val value="0xAA">Level 0, no protection</Val>
  125. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  126. <Val value="0xCC">Level 2, chip protection</Val>
  127. </Values>
  128. </Bit>
  129. </AssignedBits>
  130. </Field>
  131. </Category>
  132. <Category>
  133. <Name>BOR Level</Name>
  134. <Field>
  135. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  136. <AssignedBits>
  137. <Bit>
  138. <Name>BOR_LEV</Name>
  139. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  140. <BitOffset>0x10</BitOffset>
  141. <BitWidth>0x4</BitWidth>
  142. <Access>R</Access>
  143. <Values>
  144. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  145. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  146. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  147. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  148. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  149. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  150. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  151. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  152. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  153. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  154. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  155. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  156. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  157. </Values>
  158. </Bit>
  159. </AssignedBits>
  160. </Field>
  161. </Category>
  162. <Category>
  163. <Name>User Configuration</Name>
  164. <Field>
  165. <Parameters address="0x40023C1C" nname="FLASH_OBR" size="0x4"/>
  166. <AssignedBits>
  167. <Bit>
  168. <Name>IWDG_SW</Name>
  169. <Description/>
  170. <BitOffset>0x14</BitOffset>
  171. <BitWidth>0x1</BitWidth>
  172. <Access>R</Access>
  173. <Values>
  174. <Val value="0x0">Hardware independant watchdog</Val>
  175. <Val value="0x1">Software independant watchdog</Val>
  176. </Values>
  177. </Bit>
  178. <Bit>
  179. <Name>nRST_STOP</Name>
  180. <Description/>
  181. <BitOffset>0x15</BitOffset>
  182. <BitWidth>0x1</BitWidth>
  183. <Access>R</Access>
  184. <Values>
  185. <Val value="0x0">Reset generated when entering Stop mode</Val>
  186. <Val value="0x1">No reset generated</Val>
  187. </Values>
  188. </Bit>
  189. <Bit>
  190. <Name>nRST_STDBY</Name>
  191. <Description/>
  192. <BitOffset>0x16</BitOffset>
  193. <BitWidth>0x1</BitWidth>
  194. <Access>R</Access>
  195. <Values>
  196. <Val value="0x0">Reset generated when entering Standby mode</Val>
  197. <Val value="0x1">No reset generated</Val>
  198. </Values>
  199. </Bit>
  200. </AssignedBits>
  201. </Field>
  202. </Category>
  203. <Category>
  204. <Name>Write Protection</Name>
  205. <Field>
  206. <Parameters address="0x40023C20" name="FLASH_WRPR1" size="0x4"/>
  207. <AssignedBits>
  208. <Bit>
  209. <Name>WRP0</Name>
  210. <Description/>
  211. <BitOffset>0x0</BitOffset>
  212. <BitWidth>0x20</BitWidth>
  213. <Access>R</Access>
  214. <Values ByBit="true">
  215. <Val value="0x0">Write protection not active</Val>
  216. <Val value="0x1">Write protection active</Val>
  217. </Values>
  218. </Bit>
  219. </AssignedBits>
  220. </Field>
  221. </Category>
  222. </Bank>
  223. <Bank interface="JTAG_SWD">
  224. <Parameters address="0x1FF80000" name="Bank 2" size="0x10"/>
  225. <Category>
  226. <Name>Read Out Protection</Name>
  227. <Field>
  228. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  229. <AssignedBits>
  230. <Bit>
  231. <Name>RDP</Name>
  232. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  233. <BitOffset>0x0</BitOffset>
  234. <BitWidth>0x8</BitWidth>
  235. <Access>W</Access>
  236. <Values>
  237. <Val value="0xAA">Level 0, no protection</Val>
  238. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  239. <Val value="0xCC">Level 2, chip protection</Val>
  240. </Values>
  241. </Bit>
  242. </AssignedBits>
  243. </Field>
  244. </Category>
  245. <Category>
  246. <Name>BOR Level</Name>
  247. <Field>
  248. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  249. <AssignedBits>
  250. <Bit>
  251. <Name>BOR_LEV</Name>
  252. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  253. <BitOffset>0x0</BitOffset>
  254. <BitWidth>0x4</BitWidth>
  255. <Access>W</Access>
  256. <Values>
  257. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  258. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  259. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  260. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  261. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  262. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  263. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  264. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  265. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  266. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  267. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  268. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  269. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  270. </Values>
  271. </Bit>
  272. </AssignedBits>
  273. </Field>
  274. </Category>
  275. <Category>
  276. <Name>User Configuration</Name>
  277. <Field>
  278. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  279. <AssignedBits>
  280. <Bit>
  281. <Name>IWDG_SW</Name>
  282. <Description/>
  283. <BitOffset>0x4</BitOffset>
  284. <BitWidth>0x1</BitWidth>
  285. <Access>W</Access>
  286. <Values>
  287. <Val value="0x0">Hardware independant watchdog</Val>
  288. <Val value="0x1">Software independant watchdog</Val>
  289. </Values>
  290. </Bit>
  291. <Bit>
  292. <Name>nRST_STOP</Name>
  293. <Description/>
  294. <BitOffset>0x5</BitOffset>
  295. <BitWidth>0x1</BitWidth>
  296. <Access>W</Access>
  297. <Values>
  298. <Val value="0x0">Reset generated when entering Stop mode</Val>
  299. <Val value="0x1">No reset generated</Val>
  300. </Values>
  301. </Bit>
  302. <Bit>
  303. <Name>nRST_STDBY</Name>
  304. <Description/>
  305. <BitOffset>0x6</BitOffset>
  306. <BitWidth>0x1</BitWidth>
  307. <Access>W</Access>
  308. <Values>
  309. <Val value="0x0">Reset generated when entering Standby mode</Val>
  310. <Val value="0x1">No reset generated</Val>
  311. </Values>
  312. </Bit>
  313. </AssignedBits>
  314. </Field>
  315. </Category>
  316. <Category>
  317. <Name>Write Protection</Name>
  318. <Field>
  319. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  320. <AssignedBits>
  321. <Bit>
  322. <Name>WRP0</Name>
  323. <Description/>
  324. <BitOffset>0x0</BitOffset>
  325. <BitWidth>0x10</BitWidth>
  326. <Access>W</Access>
  327. <Values ByBit="true">
  328. <Val value="0x0">Write protection not active</Val>
  329. <Val value="0x1">Write protection active</Val>
  330. </Values>
  331. </Bit>
  332. </AssignedBits>
  333. </Field>
  334. <Field>
  335. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  336. <AssignedBits>
  337. <Bit>
  338. <Name>WRP16</Name>
  339. <Description/>
  340. <BitOffset>0x0</BitOffset>
  341. <BitWidth>0x10</BitWidth>
  342. <Access>W</Access>
  343. <Values ByBit="true">
  344. <Val value="0x0">Write protection not active</Val>
  345. <Val value="0x1">Write protection active</Val>
  346. </Values>
  347. </Bit>
  348. </AssignedBits>
  349. </Field>
  350. </Category>
  351. </Bank>
  352. <Bank interface="Bootloader">
  353. <Parameters address="0x1FF80000" name="Bank 1" size="0x10"/>
  354. <Category>
  355. <Name>Read Out Protection</Name>
  356. <Field>
  357. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  358. <AssignedBits>
  359. <Bit>
  360. <Name>RDP</Name>
  361. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  362. <BitOffset>0x0</BitOffset>
  363. <BitWidth>0x8</BitWidth>
  364. <Access>RW</Access>
  365. <Values>
  366. <Val value="0xAA">Level 0, no protection</Val>
  367. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  368. <Val value="0xCC">Level 2, chip protection</Val>
  369. </Values>
  370. </Bit>
  371. </AssignedBits>
  372. </Field>
  373. </Category>
  374. <Category>
  375. <Name>BOR Level</Name>
  376. <Field>
  377. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  378. <AssignedBits>
  379. <Bit>
  380. <Name>BOR_LEV</Name>
  381. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  382. <BitOffset>0x0</BitOffset>
  383. <BitWidth>0x4</BitWidth>
  384. <Access>RW</Access>
  385. <Values>
  386. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  387. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  388. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  389. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  390. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  391. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  392. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  393. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  394. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  395. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  396. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  397. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  398. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  399. </Values>
  400. </Bit>
  401. </AssignedBits>
  402. </Field>
  403. </Category>
  404. <Category>
  405. <Name>User Configuration</Name>
  406. <Field>
  407. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  408. <AssignedBits>
  409. <Bit>
  410. <Name>IWDG_SW</Name>
  411. <Description/>
  412. <BitOffset>0x4</BitOffset>
  413. <BitWidth>0x1</BitWidth>
  414. <Access>RW</Access>
  415. <Values>
  416. <Val value="0x0">Hardware independant watchdog</Val>
  417. <Val value="0x1">Software independant watchdog</Val>
  418. </Values>
  419. </Bit>
  420. <Bit>
  421. <Name>nRST_STOP</Name>
  422. <Description/>
  423. <BitOffset>0x5</BitOffset>
  424. <BitWidth>0x1</BitWidth>
  425. <Access>RW</Access>
  426. <Values>
  427. <Val value="0x0">Reset generated when entering Stop mode</Val>
  428. <Val value="0x1">No reset generated</Val>
  429. </Values>
  430. </Bit>
  431. <Bit>
  432. <Name>nRST_STDBY</Name>
  433. <Description/>
  434. <BitOffset>0x6</BitOffset>
  435. <BitWidth>0x1</BitWidth>
  436. <Access>RW</Access>
  437. <Values>
  438. <Val value="0x0">Reset generated when entering Standby mode</Val>
  439. <Val value="0x1">No reset generated</Val>
  440. </Values>
  441. </Bit>
  442. </AssignedBits>
  443. </Field>
  444. </Category>
  445. <Category>
  446. <Name>Write Protection</Name>
  447. <Field>
  448. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  449. <AssignedBits>
  450. <Bit>
  451. <Name>WRP0</Name>
  452. <Description/>
  453. <BitOffset>0x0</BitOffset>
  454. <BitWidth>0x10</BitWidth>
  455. <Access>RW</Access>
  456. <Values ByBit="true">
  457. <Val value="0x0">Write protection not active</Val>
  458. <Val value="0x1">Write protection active</Val>
  459. </Values>
  460. </Bit>
  461. </AssignedBits>
  462. </Field>
  463. <Field>
  464. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  465. <AssignedBits>
  466. <Bit>
  467. <Name>WRP16</Name>
  468. <Description/>
  469. <BitOffset>0x0</BitOffset>
  470. <BitWidth>0x10</BitWidth>
  471. <Access>RW</Access>
  472. <Values ByBit="true">
  473. <Val value="0x0">Write protection not active</Val>
  474. <Val value="0x1">Write protection active</Val>
  475. </Values>
  476. </Bit>
  477. </AssignedBits>
  478. </Field>
  479. </Category>
  480. </Bank>
  481. </Peripheral>
  482. </Peripherals>
  483. </Device>
  484. </Root>