STM32_Prog_DB_0x427.xml 19 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x427</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32L100xC/STM32L15xxC/STM32L162xC</Name>
  9. <Series>STM32L1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD">
  14. <Configuration number="0x0"> <!-- WRPx control the write protection of user sector-->
  15. <SPRMode reference="0x1">
  16. <ReadRegister address="0x40023C1C" mask="0x000000100" value="0x0"/>
  17. </SPRMode>
  18. </Configuration>
  19. <Configuration number="0x1"> <!-- WRPx control the read/write protection PcROP-->
  20. <SPRMode reference="0x0">
  21. <ReadRegister address="0x40023C1C" mask="0x000000100" value="0x100"/>
  22. </SPRMode>
  23. </Configuration>
  24. </Interface>
  25. <!-- Bootloader Interface -->
  26. <Interface name="Bootloader">
  27. <Configuration number="0x0"> <!-- WRPx control the write protection of user sector-->
  28. <SPRMode reference="0x1">
  29. <ReadRegister address="0x1FF80000" mask="0x00000100" value="0x0"/>
  30. </SPRMode>
  31. </Configuration>
  32. <Configuration number="0x1"> <!-- WRPx control the read/write protection PcROP-->
  33. <SPRMode reference="0x0">
  34. <ReadRegister address="0x1FF80000" mask="0x00000100" value="0x100"/>
  35. </SPRMode>
  36. </Configuration>
  37. </Interface>
  38. </Configurations>
  39. <!-- Peripherals -->
  40. <Peripherals>
  41. <!-- Embedded SRAM -->
  42. <Peripheral>
  43. <Name>Embedded SRAM</Name>
  44. <Type>Storage</Type>
  45. <Description/>
  46. <ErasedValue>0x00</ErasedValue>
  47. <Access>RWE</Access>
  48. <!-- 32 KB -->
  49. <Configuration>
  50. <Parameters address="0x20000000" name="SRAM" size="0x8000"/>
  51. <Description/>
  52. <Organization>Single</Organization>
  53. <Bank name="Bank 1">
  54. <Field>
  55. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x8000"/>
  56. </Field>
  57. </Bank>
  58. </Configuration>
  59. </Peripheral>
  60. <!-- Embedded Flash -->
  61. <Peripheral>
  62. <Name>Embedded Flash</Name>
  63. <Type>Storage</Type>
  64. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  65. <ErasedValue>0x00</ErasedValue>
  66. <Access>RWE</Access>
  67. <FlashSize address="0x1FF800CC" default="0x40000"/>
  68. <!-- 256KB single Bank -->
  69. <Configuration>
  70. <Parameters address="0x08000000" name=" 256 Kbytes Embedded Flash" size="0x40000"/>
  71. <Description/>
  72. <Organization>Single</Organization>
  73. <Allignement>0x4</Allignement>
  74. <Bank name="Bank 1">
  75. <Field>
  76. <Parameters address="0x08000000" name="sector0" occurence="0x400" size="0x100"/>
  77. </Field>
  78. </Bank>
  79. <Bank name="EEPROM1">
  80. <Field>
  81. <Parameters address="0x08080000" name="sector65281" occurence="0x1" size="0x2000"/>
  82. </Field>
  83. </Bank>
  84. </Configuration>
  85. </Peripheral>
  86. <!-- Data EEPROM -->
  87. <Peripheral>
  88. <Name>Data EEPROM</Name>
  89. <Type>Storage</Type>
  90. <Description>The Data EEPROM memory block. It contains user data.</Description>
  91. <ErasedValue>0x00</ErasedValue>
  92. <Access>RWE</Access>
  93. <!-- 8KB single Bank -->
  94. <Configuration>
  95. <Parameters address="0x08080000" name=" 8 Kbytes Data EEPROM" size="0x2000"/>
  96. <Description/>
  97. <Organization>Single</Organization>
  98. <Allignement>0x4</Allignement>
  99. <Bank name="Bank 1">
  100. <Field>
  101. <Parameters address="0x08080000" name="EEPROM1" occurence="0x1" size="0x2000"/>
  102. </Field>
  103. </Bank>
  104. </Configuration>
  105. </Peripheral>
  106. <!-- Mirror Option Bytes -->
  107. <Peripheral>
  108. <Name>MirrorOptionBytes</Name>
  109. <Type>Storage</Type>
  110. <Description>Mirror Option Bytes contains the extra area.</Description>
  111. <ErasedValue>0xFF</ErasedValue>
  112. <Access>RW</Access>
  113. <!-- 24 Bytes single bank -->
  114. <Configuration>
  115. <Parameters address="0x1FF80000" name=" 24 Bytes Data MirrorOptionBytes" size="0x18"/>
  116. <Description/>
  117. <Organization>Single</Organization>
  118. <Allignement>0x4</Allignement>
  119. <Bank name="MirrorOptionBytes">
  120. <Field>
  121. <Parameters address="0x1FF80000" name="MirrorOptionBytes" occurence="0x1" size="0x18"/>
  122. </Field>
  123. </Bank>
  124. </Configuration>
  125. </Peripheral>
  126. <!-- Option Bytes -->
  127. <Peripheral>
  128. <Name>Option Bytes</Name>
  129. <Type>Configuration</Type>
  130. <Description/>
  131. <Access>RW</Access>
  132. <Bank interface="JTAG_SWD">
  133. <Parameters address="0x40023C1C" name="Bank 1" size="0x88"/>
  134. <Category>
  135. <Name>Read Out Protection</Name>
  136. <Field>
  137. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  138. <AssignedBits>
  139. <Bit>
  140. <Name>RDP</Name>
  141. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  142. <BitOffset>0x0</BitOffset>
  143. <BitWidth>0x8</BitWidth>
  144. <Access>RW</Access>
  145. <Values>
  146. <Val value="0xAA">Level 0, no protection</Val>
  147. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  148. <Val value="0xCC">Level 2, chip protection</Val>
  149. </Values>
  150. </Bit>
  151. </AssignedBits>
  152. </Field>
  153. </Category>
  154. <Category>
  155. <Name>PCROP Protection</Name>
  156. <Field>
  157. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  158. <AssignedBits>
  159. <Bit reference="SPRMode">
  160. <Name>SPRMOD</Name>
  161. <Description>Sector protection mode selection option byte.</Description>
  162. <BitOffset>0x8</BitOffset>
  163. <BitWidth>0x1</BitWidth>
  164. <Access>RW</Access>
  165. <Values>
  166. <Val value="0x0">WRPx bit defines sector write protection</Val>
  167. <Val value="0x1">WRPx bit defines sector read/write (PCROP) protection</Val>
  168. </Values>
  169. </Bit>
  170. </AssignedBits>
  171. </Field>
  172. </Category>
  173. <Category>
  174. <Name>BOR Level</Name>
  175. <Field>
  176. <Parameters address="0x40023C1C" name="FLASH_OBR" size="0x4"/>
  177. <AssignedBits>
  178. <Bit>
  179. <Name>BOR_LEV</Name>
  180. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  181. <BitOffset>0x10</BitOffset>
  182. <BitWidth>0x4</BitWidth>
  183. <Access>RW</Access>
  184. <Values>
  185. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  186. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  187. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  188. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  189. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  190. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  191. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  192. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  193. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  194. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  195. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  196. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  197. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  198. </Values>
  199. </Bit>
  200. </AssignedBits>
  201. </Field>
  202. </Category>
  203. <Category>
  204. <Name>User Configuration</Name>
  205. <Field>
  206. <Parameters address="0x40023C1C" nname="FLASH_OBR" size="0x4"/>
  207. <AssignedBits>
  208. <Bit>
  209. <Name>IWDG_SW</Name>
  210. <Description/>
  211. <BitOffset>0x14</BitOffset>
  212. <BitWidth>0x1</BitWidth>
  213. <Access>RW</Access>
  214. <Values>
  215. <Val value="0x0">Hardware independant watchdog</Val>
  216. <Val value="0x1">Software independant watchdog</Val>
  217. </Values>
  218. </Bit>
  219. <Bit>
  220. <Name>nRST_STOP</Name>
  221. <Description/>
  222. <BitOffset>0x15</BitOffset>
  223. <BitWidth>0x1</BitWidth>
  224. <Access>RW</Access>
  225. <Values>
  226. <Val value="0x0">Reset generated when entering Stop mode</Val>
  227. <Val value="0x1">No reset generated</Val>
  228. </Values>
  229. </Bit>
  230. <Bit>
  231. <Name>nRST_STDBY</Name>
  232. <Description/>
  233. <BitOffset>0x16</BitOffset>
  234. <BitWidth>0x1</BitWidth>
  235. <Access>RW</Access>
  236. <Values>
  237. <Val value="0x0">Reset generated when entering Standby mode</Val>
  238. <Val value="0x1">No reset generated</Val>
  239. </Values>
  240. </Bit>
  241. </AssignedBits>
  242. </Field>
  243. </Category>
  244. <Category>
  245. <Name>Write Protection</Name>
  246. <Field>
  247. <Parameters address="0x40023C20" name="FLASH_WRPR1" size="0x4"/>
  248. <AssignedBits>
  249. <Bit config="0">
  250. <Name>WRP0</Name>
  251. <Description/>
  252. <BitOffset>0x0</BitOffset>
  253. <BitWidth>0x20</BitWidth>
  254. <Access>RW</Access>
  255. <Values ByBit="true">
  256. <Val value="0x0">Write protection not active</Val>
  257. <Val value="0x1">Write protection active</Val>
  258. </Values>
  259. </Bit>
  260. <Bit config="1">
  261. <Name>WRP0</Name>
  262. <Description/>
  263. <BitOffset>0x0</BitOffset>
  264. <BitWidth>0x20</BitWidth>
  265. <Access>RW</Access>
  266. <Values ByBit="true">
  267. <Val value="0x0">read/Write protection active</Val>
  268. <Val value="0x1">read/Write protection not active</Val>
  269. </Values>
  270. </Bit>
  271. </AssignedBits>
  272. </Field>
  273. <Field>
  274. <Parameters address="0x40023C80" name="FLASH_WRPR2" size="0x4"/>
  275. <AssignedBits>
  276. <Bit config="0">
  277. <Name>WRP32</Name>
  278. <Description/>
  279. <BitOffset>0x0</BitOffset>
  280. <BitWidth>0x20</BitWidth>
  281. <Access>RW</Access>
  282. <Values ByBit="true">
  283. <Val value="0x0">Write protection not active</Val>
  284. <Val value="0x1">Write protection active</Val>
  285. </Values>
  286. </Bit>
  287. <Bit config="1">
  288. <Name>WRP32</Name>
  289. <Description/>
  290. <BitOffset>0x0</BitOffset>
  291. <BitWidth>0x20</BitWidth>
  292. <Access>RW</Access>
  293. <Values ByBit="true">
  294. <Val value="0x0">read/Write protection active</Val>
  295. <Val value="0x1">read/Write protection not active</Val>
  296. </Values>
  297. </Bit>
  298. </AssignedBits>
  299. </Field>
  300. </Category>
  301. </Bank>
  302. <Bank interface="Bootloader">
  303. <Parameters address="0x1FF80000" name="Bank 1" size="0x18"/>
  304. <Category>
  305. <Name>Read Out Protection</Name>
  306. <Field>
  307. <Parameters address="0x1FF80000" name="RDP" size="0x4"/>
  308. <AssignedBits>
  309. <Bit>
  310. <Name>RDP</Name>
  311. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  312. <BitOffset>0x0</BitOffset>
  313. <BitWidth>0x8</BitWidth>
  314. <Access>RW</Access>
  315. <Values>
  316. <Val value="0xAA">Level 0, no protection</Val>
  317. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  318. <Val value="0xCC">Level 2, chip protection</Val>
  319. </Values>
  320. </Bit>
  321. </AssignedBits>
  322. </Field>
  323. </Category>
  324. <Category>
  325. <Name>PCROP Protection</Name>
  326. <Field>
  327. <Parameters address="0x1FF80000" name="SPRMOD" size="0x4"/>
  328. <AssignedBits>
  329. <Bit reference="SPRMode">
  330. <Name>SPRMOD</Name>
  331. <Description>Sector protection mode selection option byte.</Description>
  332. <BitOffset>0x8</BitOffset>
  333. <BitWidth>0x1</BitWidth>
  334. <Access>RW</Access>
  335. <Values>
  336. <Val value="0x0">WRPx bit defines sector write protection</Val>
  337. <Val value="0x1">WRPx bit defines sector write/read (PCROP) protection</Val>
  338. </Values>
  339. </Bit>
  340. </AssignedBits>
  341. </Field>
  342. </Category>
  343. <Category>
  344. <Name>BOR Level</Name>
  345. <Field>
  346. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  347. <AssignedBits>
  348. <Bit>
  349. <Name>BOR_LEV</Name>
  350. <Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
  351. <BitOffset>0x0</BitOffset>
  352. <BitWidth>0x4</BitWidth>
  353. <Access>RW</Access>
  354. <Values>
  355. <Val value="0x0">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  356. <Val value="0x1">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  357. <Val value="0x2">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  358. <Val value="0x3">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  359. <Val value="0x4">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  360. <Val value="0x5">BOR Level OFF, reset level threshold the 1.45 V-1.55 V</Val>
  361. <Val value="0x6">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  362. <Val value="0x7">BOR Level OFF, reset level threshold for 1.45 V-1.55 V</Val>
  363. <Val value="0x8">BOR Level 1, reset level threshold for 1.69 V-1.8 V</Val>
  364. <Val value="0x9">BOR Level 2, reset level threshold for 1.94 V-2.1 V</Val>
  365. <Val value="0xA">BOR Level 3, reset level threshold for 2.3 V-2.49 V</Val>
  366. <Val value="0xB">BOR Level 4, reset level threshold for 2.54 V-2.74 V</Val>
  367. <Val value="0xC">BOR Level 5, reset level threshold for 2.77 V-3.0 V</Val>
  368. </Values>
  369. </Bit>
  370. </AssignedBits>
  371. </Field>
  372. </Category>
  373. <Category>
  374. <Name>User Configuration</Name>
  375. <Field>
  376. <Parameters address="0x1FF80004" name="USER" size="0x4"/>
  377. <AssignedBits>
  378. <Bit>
  379. <Name>IWDG_SW</Name>
  380. <Description/>
  381. <BitOffset>0x4</BitOffset>
  382. <BitWidth>0x1</BitWidth>
  383. <Access>RW</Access>
  384. <Values>
  385. <Val value="0x0">Hardware independant watchdog</Val>
  386. <Val value="0x1">Software independant watchdog</Val>
  387. </Values>
  388. </Bit>
  389. <Bit>
  390. <Name>nRST_STOP</Name>
  391. <Description/>
  392. <BitOffset>0x5</BitOffset>
  393. <BitWidth>0x1</BitWidth>
  394. <Access>RW</Access>
  395. <Values>
  396. <Val value="0x0">Reset generated when entering Stop mode</Val>
  397. <Val value="0x1">No reset generated</Val>
  398. </Values>
  399. </Bit>
  400. <Bit>
  401. <Name>nRST_STDBY</Name>
  402. <Description/>
  403. <BitOffset>0x6</BitOffset>
  404. <BitWidth>0x1</BitWidth>
  405. <Access>RW</Access>
  406. <Values>
  407. <Val value="0x0">Reset generated when entering Standby mode</Val>
  408. <Val value="0x1">No reset generated</Val>
  409. </Values>
  410. </Bit>
  411. </AssignedBits>
  412. </Field>
  413. </Category>
  414. <Category>
  415. <Name>Write Protection</Name>
  416. <Field>
  417. <Parameters address="0x1FF80008" name="WRP1" size="0x8"/>
  418. <AssignedBits>
  419. <Bit config="0">
  420. <Name>WRP0</Name>
  421. <Description/>
  422. <BitOffset>0x0</BitOffset>
  423. <BitWidth>0x10</BitWidth>
  424. <Access>RW</Access>
  425. <Values ByBit="true">
  426. <Val value="0x0">Write protection not active</Val>
  427. <Val value="0x1">Write protection active</Val>
  428. </Values>
  429. </Bit>
  430. <Bit config="1">
  431. <Name>WRP0</Name>
  432. <Description/>
  433. <BitOffset>0x0</BitOffset>
  434. <BitWidth>0x10</BitWidth>
  435. <Access>RW</Access>
  436. <Values ByBit="true">
  437. <Val value="0x0">read/Write protection active</Val>
  438. <Val value="0x1">read/Write protection active</Val>
  439. </Values>
  440. </Bit>
  441. </AssignedBits>
  442. </Field>
  443. <Field>
  444. <Parameters address="0x1FF8000C" name="WRP1" size="0x8"/>
  445. <AssignedBits>
  446. <Bit config="0">
  447. <Name>WRP16</Name>
  448. <Description/>
  449. <BitOffset>0x0</BitOffset>
  450. <BitWidth>0x10</BitWidth>
  451. <Access>RW</Access>
  452. <Values ByBit="true">
  453. <Val value="0x0">Write protection not active</Val>
  454. <Val value="0x1">Write protection active</Val>
  455. </Values>
  456. </Bit>
  457. <Bit config="1">
  458. <Name>WRP16</Name>
  459. <Description/>
  460. <BitOffset>0x0</BitOffset>
  461. <BitWidth>0x10</BitWidth>
  462. <Access>RW</Access>
  463. <Values ByBit="true">
  464. <Val value="0x0">read/Write protection active</Val>
  465. <Val value="0x1">read/Write protection active</Val>
  466. </Values>
  467. </Bit>
  468. </AssignedBits>
  469. </Field>
  470. <Field>
  471. <Parameters address="0x1FF80010" name="WRP2" size="0x8"/>
  472. <AssignedBits>
  473. <Bit config="0">
  474. <Name>WRP32</Name>
  475. <Description/>
  476. <BitOffset>0x0</BitOffset>
  477. <BitWidth>0x10</BitWidth>
  478. <Access>RW</Access>
  479. <Values ByBit="true">
  480. <Val value="0x0">Write protection not active</Val>
  481. <Val value="0x1">Write protection active</Val>
  482. </Values>
  483. </Bit>
  484. <Bit config="1">
  485. <Name>WRP32</Name>
  486. <Description/>
  487. <BitOffset>0x0</BitOffset>
  488. <BitWidth>0x10</BitWidth>
  489. <Access>RW</Access>
  490. <Values ByBit="true">
  491. <Val value="0x0">read/Write protection active</Val>
  492. <Val value="0x1">read/Write protection not active</Val>
  493. </Values>
  494. </Bit>
  495. </AssignedBits>
  496. </Field>
  497. <Field>
  498. <Parameters address="0x1FF80014" name="WRP2" size="0x8"/>
  499. <AssignedBits>
  500. <Bit config="0">
  501. <Name>WRP48</Name>
  502. <Description/>
  503. <BitOffset>0x0</BitOffset>
  504. <BitWidth>0x10</BitWidth>
  505. <Access>RW</Access>
  506. <Values ByBit="true">
  507. <Val value="0x0">Write protection not active</Val>
  508. <Val value="0x1">Write protection active</Val>
  509. </Values>
  510. </Bit>
  511. <Bit config="1">
  512. <Name>WRP48</Name>
  513. <Description/>
  514. <BitOffset>0x0</BitOffset>
  515. <BitWidth>0x10</BitWidth>
  516. <Access>RW</Access>
  517. <Values ByBit="true">
  518. <Val value="0x0">read/Write protection active</Val>
  519. <Val value="0x1">read/Write protection not active</Val>
  520. </Values>
  521. </Bit>
  522. </AssignedBits>
  523. </Field>
  524. </Category>
  525. </Bank>
  526. </Peripheral>
  527. </Peripherals>
  528. </Device>
  529. </Root>