STM32_Prog_DB_0x430.xml 17 KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
  3. <Device>
  4. <DeviceID>0x430</DeviceID>
  5. <Vendor>STMicroelectronics</Vendor>
  6. <Type>MCU</Type>
  7. <CPU>Cortex-M3</CPU>
  8. <Name>STM32F101/F103 XL-density</Name>
  9. <Series>STM32F1</Series>
  10. <Description>ARM 32-bit Cortex-M3 based device</Description>
  11. <Configurations>
  12. <!-- JTAG_SWD Interface -->
  13. <Interface name="JTAG_SWD"/>
  14. <!-- Bootloader Interface -->
  15. <Interface name="Bootloader"/>
  16. </Configurations>
  17. <!-- Peripherals -->
  18. <Peripherals>
  19. <!-- Embedded SRAM -->
  20. <Peripheral>
  21. <Name>Embedded SRAM</Name>
  22. <Type>Storage</Type>
  23. <Description/>
  24. <ErasedValue>0x00</ErasedValue>
  25. <Access>RWE</Access>
  26. <Configuration>
  27. <Parameters address="0x20000000" name="SRAM" size="0x18000"/>
  28. <Description/>
  29. <Organization>Single</Organization>
  30. <Bank name="Bank 1">
  31. <Field>
  32. <Parameters address="0x20000000" name="SRAM" occurence="0x1" size="0x18000"/>
  33. </Field>
  34. </Bank>
  35. </Configuration>
  36. </Peripheral>
  37. <!-- Embedded Flash -->
  38. <Peripheral>
  39. <Name>Embedded Flash</Name>
  40. <Type>Storage</Type>
  41. <Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
  42. <ErasedValue>0xFF</ErasedValue>
  43. <Access>RWE</Access>
  44. <FlashSize address="0x1FFFF7E0" default="0x100000"/>
  45. <!-- 512KB single Bank -->
  46. <Configuration>
  47. <Parameters address="0x08000000" name=" 1 Mbytes Embedded Flash" size="0x100000"/>
  48. <Description/>
  49. <Organization>Dual</Organization>
  50. <Allignement>0x4</Allignement>
  51. <Bank name="Bank 1">
  52. <Field>
  53. <Parameters address="0x08000000" name="sector0" occurence="0x100" size="0x800"/>
  54. </Field>
  55. </Bank>
  56. <Bank name="Bank 2">
  57. <Field>
  58. <Parameters address="0x08080000" name="sector256" occurence="0x100" size="0x800"/>
  59. </Field>
  60. </Bank>
  61. </Configuration>
  62. </Peripheral>
  63. <!-- Mirror Option Bytes -->
  64. <Peripheral>
  65. <Name>MirrorOptionBytes</Name>
  66. <Type>Storage</Type>
  67. <Description>Mirror Option Bytes contains the extra area.</Description>
  68. <ErasedValue>0xFF</ErasedValue>
  69. <Access>RW</Access>
  70. <!-- 16 Bytes single bank -->
  71. <Configuration>
  72. <Parameters address="0x1FFFF800" name=" 16 Bytes Data MirrorOptionBytes" size="0x10"/>
  73. <Description/>
  74. <Organization>Single</Organization>
  75. <Allignement>0x4</Allignement>
  76. <Bank name="MirrorOptionBytes">
  77. <Field>
  78. <Parameters address="0x1FFFF800" name="MirrorOptionBytes" occurence="0x1" size="0x10"/>
  79. </Field>
  80. </Bank>
  81. </Configuration>
  82. </Peripheral>
  83. <!-- Option Bytes -->
  84. <Peripheral>
  85. <Name>Option Bytes</Name>
  86. <Type>Configuration</Type>
  87. <Description/>
  88. <Access>RW</Access>
  89. <Bank interface="JTAG_SWD">
  90. <Parameters address="0x4002201C" name="Bank 1" size="0x8"/>
  91. <Category>
  92. <Name>Read Out Protection</Name>
  93. <Field>
  94. <Parameters address="0x4002201C" name="FLASH_OBR" size="0x4"/>
  95. <AssignedBits>
  96. <Bit>
  97. <Name>RDP</Name>
  98. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  99. <BitOffset>0x1</BitOffset>
  100. <BitWidth>0x1</BitWidth>
  101. <Access>R</Access>
  102. <Values>
  103. <Val value="0">Flash memory is not read-protected.</Val>
  104. <Val value="1">Flash memory is read-protected.</Val>
  105. </Values>
  106. </Bit>
  107. </AssignedBits>
  108. </Field>
  109. </Category>
  110. <Category>
  111. <Name>User Configuration</Name>
  112. <Field>
  113. <Parameters address="0x4002201C" name="USR_RDP" size="0x4"/>
  114. <AssignedBits>
  115. <Bit>
  116. <Name>WDG_SW</Name>
  117. <Description/>
  118. <BitOffset>0x2</BitOffset>
  119. <BitWidth>0x1</BitWidth>
  120. <Access>R</Access>
  121. <Values>
  122. <Val value="0x0">Hardware watchdog</Val>
  123. <Val value="0x1">Software watchdog</Val>
  124. </Values>
  125. </Bit>
  126. <Bit>
  127. <Name>nRST_STOP</Name>
  128. <Description/>
  129. <BitOffset>0x3</BitOffset>
  130. <BitWidth>0x1</BitWidth>
  131. <Access>R</Access>
  132. <Values>
  133. <Val value="0x0">Reset generated when entering Stop mode</Val>
  134. <Val value="0x1">No reset generated</Val>
  135. </Values>
  136. </Bit>
  137. <Bit>
  138. <Name>nRST_STDBY</Name>
  139. <Description/>
  140. <BitOffset>0x4</BitOffset>
  141. <BitWidth>0x1</BitWidth>
  142. <Access>R</Access>
  143. <Values>
  144. <Val value="0x0">Reset generated when entering Standby mode</Val>
  145. <Val value="0x1">No reset generated</Val>
  146. </Values>
  147. </Bit>
  148. <Bit>
  149. <Name>BFB2</Name>
  150. <Description/>
  151. <BitOffset>0x5</BitOffset>
  152. <BitWidth>0x1</BitWidth>
  153. <Access>R</Access>
  154. <Values>
  155. <Val value="0x0">The device will boot from Flash memory bank 2 when boot pins are set in user Flash position</Val>
  156. <Val value="0x1">The device will boot from Flash memory bank 1 when boot pins are set in user Flash position (default)</Val>
  157. </Values>
  158. </Bit>
  159. </AssignedBits>
  160. </Field>
  161. </Category>
  162. <Category>
  163. <Name>User Data</Name>
  164. <Field>
  165. <Parameters address="0x4002201C" name="USR_DATA" size="0x4"/>
  166. <AssignedBits>
  167. <Bit>
  168. <Name>Data0</Name>
  169. <Description>User data 0 (8-bit)</Description>
  170. <BitOffset>0xA</BitOffset>
  171. <BitWidth>0x8</BitWidth>
  172. <Access>R</Access>
  173. </Bit>
  174. <Bit>
  175. <Name>Data1</Name>
  176. <Description>User data 1 (8-bit)</Description>
  177. <BitOffset>0x12</BitOffset>
  178. <BitWidth>0x8</BitWidth>
  179. <Access>R</Access>
  180. </Bit>
  181. </AssignedBits>
  182. </Field>
  183. </Category>
  184. <Category>
  185. <Name>Write Protection</Name>
  186. <Field>
  187. <Parameters address="0x40022020" name="WRP_0_1" size="0x4"/>
  188. <AssignedBits>
  189. <Bit>
  190. <Name>WRP0</Name>
  191. <!--<Description>One bit of the user option bytes WRPx is used to protect 2 pages of 2 Kbytes in the main memory block. However, bit 7 of WRP3 write protects pages 62 to 511.</Description>-->
  192. <BitOffset>0x0</BitOffset>
  193. <BitWidth>0x20</BitWidth>
  194. <Access>R</Access>
  195. <Values ByBit="true">
  196. <Val value="0x0">Write protection active on this sector</Val>
  197. <Val value="0x1">Write protection not active on this sector</Val>
  198. </Values>
  199. </Bit>
  200. </AssignedBits>
  201. </Field>
  202. </Category>
  203. </Bank>
  204. <Bank interface="JTAG_SWD">
  205. <Parameters address="0x1FFFF800" name="Bank 2" size="0x10"/>
  206. <Category>
  207. <Name>Read Out Protection</Name>
  208. <Field>
  209. <Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
  210. <AssignedBits>
  211. <Bit>
  212. <Name>RDP</Name>
  213. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  214. <BitOffset>0x0</BitOffset>
  215. <BitWidth>0x8</BitWidth>
  216. <Access>W</Access>
  217. <Values>
  218. <Val value="0xA5">Level 0, no protection</Val>
  219. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  220. </Values>
  221. </Bit>
  222. </AssignedBits>
  223. </Field>
  224. </Category>
  225. <Category>
  226. <Name>User Configuration</Name>
  227. <Field>
  228. <Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
  229. <AssignedBits>
  230. <Bit>
  231. <Name>WDG_SW</Name>
  232. <Description/>
  233. <BitOffset>0x10</BitOffset>
  234. <BitWidth>0x1</BitWidth>
  235. <Access>W</Access>
  236. <Values>
  237. <Val value="0x0">Hardware watchdog</Val>
  238. <Val value="0x1">Software watchdog</Val>
  239. </Values>
  240. </Bit>
  241. <Bit>
  242. <Name>nRST_STOP</Name>
  243. <Description/>
  244. <BitOffset>0x11</BitOffset>
  245. <BitWidth>0x1</BitWidth>
  246. <Access>W</Access>
  247. <Values>
  248. <Val value="0x0">Reset generated when entering Stop mode</Val>
  249. <Val value="0x1">No reset generated</Val>
  250. </Values>
  251. </Bit>
  252. <Bit>
  253. <Name>nRST_STDBY</Name>
  254. <Description/>
  255. <BitOffset>0x12</BitOffset>
  256. <BitWidth>0x1</BitWidth>
  257. <Access>W</Access>
  258. <Values>
  259. <Val value="0x0">Reset generated when entering Standby mode</Val>
  260. <Val value="0x1">No reset generated</Val>
  261. </Values>
  262. </Bit>
  263. <Bit>
  264. <Name>BFB2</Name>
  265. <Description/>
  266. <BitOffset>0x13</BitOffset>
  267. <BitWidth>0x1</BitWidth>
  268. <Access>W</Access>
  269. <Values>
  270. <Val value="0x0">The device will boot from Flash memory bank 2 when boot pins are set in user Flash position</Val>
  271. <Val value="0x1">The device will boot from Flash memory bank 1 when boot pins are set in user Flash position (default)</Val>
  272. </Values>
  273. </Bit>
  274. </AssignedBits>
  275. </Field>
  276. </Category>
  277. <Category>
  278. <Name>User Data</Name>
  279. <Field>
  280. <Parameters address="0x1FFFF804" name="USR_DATA" size="0x4"/>
  281. <AssignedBits>
  282. <Bit>
  283. <Name>Data0</Name>
  284. <Description>User data 0 (8-bit)</Description>
  285. <BitOffset>0x0</BitOffset>
  286. <BitWidth>0x8</BitWidth>
  287. <Access>W</Access>
  288. </Bit>
  289. <Bit>
  290. <Name>Data1</Name>
  291. <Description>User data 1 (8-bit)</Description>
  292. <BitOffset>0x10</BitOffset>
  293. <BitWidth>0x8</BitWidth>
  294. <Access>W</Access>
  295. </Bit>
  296. </AssignedBits>
  297. </Field>
  298. </Category>
  299. <Category>
  300. <Name>Write Protection</Name>
  301. <Field>
  302. <Parameters address="0x1FFFF808" name="WRP_0_1" size="0x4"/>
  303. <AssignedBits>
  304. <Bit>
  305. <Name>WRP0</Name>
  306. <!--<Description>One bit of the user option bytes WRPx is used to protect 2 pages of 2 Kbytes in the main memory block. However, bit 7 of WRP3 write protects pages 62 to 511.</Description>-->
  307. <BitOffset>0x0</BitOffset>
  308. <BitWidth>0x8</BitWidth>
  309. <Access>W</Access>
  310. <Values ByBit="true">
  311. <Val value="0x0">Write protection active on this sector</Val>
  312. <Val value="0x1">Write protection not active on this sector</Val>
  313. </Values>
  314. </Bit>
  315. <Bit>
  316. <Name>WRP8</Name>
  317. <Description/>
  318. <BitOffset>0x10</BitOffset>
  319. <BitWidth>0x8</BitWidth>
  320. <Access>W</Access>
  321. <Values ByBit="true">
  322. <Val value="0x0">Write protection active on this sector</Val>
  323. <Val value="0x1">Write protection not active on this sector</Val>
  324. </Values>
  325. </Bit>
  326. </AssignedBits>
  327. </Field>
  328. <Field>
  329. <Parameters address="0x1FFFF80C" name="WRP_2_3" size="0x4"/>
  330. <AssignedBits>
  331. <Bit>
  332. <Name>WRP16</Name>
  333. <Description/>
  334. <BitOffset>0x0</BitOffset>
  335. <BitWidth>0x8</BitWidth>
  336. <Access>W</Access>
  337. <Values ByBit="true">
  338. <Val value="0x0">Write protection active on this sector</Val>
  339. <Val value="0x1">Write protection not active on this sector</Val>
  340. </Values>
  341. </Bit>
  342. <Bit>
  343. <Name>WRP24</Name>
  344. <Description/>
  345. <BitOffset>0x10</BitOffset>
  346. <BitWidth>0x8</BitWidth>
  347. <Access>W</Access>
  348. <Values ByBit="true">
  349. <Val value="0x0">Write protection active on this sector</Val>
  350. <Val value="0x1">Write protection not active on this sector</Val>
  351. </Values>
  352. </Bit>
  353. </AssignedBits>
  354. </Field>
  355. </Category>
  356. </Bank>
  357. <Bank interface="Bootloader">
  358. <Parameters address="0x1FFFF800" name="Bank 1" size="0x10"/>
  359. <Category>
  360. <Name>Read Out Protection</Name>
  361. <Field>
  362. <Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
  363. <AssignedBits>
  364. <Bit>
  365. <Name>RDP</Name>
  366. <Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
  367. <BitOffset>0x0</BitOffset>
  368. <BitWidth>0x8</BitWidth>
  369. <Access>RW</Access>
  370. <Values>
  371. <Val value="0xA5">Level 0, no protection</Val>
  372. <Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
  373. </Values>
  374. </Bit>
  375. </AssignedBits>
  376. </Field>
  377. </Category>
  378. <Category>
  379. <Name>User Configuration</Name>
  380. <Field>
  381. <Parameters address="0x1FFFF800" name="USR_RDP" size="0x4"/>
  382. <AssignedBits>
  383. <Bit>
  384. <Name>WDG_SW</Name>
  385. <Description/>
  386. <BitOffset>0x10</BitOffset>
  387. <BitWidth>0x1</BitWidth>
  388. <Access>RW</Access>
  389. <Values>
  390. <Val value="0x0">Hardware watchdog</Val>
  391. <Val value="0x1">Software watchdog</Val>
  392. </Values>
  393. </Bit>
  394. <Bit>
  395. <Name>nRST_STOP</Name>
  396. <Description/>
  397. <BitOffset>0x11</BitOffset>
  398. <BitWidth>0x1</BitWidth>
  399. <Access>RW</Access>
  400. <Values>
  401. <Val value="0x0">Reset generated when entering Stop mode</Val>
  402. <Val value="0x1">No reset generated</Val>
  403. </Values>
  404. </Bit>
  405. <Bit>
  406. <Name>nRST_STDBY</Name>
  407. <Description/>
  408. <BitOffset>0x12</BitOffset>
  409. <BitWidth>0x1</BitWidth>
  410. <Access>RW</Access>
  411. <Values>
  412. <Val value="0x0">Reset generated when entering Standby mode</Val>
  413. <Val value="0x1">No reset generated</Val>
  414. </Values>
  415. </Bit>
  416. <Bit>
  417. <Name>BFB2</Name>
  418. <Description/>
  419. <BitOffset>0x13</BitOffset>
  420. <BitWidth>0x1</BitWidth>
  421. <Access>RW</Access>
  422. <Values>
  423. <Val value="0x0">The device will boot from Flash memory bank 2 when boot pins are set in user Flash position</Val>
  424. <Val value="0x1">The device will boot from Flash memory bank 1 when boot pins are set in user Flash position (default)</Val>
  425. </Values>
  426. </Bit>
  427. </AssignedBits>
  428. </Field>
  429. </Category>
  430. <Category>
  431. <Name>User Data</Name>
  432. <Field>
  433. <Parameters address="0x1FFFF804" name="USR_DATA" size="0x4"/>
  434. <AssignedBits>
  435. <Bit>
  436. <Name>Data0</Name>
  437. <Description>User data 0 (8-bit)</Description>
  438. <BitOffset>0x0</BitOffset>
  439. <BitWidth>0x8</BitWidth>
  440. <Access>RW</Access>
  441. </Bit>
  442. <Bit>
  443. <Name>Data1</Name>
  444. <Description>User data 1 (8-bit)</Description>
  445. <BitOffset>0x10</BitOffset>
  446. <BitWidth>0x8</BitWidth>
  447. <Access>RW</Access>
  448. </Bit>
  449. </AssignedBits>
  450. </Field>
  451. </Category>
  452. <Category>
  453. <Name>Write Protection</Name>
  454. <Field>
  455. <Parameters address="0x1FFFF808" name="WRP_0_1" size="0x4"/>
  456. <AssignedBits>
  457. <Bit>
  458. <Name>WRP0</Name>
  459. <!--<Description>One bit of the user option bytes WRPx is used to protect 2 pages of 2 Kbytes in the main memory block. However, bit 7 of WRP3 write protects pages 62 to 511.</Description>-->
  460. <BitOffset>0x0</BitOffset>
  461. <BitWidth>0x8</BitWidth>
  462. <Access>RW</Access>
  463. <Values ByBit="true">
  464. <Val value="0x0">Write protection active on this sector</Val>
  465. <Val value="0x1">Write protection not active on this sector</Val>
  466. </Values>
  467. </Bit>
  468. <Bit>
  469. <Name>WRP8</Name>
  470. <Description/>
  471. <BitOffset>0x10</BitOffset>
  472. <BitWidth>0x8</BitWidth>
  473. <Access>RW</Access>
  474. <Values ByBit="true">
  475. <Val value="0x0">Write protection active on this sector</Val>
  476. <Val value="0x1">Write protection not active on this sector</Val>
  477. </Values>
  478. </Bit>
  479. </AssignedBits>
  480. </Field>
  481. <Field>
  482. <Parameters address="0x1FFFF80C" name="WRP_2_3" size="0x4"/>
  483. <AssignedBits>
  484. <Bit>
  485. <Name>WRP16</Name>
  486. <Description/>
  487. <BitOffset>0x0</BitOffset>
  488. <BitWidth>0x8</BitWidth>
  489. <Access>RW</Access>
  490. <Values ByBit="true">
  491. <Val value="0x0">Write protection active on this sector</Val>
  492. <Val value="0x1">Write protection not active on this sector</Val>
  493. </Values>
  494. </Bit>
  495. <Bit>
  496. <Name>WRP24</Name>
  497. <Description/>
  498. <BitOffset>0x10</BitOffset>
  499. <BitWidth>0x8</BitWidth>
  500. <Access>RW</Access>
  501. <Values ByBit="true">
  502. <Val value="0x0">Write protection active on this sector</Val>
  503. <Val value="0x1">Write protection not active on this sector</Val>
  504. </Values>
  505. </Bit>
  506. </AssignedBits>
  507. </Field>
  508. </Category>
  509. </Bank>
  510. </Peripheral>
  511. </Peripherals>
  512. </Device>
  513. </Root>